A new optimized space-vector modulation strategy for acomponent-minimized voltage source inverter

This paper presents a new space-vector modulation strategy suitable for a low-cost pulse-width-modulation (PWM) voltage-source (VS) inverter employing only four switches, four diodes, and a split-capacitor bank in the DC link. The work is motivated by the need for an efficient and flexible modulation method, which is optimized with respect to minimum machine-torque ripple. The modulation strategy is named space-vector modulation for four-switch inverter (SVMFSI), and it is realized by planning the switching patterns between four active voltage vectors on the basis of a desired flux trajectory for the stator-flux vector in the AC machine. The strategy is implemented in a single 8-bit microcontroller as a double-sided modulation strategy. Simulations of the machine-torque ripple are performed at a switching frequency of 4 kHz and indicate a torque ripple of 14% at nominal load. Finally, selected results are verified experimentally on a 1.5-kVA prototype B4 inverter. The test results indicate high-quality output-voltage spectra with no low-order voltage harmonics and a harmonic-loss factor (HLF) of 1.12% at unity modulation index     

Two novel synchronized bus-clamping PWM strategies based on spacevector approach for high power drives

Two synchronized bus-clamping pulse width modulation (PWM) strategies based on the space vector approach are proposed for high-power induction motor drives. The two strategies together can produce PWM waveforms with any odd pulse number, preserving the waveform symmetries. The proposed strategies operate upto the six-step mode, maintaining the proportionality between the reference magnitude and the fundamental voltage generated throughout. These two strategies lead to lesser harmonic distortion as well as lesser peak current over the conventional space vector strategy (CSVS) in the high speed ranges of constant V/F drives. The reduction in the harmonic distortion over CSVS subject to a given maximum switching frequency (F_SW(MAX)) of the inverter is demonstrated theoretically as well as experimentally for F_SW(MAX)=750 Hz and 450 Hz, both with and without overmodulation. The best reduction in the distortion is as high as 30% to 50% in the different cases considered. Further, these two PWM strategies are also useful in reducing the switching frequency of the inverter over sine-triangle PWM and CSVS subject to an upper limit on the harmonic distortion     

Real-Time Calculation of Switching Angles Minimizing THD for Multilevel Inverters With Step Modulation

Multilevel inverters have been widely applied in industries. A family of optimal pulsewidth modulation (PWM) methods for multilevel inverters, such as step modulation, can generate output voltage with less harmonic distortion than popular modulation strategies, such as the carrier-based sinusoidal PWM or the space vector PWM. However, some drawbacks limit the application of optimal PWM. One of such crucial drawback is that the optimal switching angles could not be calculated in real-time and one has to rely on lookup tables with precalculated angles. We propose a novel real-time algorithm for calculating switching angles that minimizes total harmonic distortion (THD) for step modulation. We give a mathematical proof that the output voltage has the minimum THD. We implemented the algorithm on a digital signal processor and provide experimental results that verify the performance of the proposed algorithm.      

Output voltage distortion characterization in multilevel PWM converters

One of the main features to consider in the development of new pulsewidth modulations (PWM) for multilevel converters is the high-frequency output-voltage distortion. In this letter, a novel per-switching-cycle figure, the harmonic distortion of order n for switching cycle k(HD/sub n,k/), is introduced to quantitatively characterize the output three-phase voltage harmonic distortion of multilevel converters around all the integer multiples of the switching frequency. This figure allows for the decomposing of the modulation design problem within an output voltage fundamental cycle into an independent set of smaller problems for every switching cycle. The expression of HD/sub n,k/ as a function of the switching states' duty-ratio is presented for the three-level three-phase neutral-point-clamped voltage source inverter and it can be easily obtained for any other multilevel converter. From the evaluation of HD/sub n,k/ over 1/6th of the output-voltage fundamental-period the value of HD/sub n/ is obtained, providing a measure of the output voltage distortion in a fundamental period. This information is obtained at a lower computational cost than conventional fast Fourier transform (FFT) analysis. The accuracy of the HD/sub n/ distortion predictions is verified by comparing it to FFT-based results obtained from simulation and experiments. The expression to compute the total harmonic distortion (THD) as a function of HD/sub n/ is also derived.     

Application of a three-level NPC inverter as a three-phase four-wire power quality compensator by generalized 3DSVM

A two-level four-leg inverter has been developed for the three-phase four-wire power quality compensators. When it is applied to medium and large capacity compensators, the voltage stress across each switch is so high that the corresponding dv/dt causes large electromagnetic interference. The multilevel voltage source inverter topologies are good substitutes, since they can reduce voltage stress and improves output harmonic contents. The existing three-level neutral point clamped (NPC) inverter in three-phase three-wire systems can be used in three-phase four-wire systems also, because the split dc capacitors provide a neutral connection. This paper presents a comparison study between the three-level four-leg NPC inverter and the three-level NPC inverter. A fast and generalized applicable three-dimensional space vector modulation (3DSVM) is proposed for controlling a three-level NPC inverter in a three-phase four-wire system. The zero-sequence component of each vector is considered in order to implement the neutral current compensation. Both simulation and experimental results are given to show the effectiveness of the proposed 3DSVM control strategy. Comparisons between the 3DSVM and the 3-D hysteresis control strategy are also achieved.     

Three-dimensional pulse-width modulation technique in three-levelpower inverters for three-phase four-wired system

Shunt-connected trilevel power inverter in three-phase four-wired system as an active filter or individual current supply (peak-load supply) is studied by a novel technique: three-dimensional (3-D) voltage vectors pulse width modulation (PWM). In past decades, almost all the study for PWM is limited to the two-dimensional (2-D) domain, α and β frames, in a three-phase three-wired system. However, in practical operation, there are many three-phase four-wired systems in distribution sites. The generalized study of 3-D two-level and three-level inverters is achieved in this paper so as to perform the basic theory of 3-D multilevel space vector switching PWM technique. The sign cubical hysteresis control strategy is proposed and studied with simulation results in 3-D aspect. The 3-D PWM technique in three-level inverters is accomplished     

Three-dimensional space vector modulation for four-legvoltage-source converters

Four-leg voltage-source converters can effectively provide the neutral connection in three-phase four-wire systems. They can be used in inverter, rectifier, and active filter applications to handle the neutral current caused by the unbalanced and/or nonlinear load or unbalanced source. In this paper, three-dimensional (3-D) space vector modulation (SVM) schemes are proposed for controlling the four-leg voltage-source converters. Important issues for 3-D SVM, such as definition of 3-D vectors, identification of adjacent switching vectors in the 3-D space, and switching vector sequencing schemes and comparisons are addressed. The proposed 3-D SVM is a superset of the traditional two-dimensional (2-D) SVM, and thus it inherits all the merits of the traditional 2-D SVM. A 100 kW 5 kHz four-leg inverter and a 20 kHz four-leg rectifier prototypes are built and controlled by the proposed 3-D SVM. Experimental results are presented to validate the effectiveness of the 3-D SVM     

A novel control scheme for the multilevel rectifier/inverter

A novel three-level pulsewidth modulation (PWM) rectifier/inverter is proposed: this single-phase three-level rectifier with power factor correction and current harmonic reduction is proposed to improve power quality. A three-phase three-level neutral point clamped (NPC) inverter is adopted to reduce the harmonic content of the inverter output voltages and currents. In the adopted rectifier, a switching mode rectifier with two AC power switches is adopted to draw a sinusoidal line current in phase with mains voltage. The switching functions of the power switches are based on a look-up table. To achieve a balanced DC-link capacitor voltage, a capacitor voltage compensator is employed. In the NPC inverter, the three-level PWM techniques based on the sine-triangle PWM and space vector modulation are used to reduce the voltage harmonics and to drive an induction motor. The advantages of the adopted th-ree-level rectifier/inverter are (1) the blocking voltage of power devices (T1, T2, S_a1-S_c4) is clamped to half of the DC-link voltage, (2) low conduction loss with low conduction resistance due to low voltage stress, (3) low electromagnetic interference, and (4) low voltage harmonics in the inverter output. Based on the proposed control strategy, the rectifier can draw a high power factor line current and achieve two balance capacitor voltages. The current harmonics generated from the adopted rectifier can meet the international requirements. Finally, the proposed control algorithm is illustrated through experimental results based on the laboratory prototype.     

基于DSP的单相SVPWM技术与零序信号分析

针对单相全桥PWM逆变器,在研究单相逆变电源电压矢量的基础上,首次将空间矢量脉宽调制(SVPWM)技术应用于单相PWM逆变电源,并给出了单相SVPWM算法的DSP实现方法.通过对单相逆变电压调制信号的频谱分析,给出了单相SVPWM算法的谐波倍频特性;通过对单相SVPWM零电压矢量的分析,提出了一种开关模式优化的单相SVPWM算法;通过对单相SVPWM零序信号的分析,论证了单相SVPWM与载波PWM的统一.实验结果验证了单相SVPWM算法的有效性.     

Current-source converter on-line pattern generator switchingfrequency minimization

On-line pulsewidth modulation (PWM) pattern generators for current-source rectifiers and inverters offer a number of control advantages over off-line optimized patterns. However, when implemented using the principles which apply to voltage-source inverter PWM pattern generators, the switching frequency is equal to: (1) the carrier frequency in standard carrier-based implementations and (2) a function of the cycle frequency, sequence of space vectors, and selection of the zero space vector in space vector implementations. This paper shows that this frequency can be reduced to one-half of the respective frequencies. Two pattern generators are investigated: (1) an analog on-line carrier-based technique, namely, the modified dead-band technique and (2) a digital on-line space vector-based technique, where advantage is taken of the extra zero state available in current-source converters. It is shown that the switching frequency reduction is achieved with no penalty in the line current harmonic distortion. Moreover, a significant reduction of AC line current distortion is obtained with the modified dead-band technique for modulation indexes greater than 0.4. The principles of operation of the proposed schemes are explained, Experimental results on a 5 kVA current-source rectifier and a 5 kVA current-source inverter confirm the feasibility and features of the proposed pattern generators     

Space Vector Sequence Investigation and Synchronization Methods for Active Front-End Rectifiers in High-Power Current-Source Drives

Space vector pulsewidth modulation (PWM) schemes for the active front end of a high-power drive normally produce low-order and suborder harmonics due to the low switching frequency and the drifting of synchronization between the PWM waveform and the rectifier input frequency. To provide a synchronized PWM and achieve the best harmonic performance, different space vector sequences suitable for a current-source converter are investigated in this paper. Details on how to achieve the waveform symmetries with a minimum switching frequency for each sequence are discussed. A thorough comparison of the harmonic performance of different space vector sequences is carried out. An optimum space vector modulation method by switching between two best sequences is proposed to achieve the best line-current total harmonic distortion with reduced switching losses. In addition, two synchronization methods, namely a PWM frame regulation method and a direct digital phase-locked loop synchronization method, are proposed. Both methods are equally effective in providing tight synchronization of the PWM waveform with the rectifier input frequency. The work has been verified in simulation and experiment.     

Deadbeat controlled PWM inverter with parameter estimation usingonly voltage sensor

A technique based on deadbeat control theory is proposed to obtain a nearly sinusoidal PWM (pulsewidth-modulated) inverter output voltage using only a voltage sensor. The closed loop sampled-data feedback scheme inherently results in very fast response to load disturbance and nonlinear load, producing low total harmonic distortion. Parameter estimation of the plant provides a type of self-tuning of the proposed controller. A theoretical analysis, simulation, and experimental results are presented for a single-phase PWM inverter controlled by an Intel 8086 microprocessor     

Space Vector Based Hybrid PWM Techniques for Reduced Current Ripple

This paper investigates certain novel switching sequences involving division of active vector time for space vector based pulsewidth modulation (PWM) generation for a voltage source inverter. This paper proposes two new sequences, and identifies all possible sequences, which result in the same average switching frequency as conventional space vector PWM (CSVPWM) at a given sampling frequency. This paper brings out a method for designing hybrid PWM techniques involving multiple sequences to reduce line current ripple. The three proposed hybrid PWM techniques (three-zone PWM, five-zone PWM and seven zone PWM) employ three, five and seven different sequences, respectively, in every sector. Each sequence is employed in a spatial region within the sector where it results in the lowest rms current ripple over the given sampling period. The proposed techniques lead to a significant reduction in THD over CSVPWM at high line voltages. The five-zone technique results in the lowest THD among real-time techniques with uniform sampling, while the seven-zone technique is the best among real-time techniques with twin sampling rates. The superior harmonic performance of the proposed techniques over CSVPWM and existing bus-clamping PWM techniques is established theoretically as well as experimentally.     

Concise modulation strategies for four-leg voltage source inverters

The continuous, discontinuous pulse-width modulation (PWM) schemes and a novel space vector modulation methodology are proposed in this paper for four-leg dc-ac inverters. Using a space vector definition that includes the zero sequence voltage component and partitioning the feasible sixteen modes into two separate sets - one set having zero sequence voltages with positive magnitudes and the other set with negative magnitudes - the novel space vector implementation technique is determined as also the discontinuous carrier based PWM scheme. For the continuous carrier based PWM scheme, the indeterminate defining output voltage equations expressed in terms of the existence functions of the switching devices are solved using an optimization technique. The modulation schemes determined are shown by experimental results to synthesis any desirable balanced or unbalanced three-phase voltage sets when operating in the linear modulation region.     

Trinary Hybrid 81-Level Multilevel Inverter for Motor Drive With Zero Common-Mode Voltage

This paper proposes a trinary hybrid 81-level multilevel inverter for motor drive. Benefiting from the trinary hybrid topology of the inverter, 81-level voltages per phase can be synthesized with the fewest components. Bidirectional DC-DC converters are used not only to inject power to the DC links of the inverter but also to absorb power from some DC links in cases with a lower modulation index. The higher bandwidth of DC-DC converters alleviates the ripples of DC-link voltages caused by the load current. The space vector modulation used here, which selects voltage vectors that generate a zero common-mode voltage in the load, works at a low switching frequency. With up to 81-level voltages per phase, the total harmonic distortion is small, and the relationship between the fundamental load voltage and the modulation index is precisely linear. A vector controller is used to control an induction motor, which results in a high dynamic response for speeds or torques. The performance of the proposed inverter for the motor drive is confirmed by simulation and experiment.     

A 3-D generalized direct PWM algorithm for multilevel converters

A three-dimensional (3-D) generalized direct pulse width modulation (PWM) algorithm is proposed for multilevel converters in a three-phase, four-wire system. It is proved to be equivalent to the newly proposed generalized 3-D space vector modulation (SVM). However, the direct PWM greatly simplifies the calculation process and is much easier to implement in digital controllers. The direct PWM can be used in all applications needing a 3-D control vector, such as active filters, uninterruptible power supplies, etc. Simulation and experimental results are given to show the validity of the proposed control strategy.     

Analytical evaluation of harmonic distortion in PWM AC drives using the notion of stator flux ripple

This paper presents a method to evaluate harmonic distortion due to space vector-based pulse-width modulation (PWM) strategies for ac drives. The proposed method is general enough to deal with division of zero vector time as well as division of active vector time within a subcycle. The method is based on the notion of stator flux ripple, which is a measure of line current ripple. Expressions for RMS ripple over a subcycle are derived for six switching sequences in terms of magnitude and angle of the reference vector, and subcycle duration. The sequences considered include those involving division of active vector time within a subcycle. Further, analytical closed form expressions are derived for the total RMS harmonic distortion factor corresponding to six space vector-based synchronized PWM strategies, proposed recently, for high power drives. The square of the distortion factor turns out to be a quadratic polynomial in modulation index (M), and the coefficients differ with PWM strategies and pulse numbers. These expressions are validated through Fourier analysis as well as experimental measurements. The concept of stator flux ripple provides insight into current ripple as well as torque ripple corresponding to different sequences and strategies.     

Advanced bus-clamping PWM TechniquesBased on space vector approach

Conventional space vector pulsewidth modulation (CSVPWM) employs conventional switching sequence, which divides the zero vector time equally between the two zero states in every subcycle. Existing bus-clamping PWM (BCPWM) techniques employ clamping sequences, which use only one zero state in a subcycle. This paper deals with a special type of switching sequences, termed here as "double-switching clamping sequences," which use only one zero state and apply an active vector twice in a subcycle. The present work brings out a class of bus-clamping PWM techniques, which employ such sequences. It is shown analytically as well as experimentally that the proposed BCPWM techniques result in reduced harmonic distortion in the line currents over CSVPWM as well as existing BCPWM techniques at high modulation indices for a given average switching frequency of F/sub SW/. At high modulation indices, the dominant harmonic components in the line voltages are around 2F/sub SW/ with the proposed BCPWM techniques, while the dominant components are around F/sub SW/ and 1.5F/sub SW/, respectively, with CSVPWM and existing BCPWM techniques. The proposed techniques also reduce the inverter switching losses at high power factors over CSVPWM and existing BCPWM techniques.     

基于滑模控制的三相SVPWM逆变器研究

针对现有的三相全桥逆变器输出电压存在的动态性能差、对负载变化敏感等问题,提出了一种基于滑模控制的输出电压控制方案。为使电路能够在不同的载波频率下运行,文中采用了电压空间矢量脉宽调制三相逆变器拓扑结构,仿真结果表明该方案使得输出电压具有较小的总谐波失真,并具有较好的稳态性能和负载适应能力。     

Two-phase modulation technique for three-level inverter-fed AC drives

Two-phase dipolar and unipolar modulation techniques for three-level three-phase inverters are suggested and compared with conventional three-phase pulsewidth modulation (PWM) techniques. Two-phase PWMs with 60/spl deg/ (0/spl deg/ and /spl plusmn/30/spl deg/ shift) and 120/spl deg/ cycles are investigated from the point of view of harmonic losses, motor voltage spectra, and torque pulsations. It is shown that two-phase dipolar PWMs have no advantages in comparison with three-phase PWMs, while two-phase unipolar PWMs-in contrast with three-phase PWMs-considerably decrease the motor harmonic losses and torque pulsations in the whole motor voltage region. At the same time, the inverter neutral point control requires reversing to three-phase PWM technique for the duration of the control.