Study of the relation between doping profile and diode CVcharacteristics

An explicit formula relating Schottky-diode junction capacitance (C_j) as a function of diode bias (V_dc) and Gaussian doping profile (k) has been curve fitted to a one-dimensional numerical analysis. Two-dimensional physical simulation and the explicit formula have been applied to a Schottky diode with both simulated and analytic results compared against measurement. Incomplete ionization, edge effects, and additional charge created by traps have also been investigated using a physical simulation package, and results are presented for different trap densities. The stated formula has been implemented for a Schottky diode model using a symbolically defined device within the HP-MDS harmonic-balance simulator. This has been used as a building block for a nonlinear transmission-line (NLTL) doubler design with simulated and measured second harmonic-power output being presented. The formula, which is easily implemented in computer-aided design tools, is important for NLTL modeling and design     

Study of the effect of various parameters on nonlineartransmission-line (NLTL) performance

Nonlinear transmission-line (NLTL) shock-wave generator performance in the presence of frequency-dependent losses is reported. The skin effect is studied using the harmonic-balance technique with the aid of the HP-MDS design database language. Measured results of a 48-section NLTL excited by a 26.6-dBm sinusoidal signal from the literature are compared with simulation with good agreement. Experimental performance of an eight-section GaAs monolithic-microwave integrated circuit NLTL is reported for 26-dBm drive conditions. Schottky diode capacitance-voltage (C-V) characteristics are computed using the Silvaco physical simulator for different doping profiles. Doping profiles are used as a parameter in NLTL design and their effect on NLTL performance is investigated. S-parameter measurements are performed for the GEC Marconi Materials Technology GaAs Schottky diode family from which the C-V characteristics are extracted and used to validate simulation. The problem of variable dynamic range is addressed and variable diode areas are used to enhance matching     

Characterization of Nonlinear Transmission Lines for Short Pulse Amplification

Pulse propagation on nonlinear transmission lines (NLTLs), which are transmission lines with regularly spaced Schottky varactors, is investigated for the amplification of short pulses. We recently found that the soliton developed in an NLTL experiences an exponential amplitude growth, when it couples with an existing voltage edge. This paper clarifies how the pulse gain depends on the device parameters, including the line inductance, capacitance, and gradient of voltage edge, and describes the design criteria of an NLTL as a pulse amplifier, together with several results of calculations that examine the potential of the NLTL.     

GaAs nonlinear transmission lines for picosecond pulse generation and millimeter-wave sampling

The GaAs nonlinear transmission line (NLTL) is a monolithic millimeter-wave integrated circuit consisting of a high-impedance transmission line loaded by reverse-biased Schottky contacts. The engineering of functional monolithic NLTLs is considered. Through generation of shock waves on the NLTL, the authors have generated electrical step functions with approximately 5 V magnitude and less than 1.4 ps fall time. Diode sampling bridges strobed by NLTL shock-wave generators have attained bandwidths approaching 300 GHz and have applications in instruments for millimeter-wave waveform and network measurements. The authors discuss the circuit design and diode design requirements for picosecond NLTL shock-wave generators and NLTL-driven sampling circuits.<>     

A millimeter wave large-signal model of GaAs planar Schottky varactor diodes

A millimeter wave large-signal model of GaAs planar Schottky varactor diodes based on a physical analysis is presented.The model consists of nonlinear resistances and capacitances of the junction region and external parasitic parameters.By analyzing the characteristics of the diode under reverse and forward bias,an extraction procedure of all of the parameters is addressed.To validate the newly proposed model,the PSVDs were fabricated based on a planar process and were measured using an automatic network analyzer.Measurement shows that the model exactly represents the behavior of GaAs PSVDs under a wide bias condition from -10 to 0.6 V and for frequencies up to 40 GHz.     

Evaluation of voltage dependent series resistance of epitaxial varactor diodes at microwave frequencies

The series resistance of a high-quality varactor diode is primarily determined by the resistance of the semiconductor material close to the junction. With increasing reverse bias, the width of the space-charge region becomes greater, and the series resistance decreases. Theoretical models of graded and step junctions have been assumed, and calculations have been made of the series resistance as a function of bias. Epitaxial silicon diodes have been measured for series resistance as a function of bias by using the transmission loss method at 6 to 12 Gc/s, with the diode mounted across a reduced-height waveguide. The variation of series resistance with bias agrees well with the theoretical calculations. By measuring of the 3-dB bandwidth of the series resonance of the diode mounted in the reduced-height waveguide, the junction capacitance and the effective series inductance of the package also can be determined. Because the width of the space-charge region must vary with applied voltage in order to obtain the varactor characteristic, the diode cannot have zero-series resistance at zero-volt bias. The minimum possible series resistance is a function of the breakdown voltage and increases with increasing breakdown voltage. Calculations of the maximum possible cutoff frequency as a function of the diode breakdown voltage are presented for both graded and step junction silicon varactors. A plot of series resistance vs. reverse bias can be used to determine the impurity concentration profile in the epitaxial film. The impurity concentration profile can also be determined by measuring the capacitance vs. reverse bias, a technique which has been in use for some time. However the former method appears to be more accurate in that it is independent of junction area.     

Power Schottky diode design and comparison with the junction diode

Because the Schottky diode is a one-carrier device, it has both advantages and disadvantages with respect to the junction diode which is a two-carrier device. The advantage is that there are practically no excess minority carriers which must be swept out before the diode blocks current in the reverse direction. The disadvantage of the Schottky diode is that for a high voltage device it is not possible to use conductivity modulation as in the pin diode; since charge carriers are of one sign, no charge cancellation can occur and current becomes space charge limited. The Schottky diode design is developed in Section 2 and the characteristics of an optimally designed silicon Schottky diode are summarized in Fig. 9. Design criteria and quantitative comparison of junction and Schottky diodes is given in Table 1 and Fig. 10. Although somewhat approximate, the treatment allows a systematic quantitative comparison of the devices for any given application.     

一种新型的砷化镓平面肖特基变容管大信号模型

A millimeter wave large-signal model of GaAs planar Schottky varactor diodes based on a physical analysis is presented.The model consists of nonlinear resistances and capacitances of the junction region and external parasitic parameters.By analyzing the characteristics of the diode under reverse and forward bias,an extraction procedure of all of the parameters is addressed.To validate the newly proposed model,the PSVDs were fabricated based on a planar process and were measured using an automatic network...     

基于肖特基二极管的反射式可调预失真电路

为解决传统反射式预失真电路可调性不高、对功率放大器的邻信道泄漏比(ACLR)改善量小的问题,文 中提出了一种基于肖特基二极管的反射式可调模拟预失真电路。该电路由90°电桥、肖特基二极管以及偏置电路组 成。每条支路采用两个并联肖特基二极管产生非线性信号,以抵消功放的非线性失真。每一个肖特基二极管都有独立 的偏置电路,从而可以增加电路调节的自由度。通过改变每个肖特基二极管的偏压,可实现更大动态范围的幅度和相 位的补偿。基于此原理加工的S 波段模拟预失真电路对中心频率为3. 5 GHz 的Doherty 功率放大器进行线性化测试, 实验结果证明:加上提出的模拟预失真电路后,在输出功率为-28 dBm 时被测功放的ACLR 改善了14. 6 dBc 以上。     

一种提高ESD性能的高压SBD器件结构研究

提出了一种新型SBD器件结构,并应用于高压SBD产品的研制。该结构通过在肖特基势垒区的硅表面增加一层表面缓冲掺杂层(Improved Surface Buffer Dope),将高压SBD的击穿点从常规结构的PN结保护环区域转移到平坦的肖特基势垒区,从根本上提高了器件的反向静电放电(ESD)和浪涌冲击能力。经流片验证,采用该结构的10A150VSBD产品和10A200VSBD产品均通过了反向静电放电(HBM模式)8kV的考核,达到目前业界领先水平。该结构工艺实现简单,可以应用于100V以上SBD的批量生产。     

Modelling and characterization of the reverse recovery of ahigh-power GaAs Schottky diode

The reverse recovery characteristics of high-power GaAs Schottky rectifiers are reported at various temperatures; mixed device and circuit simulations were used to study the internal plasma dynamics during the reverse recovery process. In this approach, semiconductor transport and heat generation and diffusion equations were solved self-consistently using a two-dimensional (2-D) finite element grid structure under boundary conditions imposed by the measurement circuit. The simulation results are shown to be in good agreement with the measured data at temperatures in the range of 25°C to 125°C. These results are compared with the reverse recovery characteristics of a commercial silicon PIN power rectifier under identical conditions and it is shown that carrier depletion is the dominant mechanism causing the reverse recovery in a GaAs Schottky diode. The reverse recovery power loss is negligible in a GaAs Schottky rectifier and is shown to decrease as the case temperature is increased, contrary to the silicon PIN rectifier behaviour     

氮气氛下衬底负偏压预溅射对GaAs肖特基势垒性能的改善

本文研究了不同气氛下衬底负偏压预溅射对GaAs肖特基势垒特性的影响。我们发现,采用氮气氛下衬底负偏压预溅射新工艺能明显改善GaAs肖特基势垒特性:势垒高度增高,势垒电容减小和二极管反向击穿电压增大。这种新工艺对于GaAs肖特基势垒特性改善和GaAs MESFETs性能提高是一个非常有用的技术。     

Current–voltage characteristics of Schottky diode simulated using semiconductor device equations

The Poisson's equation and the drift diffusion equations have been used to simulate the current–voltage characteristics of Schottky diode. The potential variation inside the bulk semiconductor near the metal–semiconductor contact was estimated first and then the current as a function of bias through the Schottky diode using silicon parameters were calculated over a wide temperature range. From the simulated current–voltage characteristics the diode parameters were extracted by fitting of current–voltage data into thermionic emission diffusion current equation. The derived barrier parameters are analysed to study the effect of various parameters, e.g. semiconductor thickness, doping concentration, temperature dependence of carrier mobility and energy band gap, on the current–voltage characteristics of Schottky diode in view of the thermionic emission diffusion current equations.     

Characterization of shallow silicided junctions for sub-quartermicron ULSI technology. Extraction of silicidation induced Schottkycontact area

The current-voltage (I-V) characteristics of shallow silicided p ⁺-n and n⁺-p junctions are presented. In the former the diode behavior was same as in nonsilicided junction, while drastic change in diode I-V was observed in the latter. The formation of Schottky contact was conclusively shown to be the root cause of the modified I-V behavior of n⁺-p junction in the forward bias region. Poole-Frenkel barrier lowering predominantly influenced the reverse leakage current, masking thereby the effect of Schottky contact. The leakage current in n⁺-p diodes was higher than in nonsilicided diodes by two orders of magnitude and this is consistent with the formation of Schottky contact via titanium or titanium-silicide penetrating into the p-substrate and generating trap sites. There is no increase in the leakage current and no formation of Schottky contact in case of the p⁺-n junction. The Schottky contact amounting to less than 0.01% of the total junction area and not amenable for SEM or TEM observation was extracted for the first time by simultaneous characterization of forward and reverse characteristics of silicided n ⁺-p diode     

Reverse I-V characteristics in Au-GaAs Schottky diode in the presence of interfacial layer

The existence of an interfacial layer in an Au-GaAs Schottky diode may be revealed by measuring its I-V characteristics at very low reverse bias voltage. It is shown in this letter that a voltage dividing factor m can be used [see (2) of the text] to describe the effect of the interfacial layer on the I-V characteristics of the diode at low bias voltage.     

Frequency Multiplication By A P-I-N Diode When Driven Into Avalanche Breakdown

An investigation of frequency multiplication using a step-recovery diode (SRD) driven into avalanche breakdown is presented. This mode of operation, which is called the "breakdown mode," consists of a reverse-biased p-n junction, SRD, or IMPATT diode driven into reverse breakdown by an ac signal source. As the diode voltage passes from reverse bias to reverse breakdown and avalanche, the state of the diode switches quickfy from a depletion-layer capacitance to an avalanche inductance; hence the production of strong harmonics. A theoretical analysis and experimental investigation of a coaxial/waveguide 2-6-GHz frequency multiplier using HP5082-0320 step-recovery diodes, [R/sub s/ = 0.75 Omega, C/sub d/(-6/sub v/) = 1.0 pF] shows that the breakdown-mode frequency multiplier has a higher conversion efficiency than the conventional "charge-storage" multipuer. A measured conversion efficiency of 73 percent was achieved while the same circuit configuration produced 52 percent for the same diode used as a charge-storage multiplier under optimum forward-drive and tuning conditions. Also the theory developed in this paper indicates a maximum possible conversion efficiency of 80 percent for the breakdown-mode multiplier, which corresponds closely with the measured results, and a maximum theoretical efficiency for a forward driven diode of 64 percent. The performance of an FM microwave system was monitored using the breakdown multiplier as a LO in which a baseband SNR of 59 dB was recorded.     

Observation of surface charging at the edge of a Schottky contact

Scanning Kelvin probe microscopy was used to detect reverse-bias-induced surface potential changes near the Schottky contact of a GaN Schottky diode. After application of a reverse bias, the surface potential near the Schottky contact gradually decreased with time, indicating an increase of band bending. Surface potential traces recorded after turning off the reverse bias indeed revealed increased band bending near the Schottky contact. A higher reverse bias caused a larger increase of band bending. The authors suggest that a reverse bias facilitates electron tunneling at the edge of the Schottky contact by decreasing the potential barrier width. Capture of these tunneled electrons by surface states causes the observed increase of band bending.     

混合PiN/Schottky二极管的研究

对混合PiN/Schottky二极管（MPS）进行研究,首先对MPS二极管的工作原理进行了分析,通过对MPS二极管、肖特基二极管、PIN二极管的伏安特性进行模拟,结果表明MPS二极管正向压降小,电流密度大,反向漏电流小,是一种具有肖特基正向特性和PN结反向特性的新型整流器。可以通过改变肖特基和PN结的面积比来调整MPS二极管的性能,与肖特基二极管和PIN二极管相比具有明显的优势,是功率系统不可或缺的功率整流管。     

Enhancement of effective barrier height in Ti-silicon Schottky diode using low-energy ion implantation

Increasing the effective barrier height in a Ti-p-type silicon Schottky diode has been achieved by means of low-energy ion implantation to introduce a thin inversion layer on silicon substrate. It is shown theoretically that effective barrier height equal to the energy bandgap can be obtained in such structure if the thickness and dopant density of the implanted layer are properly chosen. Experimental results for several titanium (Ti) on phosphorus implanted p-type silicon Schottky diodes show that effective barrier heights were increased from 0.6 eV for the Ti-p Si Schottky diode to 0.96 eV for a Ti-n-p-Si Schottky diode with a phosphorus-implanted layer thickness of 400 Å and dose of 1.26 × 10¹²cm^-2. Good agreement is obtained between the calculated and the measured barrier height for several Ti-n-p silicon Schottky diodes.     

Multiplexer/demultiplexer IC technology for 100 Gb/s fiber-optictransmission

We report a new integrated circuit for multiplexing and demultiplexing at rates of 100 Gb/s. In transistor multiplexer/demultiplexer circuits, the operating data rate is limited by transistor bandwidth. The demonstrated circuit, which uses terahertz Schottky diodes, readily attains the necessary bandwidths. The IC, based in the diode nonlinear-transmission line (NLTL) technology, consists of an array of four sample-hold gates driven by NLTL strobe generators. To permit use in multiplexing, the sample-hold gates use a six-diode configuration with 150 GHz output bandwidth. Initial measurements with simple data patterns at 104 Gb/s are demonstrated