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本文介绍了一种自适应控制A/D转换编码电路,着重分析了调理电路自动增益控制、误差补偿与A/D转换编码原理,探讨了该电路的局限性,给出了自适应控制A/D转换编码电路的设计方法及其与微处理器的接口应用。 相似文献
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主要介绍NS公司推出的新型低价格的8位单片机COP840C,及由它构成简易A/D转换的两种方法,在对A/D转换器的转换速度要求不高时,用这种方法构成A/D转换电路,可省去A/D转换芯片,达到优化电路、降低成本的目的。 相似文献
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从V/F(电压/频率)转换电路入手,结合可编控制器中高速计数器及频率输出指令的特点,分别研究并设计了一种可以用可编程控制器的开关量输入口和输出口分别实现A/D或D/A转换的接口电路,并研究了相应的程序设计方法。 相似文献
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本文对Hopfield神经网络A/D转换器电路进行了分析。对照转换条件及电路的稳态方程,讨论了输出状态与参考输入必须满足的条件。在此基础上提出了两种改进A/D转换电路的途径:(1)对原电路选择适宜的参考输入;(2)根据Hopfield线性规划网络提出的一种新电路。文中还给出了PSPICE模拟计算,所得结果与理论分析吻合。 相似文献
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CMOS单片双积分式A/D转换器毕玉国双积分式A/D转换器转换精度高,抗干扰性好,因此在仪器仪表和测量系统中被大量采用。双积分式A/D转换器由模拟和数字两大部分电路组成,CMOS单片双积分式A/D转换器将两部分电路集成在单个芯片内,使用非常方便。本文... 相似文献
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MAX138/139/140迷双积分3位半A/D转换电路,并具有LCD或LED岖动功能,采用+2.5-7V单电源供内含带隙准电压,是比较理想的仪表电路。 相似文献
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高速A/D变换器及其基本单元电路洪志良(复旦大学电子工程系,上海,200433)1引言全平行操作的A/D变换器能在一个时钟循环内完成A/D变换器所有位的转换,所以它是速度最快的A/D变换器,文献中把全平行操作A/D变换器称为高速A/D变换器。在高速数... 相似文献
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本文首先介绍了数字信号的特点,对D/A(数字/模拟)转换电路的工作原理做了较为详细的说明,同时对SDA9280集成电路进行了较为系统的分析,对SDA9280在数字处理彩色电视机中的应用作了说明。 相似文献
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本文从D/A与A/D转换器的基本概念和制造技术着手概述,特别对D/A和A/D转换器的应用之主要选择因素,进行了着重说明。随后,提出了D/A和A/D转换器优化品种的原则意见。 相似文献
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A high-speed analog-to-digital (A/D) converter based on the resonant tunneling diode (RTD) is described. This A/D converter takes advantage of the folding characteristic of the RTD to reduce circuit complexity. The speed of the A/D converter is improved by the fast latching action of the RTD digitizer. Simulations show that the 4-B A/D converter can have a sampling rate of several gigahertz 相似文献
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A mixed-mode behavioral model of analog-to-digital (A/D) converters is described. A generalized model structure is introduced. The basic function of an A/D converter is to convert an analog voltage into a digital code, for example, a binary number. Three conversion methods (successive approximation, flash, and dual integration) which are commonly used in A/D converters are modeled and can be selected simply by specifying a parameter of the model. For brevity, only the successive-approximation method is described. The modeling considerations of various parts in the A/D converter, including the input amplifier, D/A converter, comparator, and the synchronization problem, are described. The model has been implemented in the Saber mixed-mode simulator. Simulation results are given 相似文献
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介绍了数据转换器的市场规模及其发展趋势,高速A/D转换器的主要研发公司及其代表产品水平,主流产品的电路结构和工艺技术以及技术发展趋势。 相似文献
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An energy-efficient D/A conversion structure combined with a splited unit-capacitor array and an intermittent-sleeping resistor string is presented for low power SAR A/D converter. The energy dissipation and the matching requirement of the D/A conversion network are researched based on Matlab modeling. And its superiority and applicability are proven by the realization of an 8-bit 200kS/s 25.6 μW 65 nm CMOS SAR A/D converter with this proposed D/A structure. 相似文献
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Xing Yuan Tong Zhang Ming Zhu Yin Tang Yang 《Analog Integrated Circuits and Signal Processing》2012,70(3):417-420
Based on the discussion of traditional dual-array charge scaling D/A conversion approach, an improved D/A network for successive
approximation A/D converter (ADC) is proposed in this letter. With a unit capacitor instead of traditional non-integral scaling
capacitor and by adding several additional logic control signals, this novel D/A network is easier to realize in process than
traditional dual-array approach. Theoretical analysis and high-level Matlab modeling results prove that this improved D/A
network is suitable for embedded SoC applications. 相似文献
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Lerch R.G. Lamkemeyer M.H. Fiedler H.L. Bradinal W. Becker P. 《Solid-State Circuits, IEEE Journal of》1991,26(12):1920-1927
The authors present a 5-V-only 14-b, 16 ksamples/s linear codec suitable as the audio part of a CCITT G722 codec. The device uses second-order sigma-delta modulation for both analog/digital (A/D) and digital/analog (D/A) conversion at 2.048 Msamples/s. A time-continuous modulator with integrated antialias filtering is used at the A/D side, obviating the need for an external antialiasing filter. The digital filters for decimation and interpolation are implemented with both a custom digital signal processor (DSP) and specialized hardware. The device was realized with 74000 transistors on a 31-mm2 die in a 3-μm SACMOS technology. A dynamic range of more than 80 dB and a passband ripple of 0.3 dB were attained with A/D and D/A paths in cascade 相似文献
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通过建立A/D、D/A的数学模型,推导了A/D、D/A实现变频的基本公式,分析了量化噪声和变频损失,总结了其主要特点及其与模拟混频器的区别,说明A/D和D/A实现频率变换是切实可行的,在进行模数、数模转换的同时实现变频,有利于节省器件,简化电路。 相似文献