介质加载石墨烯等离子体波导传输特性北大核心CSCD

设计了一种介质加载石墨烯等离子体波导,研究了不同结构尺寸的波导模场分布及传输特性。仿真结果表明,当石墨烯的化学势为0.7eV、波导脊宽度和脊高度均为1000nm时,介质加载石墨烯等离子体波导的模式宽度达到最小值1.55μm,传播长度达到43.47mm。该介质加载石墨烯等离子体波导不仅可以满足波导设计的要求,也为纳米器件的长距离传输提供了可能。     

波导二极管移相器的设计

介绍了波导二极管移相器的设计原理和实现方法。运用矩形波导的传输理论,将加载线型移相单元插入矩形波导内,对波导内的24个加载线型移相单元进行调配组合实现五位地址数码控制移相器。实测结果表明该移相器移相范围大、插入损耗低、输入驻波小、转换时间快、移相精度高及耐高功率性好。     

介质加载型混合表面等离子体波导的损耗特性

为实现长距离传输及亚波长尺度的模式限制,在传统介质加载型表面等离子结构的基础上,设计了一种微孔介质加载混合表面等离子体波导,采用时域有限差分法(FDTD)对该波导模式场分布及传输特性进行了相应的研究。研究表明所设计的波导结构具有较强的局域场限制,通过在孔内填充增益介质,使混合等离子体波导的传输损耗得到了补偿,输出端的表面等离子激元实现了增益放大。结果表明,通过调整波导的几何参数和电磁参数,可以显著提高波导的场限制,降低波导本身的损耗,其中当孔与金属之间距离为44 nm时,波导的损耗达最小约为-13 dB/m。这一设计可以为光子器件集成提供一定的理论和实验借鉴价值。     

双层介质加载等离子体微环的高灵敏生物传感

为了提高介质加载表面等离子体的传输距离,提出了基于双层介质加载的表面等离子体波导结构。利用有限元方法研究了介质加载的表面等离子体波导的模场分布及传输特性,并对其传感应用的波导灵敏度进行了分析。研究表明, 当低折射率介质厚度占波导总厚度的33%时,传输距离是单层介质加载表面等离子体波导的2.4倍。利用该波导结构组成的微环谐振腔被用于生物传感研究,其传感特性分析表明,传感灵敏度为411 nm/RIU,检测极限为1.210-5 RIU。双层混合介质加载表面等离子体波导的设计和研究为其进行无标记生物传感应用提供了有价值的指导。     

集成光学多通道交叉波导单元的设计分析

采用基于帕德算子的宽角多步有限差分光束传播算法模拟双通道交叉波导单元光场传输特性,讨论了交叉角度对交叉单元分支波导输出光功率和波导间串扰的影响.结果表明,交叉角很小时,直波导的功率输出变化不稳定,相邻波导间串扰大.交叉角大于5°时,直波导的归一化输出光功率超过0.9,且随着交叉角增大而逐渐增大至趋于稳定,相邻波导间的串扰非常小.随后,以三通道和五通道交叉波导为例分析了多通道交叉波导单元.     

波纹圆形槽波导的导体损耗特性

计及了空间谐波和槽内高阶模的影响,文中推导了波纹圆形槽波导传输主模HE(1)11的导体损耗计算公式.在一阶近似的条件下,给出了衰减常数随工作频率、波导内径和波纹凹槽内外径之比的变化曲线.结果表明,波导的纵向开槽可有效地降低波导的导体损耗.此外,随着内壁上波纹凹槽的内外径之比由大而小,衰减常数将在更大的波导内径下取得极小值,这提示器件的传输功率容量将可得到提高.     

条形介质加载型表面等离子体波导传输特性的研究

采用二维时域有限差分(FDTD)法,分析对比了 介质-金属(IM)结构和金属-介质-金属(MIM) 结构波导对光波传输特性的影响,以及通过对IM结构的尺寸、折射率进行优化得到最佳传 输长度。数值 结果表明,IM结构波导能使光波传输距离更长。对IM波导结构研究发现,当介质层厚为 300nm,金属 层厚为200nm时,传输效果最佳。基于这个参数的IM结构,计算介质 层折射率对IM波导光传输特性的影响发现,介质层折射率为1.5时, 在模场约束较好的情况下,传输损耗降低,表面等离 子体波的传输长度最长。整体优化后的条型波导可以实现最大传输距离为37μm。这一设计和优化波导结构 参数的方法不仅拓宽了介质加载型表面等离子体激元(SPP)波导结构的理论基础,在纳米光 学集成器件研究上也具有一定的应用潜能。     

一种基于过模波导的高功率8 mm微波传输系统

过模波导是一种突破传统单模波导功率容量的波导结构。在高功率微波系统中,基于过模波导的模式过渡器和模式滤波器都是传输系统的关键器件。本文讨论了这些器件的理论设计依据,并设计了一套包括过模波导、模式过渡器、模式滤波器的8 mm 高功率过模波导传输系统,其中,模式滤波器分别通过膜片和窄缝滤除高次模。并用 CST Microwave Studio建模并仿真。仿真结果表明,该过模传输系统能够有效抑制高次模带来的谐振效应,提高微波的传输效率。     

基于光子晶体多模波导的1．31／1．55μm双波长功分器的设计

设计了一种基于光子晶体多模波导的双波长光功分器,该器件能同时实现1.31 μm和1.55μm两种通信波长的光信号功率的平均分配,整个器件长度仅为15μm,是已报道的常规结构的182分之一.根据导模传输法,讨论了对称入射时光子晶体多模波导中的自映像效应,采用时域有限差分法模拟了光场在波导中的分布,入射场的单重像和二重像交替在波导中周期性地出现.并讨论了功分器的输出效率,及输出效率随位于单模波导与多模波导联结处的介电柱位置变化而产生的变化.     

新型直波导阵列波导光栅的设计与仿真

提出了一种基于直波导的新型阵列波导光栅(AWG).与常规阵列波导光栅器件相比,该方法简化了器件结构与制备工艺,有望提高器件成品率,降低器件制作成本.器件的输入/输出耦合器采用自聚焦平板波导(GISLAB),其输入/输出均为平端面.阵列波导采用直波导取代常规AWG的弯曲波导,可采用光敏平板波导材料通过两次紫外写入实现.采用半矢量光束传输法对器件进行模拟,结果表明该器件可以实现多波长的解复用,其解复用的信道间隔为3.2 am,输出光谱非均匀性约为1.6 dB.     

基于肖特基阻性二极管的140 GHz二倍频器

介绍了一种基于肖特基阻性Z-极管的140GHzZ-倍频器,该倍频器采用矩形波导内嵌石英基片微带电路,通过四肖特基结正向并联结构提高驱动功率承受能力。倍频设计中应用了自建精确二极管三维电磁模型、宽带电磁耦合结构和宽带阻抗匹配结构,以提高仿真结果和实际器件的吻合度。测试结果表明：在频率为65GHz一75GHz,功率为20dBm的驱动信号激励下,二倍频器输出频率为130GHz～150GHz,输出功率为3．3dBm～8．0dBm,倍频损耗为11．7dB～16．3dB。在23dBm-24dBm的最大驱动功率激励下,倍频器最大输出功率达11．2dBm／136GHz,基本达到了成像雷达的应用性能指标。     

A circuit, waveguide, and spatial power combiner formillimeter-wave amplification

A new concept for a millimeter-wave amplifier that uses circuit, waveguide, and spatial power combining is demonstrated. The passive array has a free-space-to-microstrip insertion loss below -1.5 dB from 30 to 44 GHz. Small-signal measurements of the active array reveal an average gain of 5 dB from 41 to 46 GHz and a maximum gain of 6.4 dB at 45.6 GHz. Large-signal measurements reveal a linear power gain of 2 dB and an output power of 23.7 dBm at the 1-dB compression point at 44 GHz     

Efficient generation of guided millimeter-wave power by photomixing

A 70-GHz bandwidth commercial photodiode has been coupled to W-band waveguide and used as a photomixing source from 75 to 170 GHz. Maximum power conversion efficiency of 1.8% was obtained at 75 GHz, where an optical input of +10 dBm yielded a nonsaturated millimeter-wave (mm-wave) power of -7.5 dBm. Optimizing the photomixer backshort tuning at individual frequencies showed that the mm-wave power decreased with frequency to a level of -30 dBm at 170 GHz. Fixed tuning allowed the generation of power across the full waveguide band from 75 to 110 GHz, with a variation within 5 dB across the majority of the band     

A Broadband CMOS Frequency Tripler Using a Third-Harmonic Enhanced Technique

A third harmonic enhanced technique is proposed to implement a broadband and low-phase-noise CMOS frequency tripler. It nonlinearly combines a pair of differential fundamental signals to generate deep cuts at the peaks of the fundamental waveform, resulting in a strong third harmonic frequency output. This mechanism has inherent suppression on the fundamental and the other harmonics so that only a low-Q high-pass filter on the lossy silicon substrate is applied at the output to further reject the fundamental and the second harmonic frequencies, in contrast to the high-Q filters used in most of the previous tripler designs. The fabricated circuit using 0.18 m CMOS technology is compact and has an input frequency range from 1.7 GHz to 2.25 GHz, or an output frequency range from 5.1 GHz to 6.75 GHz, resulting in about 28% frequency bandwidth. The optimum conversion loss from the tripler is 5.6 dB (27.5% efficiency) at an input power of 2 dBm. The suppressions for the fundamental, second and fourth harmonics in the measurement are better than 11 dB, 9 dB, and 20 dB within an input power range from 2 dBm to 7 dBm.     

毫米波倍频上变频功放组件

该组件是将输入信号 (1 5 GHz,1 0 d Bm)倍频至 3 0 GHz,与本振信号 (5 GHz,1 0 d Bm)上变频到 3 5 GHz,然后进行功率放大输出。其倍频部分采用 Ga As PHEMT有源倍频并进行放大 ,混频电路采用 Ga As二极管的双平衡混频 ,滤波放大后由 8mm波导输出。最终结果为输出频率为 3 5 GHz,输出功率为 1 7d Bm,谐波抑制度大于 40 d BC,偏离中心频率± 2 0 0 MHz带宽内 ,幅度不平坦度小于 1 .5 d B。整个组件尺寸仅为 60 mm×2 2 mm× 1 5 mm。     

A 1.1 V 6.2 mW,wideband RF front-end for 0 dBm blocker tolerant receivers in 90 nm CMOS

This paper presents the design and implementation of a low power, highly linear, wideband RF front-end in 90 nm CMOS. The architecture consists of an inverter-like common gate low noise amplifier followed by a passive ring mixer. The proposed architecture achieves a high linearity in a wide band (0.5–6 GHz) at very low power. Therefore, it is a suitable choice for software defined radio (SDR) receivers. The chip measurement results indicate that the inverter-like common gate input stage has a broadband input match achieving S11 below −8.8 dB up to 6 GHz. The measured single sideband noise figure at an LO frequency of 3 GHz and an IF of 10 MHz is 6.25 dB. The front-end achieves a voltage conversion gain of 4.5 dB at 1 GHz with 3 dB bandwidth of more than 6 GHz. The measured input referred 1 dB compression point is +1.5 dBm while the IIP3 is +11.73 dBm and the IIP2 is +26.23 dBm respectively at an LO frequency of 2 GHz. The RF front-end consumes 6.2 mW from a 1.1 V supply with an active chip area of 0.0856 mm².     

Design and Analysis of a 0.01-to-6GHz 31dBm-P1dB 31.5％-PAE Distributed Power Amplifier in 0.25-μm GaAs Technology

This paper presents the design and analysis of a distributed power amplifier with 6-dB bandwidth from 10MHz to 6GHz. To meet the stringent targeted specification, the concurrent design and analysis are carefully performed with optimizations in both passive and active devices. The gate capacitive division technique is proposed and proven theoretically of bandwidth extension effect and power efficiency enhancement. To validate the theory, a prototype is designed in a 0.25-μm GaAs technology. The fabricated amplifier chip is packaged in an evaluation cavity of SMA connectors. The measurement shows an average power gain of 15dB, OP1dB and PSAT of 31dBm and 32.6dBm at 3GHz, and PAE at OP1dB and PSAT points are 31.5％and 43.7％respectively. To the best of authors' knowledge, the amplifier achieves the highest Power-added efficiency (PAE) among the similar GaAs amplifiers.     

Design and Development of Thermistor based Power Meter at 140 GHz Frequency Band

Design and development of thermistor based power meter at 140 gigahertz (GHz) frequency band have been presented. Power meter comprises power sensor, amplifier circuit and dialog based graphical user interface in visual C++ for the average power measurement. The output power level of a component or system is very critical design factor. Thus there was a need of a power meter for the development of millimeter wave components at 140 GHz frequency band. Power sensor has been designed and developed using NTC (Negative Temperature Coefficient) thermistors. The design aims at developing a direct, simple and inexpensive power meter that can be used to measure absolute power at 140 GHz frequency band. Due to absorption of 140 GHz frequencies, resistance of thermistor changes to a new value. This change in resistance of thermistor can be converted to a dc voltage change and amplified voltage change can be fed to computer through data acquisition card. Dialog based graphical user interface (GUI) has been developed in visual C++ language for average power measurement in dBm. WR6 standard rectangular waveguide is the input port for the sensor of power meter. Temperature compensation has been achieved. Moderate sensor return loss greater than 20 dB has been found over the frequency range 110 to 170 GHz. The response time of the power sensor is 10 second. Average power accuracy is better than ±0.25 dB within the power range from −10 to 10 dBm at 140 GHz frequency band.     

Millimeter-Wave Transition From Waveguide to Two Microstrip Lines Using Rectangular Patch Element

A millimeter-wave transition from a waveguide to two microstrip lines and the design methodology are proposed. A rectangular patch element in a short-terminated waveguide is analyzed by the cavity model of a patch antenna and the dyadic Green's function of the waveguide. The analysis points out that the rectangular patch element has an optimum width for wideband, which only has the function of the broad wall width of the waveguide. The transition also works as a divider. A numerical investigation of a transition having two microstrip lines validates the analytical model in terms of wideband, and indicates that the distance between the two microstrip lines has an optimum length for suppressing higher order modes. A prototype transition exhibits an insertion loss of 0.5 dB from 76 to 77 GHz, and a bandwidth of 6.9% (5.29 GHz) for the reflection coefficient below -15 dB for the waveguide port     

220 GHz 二次谐波混频器集成模块

在220 GHz二次谐波混频器的设计基础上,提出中频传输波导的垂直转换结构,实现了四通道混频器集成模块方案,缩短了混频器单通道的横向尺寸,为太赫兹接收机系统多通道线阵列集成提供了可行性方案。为优化系统模型的准确性,基于TCAD对肖特基势垒二极管进行三维半导体器件建模计算,依据提取的关键特性参数进行混频器的高频电磁波仿真。通过对该设计方案进行测试,结果表明:当本振频率为110 GHz,功率为7 dBm,射频输入200~240 GHz,混频器的单边带变频损耗为8.6~13 dB,在204~238 GHz的单边带变频损耗为8.6~11.3 dB。当本振频率为108 GHz时,驱动功率仅需3 dBm。此外,基于该混频器模块构建的220 GHz接收机系统,积分时间为700 μs时其温度灵敏度为1.3 K。