用深能级瞬态谱法测量GaAS MESFET中的深能级

本文介绍了用深能级瞬态谱(DLTS)法测量GaAs MESFET的深能级杂质和缺陷。在有源层中一般没有测到深能级杂质和缺陷,但在有源层与缓冲层界面附近测到了多个空穴陷阱和电子陷阱。其中空穴陷阱的能级有0.41eV、0.53eV、0.68eV、0.91eV;电子陷阱的能级有0.30eV、0.44eV、0.84eV。并对部分陷阱的性质作了初步的讨论。     

MOCVD生长的硅衬底上GaAlAs/GaAs单量子阱和多量子阱激光器深能级研究

应用深能级瞬态谱(DLTS)技术研究经MOCVD生长的硅衬底上GaAlAs/GaAs 单量子阱和多量子阱激光器深能级.样品的 DLTS谱表明,在激光器的量子阱和 n-GaAlAs 限制层里均存在着一个浓度和俘获截面较大的高温电子陷阱,该陷阱可能与MOCVD生长工艺和质子轰击引进的损伤有关,它直接影响激光器的性能.DX中心和高温电子陷阱在量子阱里可能局域在GaAlAs/GaAs层的界面附近.     

n-InP中深能级的研究

本文主要利用夹有薄氧化层、势垒高度约为0.65eV的Au/InP肖特基势垒来研究未掺VPE n-InP、未掺及轻掺Fe InP体材料中的深能级.共测到七个电子陷阱和两个空穴陷阱,对其中两个电子陷阱进行了详细的研究.我们在掺Fe晶体中测到一个电子发射激活能为0.69eV的电子陷阱,考虑到其中包含有0.050eV的俘获势垒,则能级值应为0.64eV,这与用Hall方法在掺Fe半绝缘材料中发现的0.65eV能级较一致,所以我们认为该能级与铁有关.另外在所有的材料中都存在0.62eV的电子陷阱,估计该能级与本征缺陷有关.     

钒受主能级在n型4H-SiC中的深能级瞬态傅里叶谱和光致发光

借助深能级瞬态傅里叶谱研究了钒离子注入在SiC中引入的深能级陷阱.掺人的钒在4H-SiC中形成两个深受主能级,分别位于导带下0.81和1.02eVt处,其电子俘获截面分别为7.0 × 10-16和6.0×10-16cm2.对钒离子注入4H-SiC样品进行低温光致发光测量,同样发现两个电子陷阱,分别位于导带下0.80和1.6eV处.结果表明,在n型4H-SiC掺入杂质钒可以同时形成两个深的钒受主能级,分别位于导带下0.8±0.01和1.1±0.08eV处.     

钒受主能级在n型4H-SiC中的深能级瞬态傅里叶谱和光致发光

借助深能级瞬态傅里叶谱研究了钒离子注入在SiC中引入的深能级陷阱.掺人的钒在4H-SiC中形成两个深受主能级,分别位于导带下0.81和1.02eVt处,其电子俘获截面分别为7.0 × 10-16和6.0×10-16cm2.对钒离子注入4H-SiC样品进行低温光致发光测量,同样发现两个电子陷阱,分别位于导带下0.80和1.6eV处.结果表明,在n型4H-SiC掺入杂质钒可以同时形成两个深的钒受主能级,分别位于导带下0.8±0.01和1.1±0.08eV处.     

高温退火处理提高半绝缘VGF-GaAs单晶的电学性能

垂直梯度凝固法(VGF)生长的低位错半绝缘(SI)GaAs单晶存在电阻率和迁移率低、电学补偿度小、均匀性差等问题.在3种不同温度条件下,对VGF-SI-GaAs晶片进行了加As压的闭管退火处理.结果表明,经过1160℃/12h的高温退火处理后,VGF-SI-GaAs单晶的电阻率、迁移率和均匀性均得到了显著提高.利用Hall、热激电流谱(TSC)、红外吸收法分别测试分析了原生和退火VGF-SI-GaAs单晶样品的电学性质、深能级缺陷、EL2浓度和C浓度,并与常规液封直拉法(LEC)SI-GaAs单晶样品进行了比较.原生VGF-SI-GaAs单晶巾的EL2浓度明显低于LEC-SI-GaAs单晶,经过退火处理后其EL2浓度显著增加,电学补偿增强,而且能级较浅的一些缺陷的浓度降低,因而有效提高了其电学性能.     

SI-GaAs单晶中深能级陷阱退火特性研究

研究了LEC-SI-GaAs单晶热处理前后深能级陷阱的变化,比较了原生晶体在不同条件的热退火后SI-GaAs单晶中深能级陷阱的特性,分析了产生变化的原因,并讨论了LEC-SI-GaAs中两个主要深能级陷阱EL2和EL6的可能构型.     

高温退火处理提高半绝缘VGF-GaAs单晶的电学性能

垂直梯度凝固法(VGF)生长的低位错半绝缘（SI) GaAs单晶存在电阻率和迁移率低、电学补偿度小、均匀性差等问题. 在3种不同温度条件下,对VGF-SI-GaAs晶片进行了加As压的闭管退火处理. 结果表明,经过1160℃/12h的高温退火处理后,VGF-SI-GaAs单晶的电阻率、迁移率和均匀性均得到了显著提高. 利用Hall、热激电流谱（TSC) 、红外吸收法分别测试分析了原生和退火VGF-SI-GaAs单晶样品的电学性质、深能级缺陷、EL2浓度和C浓度,并与常规液封直拉法（LEC) SI-GaAs单晶样品进行了比较. 原生VGF-SI-GaAs单晶中的EL2浓度明显低于LEC-SI-GaAs单晶,经过退火处理后其EL2浓度显著增加,电学补偿增强,而且能级较浅的一些缺陷的浓度降低,因而有效提高了其电学性能.     

Sl-GaAs单晶的热稳定性研究

SI-GaAs衬底材科的热稳定性对于用直接离子注入工艺制作GaAs场效应器件及集成电路是至关重要的.本文采用变温霍耳效应测量、光注入瞬态电流谱(OTCS)和原子吸收光谱等方法研究了热稳定性差的不掺杂LEC SI-GaAs单晶.结果表明,原子吸收光谱分析发现此晶体存在6.7×10~(15)cm~(-3)Fe杂质,其他两种方法观察到一个～0.62eV深能级.文中推测这是与杂质Fe有关的深受主,认为它对不掺杂LBC SI-GaAs单晶的热稳定性可能有重大影响.     

空间生长的GaAs单晶的结构特性观察

为了提高砷化镓单晶的完整性和均匀性,中科院半导体研究所和航天部501所合作,在太空中完成了从熔体生长砷化镓单晶的实验。用电解腐蚀,透射电子显微镜(TEM)和阴极莹光(CL)对地面籽晶部分和空间重熔晶体部分的结构性质进行了比较性现察,实验结果如下:1)用KOH溶液电解腐蚀完成了对该晶体的杂质条纹显示,结果表明:地面生长的单晶有明显的杂质条纹,空间生长的晶体中无杂质条纹(图1)。2)在地面籽晶和空间生长晶体的界面处存在一个晶体完整性较高的区域。CL形貌相上显示出亮带(图2)。TEM观察发现界面区的微缺陷浓度远低于基体,存在一个宽度至少为5μm的“清洁区”,在     

Electrically Active Defects in GaN Layers Grown With and Without Fe-doped Buffers by Metal-organic Chemical Vapor Deposition

Electrically active defects in n-GaN films grown with and without an Fe-doped buffer layer have been investigated using conventional and optical deep-level transient spectroscopy (DLTS). Conventional DLTS revealed three well- defined electron traps with activation energies E _a of 0.21, 0.53, and 0.8 eV. The concentration of the 0.21 and 0.8 eV defects was found to be slightly higher in the sample without the Fe-doped buffer, whereas the concentration of the 0.53 eV trap was higher in the sample with the Fe-doped buffer. A minority carrier trap with E _a ≈ 0.65 eV was detected in both samples using optical DLTS; its concentration was ∼40% higher in the sample without the Fe-doped buffer. Mobility spectrum analysis and multiple magnetic-field measurements revealed that the electron mobility in the topmost layer of both samples was similar, but that the sample without the Fe-doped buffer layer was affected by parallel conduction through underlying layers with lower electron mobility.     

A DLTS analysis of electron and hole traps in VPE grown n-GaAs using schottky barrier diodes

Capacitance lock-in amplifier deep level transient spectroscopy (DLTS) using Schottky barrier diodes (SBD’s) was used to characterize the electron and hole traps in VPEn-GaAs (N_D - N_A = 1 - 2 x 10¹⁵/cm³) layers grown on n⁺ (10¹⁸/cm³) GaAs substrates. The main electron traps observed were the EL2 atE _c - 0.81 eV and a level atE _c - 0.48 eV. The use of large forward bias electrical injection pulses (and no optical excitation) facilitated the detection of hole traps, of which the defect with an energy level atE _v + 0.42 eV, speculated to be Cu-related, was present in the highest concentration.     

Electrical properties and deep levels in bulk solution grown GaAs crystal

Electrical and photoelectrical properties, deep levels spectra and microcathodoluminescence spectra were measured for bulk high-resistivity GaAs samples grown from Ga-rich solution by a synthesis solute diffusion technique. It is shown that the main portion of the grown crystal is high-resistivity p-type with electrical properties determined by deep hole traps with the level near 0.43 eV from the valence band edge. The density of these 0.43 eV hole traps was shown to decrease with increasing distance from the crystallization front and the traps were associated with the deep hole traps observed earlier in Ga-rich liquid-phase-epitaxy-grown films. The single crystalline end portion of the crystal was semi-insulating n-type with a very low (some 10¹⁴ cm⁻³) concentration of midgap EL2 donors. This end portion of the crystal was characterized by a very high photosensitivity. Possible advantages of the use of such material in radiation detectors are briefly discussed.     

Electrical characteristics of a 6H-SiC epitaxial layer grown by chemical vapor deposition on porous SiC substrate

Porous SiC (PSC) has been proposed as a buffer layer for reducing defects in epitaxial SiC layers. In this study, electrical characteristics of a 6H-SiC epitaxial layer grown by chemical vapor deposition on a porous SiC substrate (SiC-on-PSC) have been compared to those simultaneously grown on a standard SiC substrate (SiC-on-STD). Schottky barrier diodes (SBDs) have been fabricated on both epitaxial layers and then investigated with temperature-dependent current-voltage (I-V), capacitance-voltage (C-V), and deep-level transient spectroscopy (DLTS) measurements. The SBDs on both SiC-on-PSC and SiC-on-STD show about the same I-V and C-V characteristics, and at least four electron traps, i.e., B (0.75 eV), C (0.63 eV), D (0.40 eV), and E (0.16 eV), can be identically found in both SBDs by DLTS measurements. Thus, we conclude that the electrical quality of SiC-on-PSC is comparable to that of SiC-on-STD, and that the higher breakdown voltages observed in SBDs on SiC-on-PSC are not obviously related to a different defect structure.     

Capacitance study of electron traps in low-temperature-grown GaAs

Electron traps in GaAs grown by MBE at temperatures of 200–300°C (LT-GaAs) were studied. Capacitance deep level transient spectroscopy (DLTS) was used to study the Schottky barrier on n-GaAs, whose space-charge region contained a built-in LT-GaAs layer ∼0.1 μm thick. The size of arsenic clusters formed in LT-GaAs on annealing at 580°C depended on the growth temperature. Two new types of electron traps were found in LT-GaAs layers grown at 200°C and containing As clusters 6–8 nm in diameter. The activation energy of thermal electron emission from these traps was 0.47 and 0.59 eV, and their concentration was ∼10¹⁷ cm⁻³, which is comparable with the concentration of As clusters determined by transmission electron microscopy. In LT-GaAs samples that were grown at 300°C and contained no arsenic clusters, the activation energy of traps was 0.61 eV. The interrelation between these electron levels and the system of As clusters and point defects in LT-GaAs is discussed. __________ Translated from Fizika i Tekhnika Poluprovodnikov, Vol. 38, No. 4, 2004, pp. 401–406. Original Russian Text Copyright ? 2004 by Brunkov, Gutkin, Moiseenko, Musikhin, Chaldyshev, Cherkashin, Konnikov, Preobrazhenskii, Putyato, Semyagin.     

Interface properties and deep levels in InGaAsN/GaAs and GaAsN/GaAs heterojunctions

Interface properties of dilute slightly lattice mismatched GaAsN/GaAs (0.35 at.% N) and closely lattice matched InGaAsN (1 at.% In, 0.35 at.% N) heterojunctions (HJs) were studied by means of capacitance–voltage profiling, deep levels transient spectroscopy (DLTS) and current–voltage measurements. It is found that the lattice matched HJs show no electrical breakdown when the space charge region crosses the interface. The carrier concentration profiles in such HJ show, as expected, the accumulation region on the low-bandgap side and the depletion region on the high-bandgap side of the HJ. This is not the case for the GaAsN/GaAs (GaAsN layer on top) and the GaAs/GaAsN (GaAs layer on top) HJ. The density of deep traps in GaAsN, InGaAsN films and in GaAs films grown on GaAsN underlayers was very much higher than in epitaxial GaAs films. The dominant deep centers were the EL6 and the EL3 electron traps. The interface regions of the GaAs/GaAsN and the InGaAsN/GaAs HJs were shown to be enriched by EL3 traps, while for the GaAsN/GaAs HJ those regions were enriched by EL6 traps which was associated with the former films being Ga-rich and thus facilitating incorporation of oxygen on As sites.     

Study of grown-in deep-level defects vs growth parameters in GaAs grown by VPE technique

Studies of the grown-in deep level defects vs substrate orientation and gas phase stoichiometry in the VPE GaAs grown by a novel Ga/AsCl₃/H₂ reactor has been made, using DLTS and C-V methods. Density of electron traps vs Ga/As ratio (i.e., 2/1, 3/1, 4/1, 5/1, and 6/1) was determined for epilayers grown on (100), (211A), and (211B) oriented semi-insulating Cr-doped GaAs substrates. Two electron traps with energies of E_c-0.71 eV (i.e., EB-4) and E_c-0.83 eV (i.e., EL-2) were observed in the samples studied. Results showed that density of both electron traps depends strongly on the Ga/As ratio for the (211A) oriented samples, and less strongly for the (100) oriented samples. In both cases, however, the defect density was found to decrease with increasing Ga/As ratio. This result was consistent with the published data in GaAs grown by the VPE, MOCVD, and LEC techniques. Combined thermal and recombination enhanced annealing study on these VPE GaAs specimens showed a significant reduction in the density of the EB4 level and a little reduction in the density of the EL2 level. This Research suported by the Air Force Office of Scientific Research under grant No. AFOSR-81-0187A. Supported by Wright Patterson AFB, under contract No. FF33615-81-C1406.     

Studies of deep centers in dilute GaAsN and InGaAsN films grown by molecular beam epitaxy

Deep levels spectra DLTS, 77 K photoluminescence (PL) spectra and photosensitivity were measured for GaAsN and InGaAsN films with low N and In concentration grown by molecular beam epitaxy and in GaAs films grown on GaAsN buffer. It is shown that the bandedge luminescence intensity is greatly decreased in GaAsN, GaAs/GaAsN and particularly in InGaAsN structures compared to the homoepitaxial GaAs. Comparison of the DLTS and PL spectra strongly suggests that the main recombination center in such films is the EL3-like electron trap whose concentration greatly increases upon In and N incorporation into the solid solution. Based on published results the trap is associated with substitutional oxygen on As site and the results are discussed in view of such possible assignment.     

Electron traps created by high temperature annealing in MBE n-GaAs

An electron trap with a thermal activation energy of 0.83 eV from the conduction band is common in the deep level transient spectroscopy (DLTS) spectra of vapor phase epitaxial (VPE) n-GaAs, but is not observed in the DLTS spectra of as-grown molecular beam epitaxial (MBE) n-GaAs. We show here that this trap is created during high temperature annealing of MBE samples with a Si₃N₄, encapsulant. The trap concentration is correlated with the annealing temperature and time, suggesting the outdiffusion of a constituent atom resulting in the formation of a vacancy or vacancy-complex. Other electron traps observed in the DLTS spectra of asgrown MBE n-GaAs are annealed out for temperatures at or above 800° C.     

DLTS characterisation of InGaAlP films grown using different V/III ratios

Deep levels in InGaAlP films grown using two different V/III ratios have been studied by employing deep level transient spectroscopy (DLTS). The two samples investigated have the same composition of (Al_0.3Ga_0.7)_0.51In_0.49P and a film thickness of 0.6 μm, but grown with V/III ratios 75 and 50. Two defect levels with activation energies 0.23 and 0.78 eV are detected by temperature-scan DLTS in the sample with a V/III ratio of 75, with the 0.78 eV level being the dominant peak. Their respective capture cross-sections are 1.2×10⁻¹⁶ and 3.8×10⁻¹³ cm⁻². The 0.78 eV trap level is also analysed using isothermal DLTS measurement and similar values of thermal signatures are obtained. The DLTS spectrum of the 0.78 eV trap level has been found to be broader than that expected for a point-type defect, implying that it may be associated with a complex or extended defect. The observation of logarithmic capture mechanism further supports this speculation. On the other hand, no peak corresponding to the 0.23 eV level appears in isothermal DLTS spectra, which is possibly due to the severe temperature dependence of capture rate and the system's limitation in the high-frequency regime. For the sample with a V/III ratio of 50, only one dominant electron trap level, with an activation energy of 0.42 eV and a capture cross-section of 1.4×10⁻¹⁷ cm⁻², is detected by isothermal DLTS method.