鉴相器频率对调频连续波信号线性度影响

研究了一种通过快速改变锁相环分频比产生调频连续波信号的方案,讨论了锁相环中鉴相器频率对信号线性度的影响.使用ADS进行建模仿真,通过对仿真结果的分析,得出结论,在适当小的分频比跳变间隔,可以产生精度高、线性度好的调频信号;鉴相器频率越高,产生的调频信号的调频线性度越好.     

基于锁相跟踪技术的宽带线性调频产生方法研究

为满足脉冲压缩体制高分辨率雷达对宽带线性调频信号的需求,解决基于数模转换、压控振荡器、变频(或倍频)等传统技术产生方法带来的带宽有限、线性度差、新调制信号产生(杂散恶化)等问题,提出了一种新型的宽带线性调频信号的产生方法,并通过电路设计和实现验证了该调频源的性能指标。应用该方法研制的宽带线性调频源工作在C 波段,频率带宽优于2. 5 GHz,相对带宽优于46. 3%,调频源获得了8. 8×10-4 良好的频率线性度,同时该调频源具有小型化和低功耗特点。     

MSM激光距离成像雷达中线性调频信号的产生

MSM激光距离成像雷达将微波雷达中调频测距原理应用到激光雷达,采用一个线性调频的射频副载波调制激光输出强度。本文提出了雷达中调频信号发生器产生宽带线性调频信号的设计思路,并着重阐述DDS+PLL实现宽带线性调频的过程。首先建立四阶二型锁相环架构,分析其对DDS产生的线性扫频信号实现频率稳态跟踪的可能性,然后进行锁相环锁频的初步仿真并得到环路基本参数,最后在输入DDS产生的线性扫频信号前提下仿真环路的频率跟踪性能。仿真结果表明四阶二型锁相环实现了对DDS产生的线性扫频信号的频率跟踪及频带扩展,满足了雷达距离精度对线性调频信号的宽频带要求。     

基于FPGA的线性调频信号产生器设计

线性调频信号是雷达系统广泛应用的一种信号,通过脉冲压缩处理,可以得到良好的距离分辨率和径向速度分辨率。本文在研究DDS原理的基础上,给出了一种基于FPGA技术的线性调频信号产生器的设计方案,并利用Ahera公司的cyclone Ⅱ系列芯片和QuartusⅡ开发软件对设计进行了仿真验证。采用FPGA技术可以方便地通过修改编程参数,对线性调频信号的起始频率、带宽、频率分辨率进行修改。仿真结果表明,该设计能够产生符合要求的线性调频信号,并且具有结构简单、集成度高、易于修改等特点。     

基于dsPIC和FPGA的可控线性调频信号源设计

设计一种新型线性调频信号源,该信号源有别于应用直接数字频率合成（DDS）产生线性调频信号的方法,并且可对信号的起止和幅度进行控制。该设计可通过dsPIC,对由MATLAB根据线性调频公式计算出数据点后嵌入FPGA中的ROM所产生的线性调频信号进行起止以及幅度的控制。仿真和实验结果表明,该设计具有易实现,信号参数可时变性高,信号幅度、相位可预失真等特点。     

信道化IFM接收机中LFM信号的接收

对信道化瞬时测频接收机接收线性调频信号的处理增益、跨信道合并和参数测量等问题进行了讨论.首先,处理增益的分析证明信道化接收机仍能有效提高信道化线性调频信号的信噪比;其次,基于调频信号的瞬时频率连续性合并线性调频信号在多个子信道的分裂输出;最后,使用最小二乘方法从瞬时频率序列估计线性调频信号的参数.跨信道合并和参数估计方法都可以在实时计算场合应用,仿真结果显示了其在大于-5 dB的输入信噪比下仍然有效.     

一种性能良好的线性调频信号的产生方法

介绍一种产生窄脉冲调制激励信号，并通过它激励声表面波器件产生所需线性调频信号的方法。该方法的电路结构简单，性能优良，载频分量抑制达７０ｄＢ以上，对其它电路干扰小，产生的线性调频信号频率高，频带宽，时宽大。     

宽带线性调频信号的性能检测方法

宽带线性调频频率源设计完成后,需要检测频率源的性能,解决检测过程中遇到的问题,提出一套工程上适用的宽带线性调频信号的性能检测方法。首先,根据相位残差曲线(测试信号与理想信号的相位差)的形状对匹配滤波器参数(主要是调频斜率)定性调整,能够快速得到最佳的脉冲压缩结果。然后从数学上证明这种方法的正确性。最后应用数字相位补偿的方法进一步提升宽带调频信号的脉冲压缩性能。实验证明,后期的数字补偿方法对非理想线性调频信号的压缩结果有较大的改善作用。文中测试数据来源于自行研制的频率源产生的1GHz宽带线性调频信号。     

DDS调频转换速率对脉冲压缩性能的影响

直接数字合成技术（DDS）可以灵活地产生点频、线性调频、频移键控等多种信号，越来越多的DDS芯片被应用于射频系统设计中。为了获得更高的距离分辨率，机载合成孔径雷达（SAR）需要更大的信号带宽。受限于DDS芯片的调频转换速率，在大带宽下，DDS产生的线性调频信号相比理论信号可能存在频率失真。讨论了主流DDS芯片的选择和信号产生方案的设计。利用MATLAB软件仿真了调频转换速率对脉冲压缩的影响，并在实际系统中验证了仿真结果。该方法可以评估在给定硬件条件下信号产生方案的可行性，对信号产生的频率和器件选择有一定的参考意义。     

高分辨雷达信号分析与比较

宽带雷达信号可以获得高距离分辨力,如何针对不同的应用场合选择合适的宽带信号就显得十分重要。本文对线性调频信号、步进频率信号和线性调频步进信号这三种高分辨信号作了逐一分析,利用模糊函数讨论了它们的分辨力、距离-多普勒耦合等性能,介绍了每种信号的高分辨处理方法,并且研究了ISAR成像处理时目标运动所产生的影响及其补偿方法。     

高线性度低频压控振荡器的设计

文章提出了一种由积分器、比较器以及控制电路和逻辑电路构成的压控振荡器，并对其低频线性度、结构特性等性能进行了较为深入的分析。利用xFAB xdm10工艺模型在spectre上的模拟结果表明．由于采取内部补偿措施，可在相当低的频段内（20KHz～1．5MHz）将其线性误差从1．68％降低到了0．4％；同时，这种经过改进的压控振荡器很好地解决了低频噪声和低频线性度的问题，消除了放电误差，适用于精密的工业控制场合。     

基于多普勒回波包络进行目标识别的扫频线性度研究

本文提出的基于多普勒回波包络的弹载雷达系统目标识别方法,与基于一维距离像直接平均的目标识别方法进行了比较,着重分析了扫频的线性度影响,模拟结果表明本方法在扫频线性度变差的情况下仍有较好的识别效果。     

Finite-Impulse-Response Digital Differentiators for Midband Frequencies Based on Maximal Linearity Constraints

Maximally linear digital differentiators (DDs) are known for high accuracy in narrow frequency bands centered at the frequency for which they are designed. In this paper, designs of DDs of odd and even lengths having maximal linearity at the middle of the frequency band are presented. Applying the maximal linearity constraints to the magnitude response of a differentiator gives a system of linear equations, which can be solved for the impulse response coefficients of the differentiator. It is observed that the coefficient matrices of these equations are Vandermonde matrices, and this helps in finding the solution of the equations in closed form. Design examples are presented to show the accuracy of the presented designs, and it is observed that even-length designs are more accurate in a significantly wider frequency band as compared with odd-length designs     

Linearity of bulk-controlled inverter ring VCO in weak and strong inversion

In this paper linearity of frequency modulation in voltage controlled inverter ring oscillators for non feedback sigma delta converter applications is studied. The linearity is studied through theoretical models of the oscillator operating at supply voltages above and below the threshold voltage of a transistor, bringing the transistors in respectively strong and weak inversion. The theoretical results are tested with more advanced models through spectreRF simulations. A soft rail approach implemented to improve linearity in weak inversion is proposed and demonstrated. The influence from voltage noise, process variations and temperature variations have also been simulated to indicate the advantages of having the soft rail bias transistor in the VCO.     

用步进锁相扫描技术改进VCO线性及调频带宽稳定性

选用HMC703LP4E小数频率综合器与专门设计的有源环路滤波器和商用VCO构成了步进扫描数字锁相环,改进了调频连续波的调频带宽稳定性和调频线性度。对设计的电路进行了制作和测试,实验结果表明在-30^+70℃温度范围内,调频信号的稳定度达到了1×10^-6,调频线性度接近于1.0,相位噪声为-90 dBc/Hz/10 kHz。     

Linearity and power characteristics of SiGe HBTs at high temperatures for RF applications

In this paper, the power gain, power-added efficiency (PAE) and linearity of power SiGe heterojunction-bipolar transistors at various temperatures have been presented. The power characteristics were measured using a two-tone load-pull system. For transistors biased with fixed base voltage, the small-signal power gain and PAE of the devices increase with increasing temperature at low base voltages, while they decrease at high base voltages. Besides, the linearity is improved at high temperature for all voltage biases. However, for devices with fixed collector current, the small-signal power gain, PAE, and linearity are nearly unchanged with temperature. The temperature dependence of power and linearity characteristics can be understood by analyzing the cutoff frequency, the collector current, Kirk effect and nonlinearities of transconductance at different temperatures.     

A Wideband RF Frontend Architecture for Software Defined Radio

This paper presents an RF front-end architecture for wideband software defined radio to function in 400 MHz to 3.5 GHz frequency range. The frequency range covers almost all the existing standards (like GSM, UMYS, CDMA, WiFi etc.) as well as future standards (like WiMax which is still to be deployed). Although the 400 MHz–3.5 GHz band is taken, the architecture allows designers to design the front-end for any range of frequencies. In wideband front-ends, devices with high linearity are used to lower the level of intermodulation products. There are different front-end architectures available for catering to wideband operation. However, some of these, particularly the wideband ones suffer with intermodulation problem. This paper presents a partitioning mechanism that uses multiple medium bands to limit the intermodulation problem. The proposed frequency-partitioning scheme makes it possible to suppress intermodulation products further for front-end using devices of given linearity. Thus this helps in achieving better performance along with relaxing the linearity requirement of devices.     

一种无源高线性混频组件的设计与实现

在射频通信系统中,混频器作为接收机的核心器件,其线性指标将直接影响整个接收系统的性能。文中设计并实现了一种无源高线性混频组件电路,采用“平衡混频器+吸收式滤波器”的方式达到了高线性要求。平衡混频器采用一对双平衡混频器互联,通过相位抵消达到优化线性的目的;吸收式滤波器吸收混频器产生非线性谐波,使其无法在空间中进行反射,两者共同作用优化了组件整体的线性指标。测试显示,在射频频率为30~1 350 MHz,本振频率为3 030~4 350 MHz,中频频率为3 000 MHz的条件下,混频组件的IIP₂可以达到94 dBm,IIP₃可以达到29 dBm。相比于单独混频器,新电路的线性性能得到极大的优化,更适合高性能的接收机使用。     

A Low-Voltage 5-GHz Downconversion Mixer Employing A Second Harmonic Injection Linearization Technique

In this paper, a low-voltage CMOS mixer topology, appropriate for operation in the 5-GHz frequency band, is presented. The mixer combines several design techniques in order to achieve high linearity performance with minimum current consumption in a restricted 1-V supply. The proposed mixer utilizes an integrated transformer to improve the high frequency performance and to achieve large LO to RF isolation. In addition, a novel linearization technique based on second harmonic injection, is introduced to optimize linearity performance. The design is being implemented in a 0.13-mum CMOS technology.     

用PLFSL实现微波高线性扫频研究

本文研究了一种微波高线性扫频技术的实现方法.这种方法运用锁相环路和延迟线来提高扫频线性度.文中首先建立了锁相扫频环路(PLFSL)的相位模型,并应用FFT和数字滤波器的概念进行了系统分析.其次利用计算机模拟计算了PLFSL的稳态响应.最后对PLFSL的原理框图进行了实验验证.测试结果:中心频率1.5GHz、扫频带宽为500MHz的PLFSL的扫频线性度为0.008%.这一结果说明该方法是先进、可行的.