Accurate Extraction of Schottky Barrier Height and Universality of Fermi Level De-Pinning of van der Waals Contacts

Due to Fermi level pinning (FLP), metal-semiconductor contact interfaces result in a Schottky barrier height (SBH), which is usually difficult to tune. This makes it challenging to efficiently inject both electrons and holes using the same metal—an essential requirement for several applications, including light-emitting devices and complementary logic. Interestingly, modulating the SBH in the Schottky–Mott limit of de-pinned van der Waals (vdW) contacts becomes possible. However, accurate extraction of the SBH is essential to exploit such contacts to their full potential. In this study a simple technique is proposed to accurately estimate the SBH at the vdW contact interfaces by circumventing several ambiguities associated with SBH extraction. Using this technique on several vdW contacts, including metallic 2H-TaSe₂, semi-metallic graphene, and degenerately doped semiconducting SnSe₂, it is demonstrated that vdW contacts exhibit a universal de-pinned nature. Superior ambipolar carrier injection properties of vdW contacts are demonstrated (with Au contact as a reference) in two applications, namely, a) pulsed electroluminescence from monolayer WS₂ using few-layer graphene (FLG) contact, and b) efficient carrier injection to WS₂ and WSe₂ channels in both n-type and p-type field effect transistor modes using 2H-TaSe₂ contact.     

Optical properties of germanium monolayers on silicon

Photoluminescence and Raman spectra of thin germanium layers grown on silicon at a low temperature (250°C) have been studied. In structures of this kind, in contrast to those grown at high temperatures, luminescence from quantum wells is observed at germanium layer thicknesses exceeding ～9 monolayers (ML). With the development of misfit dislocations, the luminescence lines of quantum wells are shifted to higher energies and transverse optical (TO) phonons involved in the luminescence are confined to a quasi-2D germanium layer. Introduction of an additional relaxed Si_0.95Ge_0.05 layer into the multilayer Ge/Si structure leads to a substantial rise in the intensity and narrowing of the luminescence line associated with quantum dots (to 24 meV), which points to their significant ordering.     

Role of surface segregation in formation of abrupt interfaces in Si/Si1−x Gex heterocompositions grown by molecular-beam epitaxy with combined sources

The coefficients of segregation of germanium atoms were measured for the Si_1?x Ge_x system grown by molecular-beam epitaxy with combined Si-GeH₄ sources under the conditions of efficient filling of surface bonds by the products of the decomposition of hydrides. In their turn, these measurements made it possible to determine for the first time the ratio between the coefficients of the incorporation of Si and Ge atoms into the growing Si_1?x Ge_x layer using the developed kinetic model of growth. For the Si-Si_1?x Ge_x structures grown by molecular-beam epitaxy with the Si-GeH₄ combined sources, the role of various mechanisms (pyrolysis, segregation, etc.) in the formation of the profile of metallurgical layer interfaces was compared for a wide range of technological parameters.     

Photoreflectance study of electric field distributions in semiconductors heterostructures grown on semi-insulating substrates

We have studied the photoref lectance (PR) spectra from a MBE grown heterostructure consisting of 200 nm of Ga_0.83Al_0.17As, a 800 nm GaAs buffer layer on a semi-insulating (100) LEC GaAs substrate. By varying both the pump beam wavelength and modulation frequency (up to 100 kHz) we are able to identify the component layers, their quality and the properties of the various interfaces. In this study we find evidence for a low density of interface states between the GaAs buffer layer and GaAlAs layer and a relatively large density of interface states between the substrate and buffer regions. These states, previously observed by Deep Level Transient Spectroscopy of doped structures, are presumably associated with the interface produced by MBE growth on etched and air exposed substrates. However, in our material, since the substrate is semi-insulating and the buffer layer is undoped, it is difficult to resolve these states spatially by C-V techniques. Our results show that the PR technique can be used to characterize low conductivity or semi-insulating structures such as enhancement mode MESFET and HEMT type devices and it may be useful for the in-situ characterization of epigrown surfaces and interfaces     

A Coherently Strained Monoclinic [111]PbTiO3 Film Exhibiting Zero Poisson's Ratio State

[111]‐Oriented perovskite oxide films exhibit unique interfacial and symmetry breaking effects, which are promising for novel quantum materials as topological insulators and polar metals. However, due to strong polar mismatch and complex structural reconstructions on (111) surfaces/interfaces, it is still challenging to grow high quality [111] perovskite heterostructures, let alone explore the as‐resultant physical properties. Here, the fabrication of ultrathin PbTiO₃ films grown on a SrTiO₃(111) substrate with atomically defined surfaces, by pulsed laser deposition, is reported. High‐resolution scanning transmission electron microscopy and X‐ray diffraction reveal that the as‐grown [111]PbTiO₃ films are coherent with the substrate and compressively strained along all in‐plane directions. In contrast, the out‐of‐plane lattices are almost unchanged compared with that of bulk PbTiO₃, resulting in a 4% contraction in unit cell volume and a nearly zero Poisson's ratio. Ferroelectric displacement mapping reveals a monoclinic distortion within the compressed [111]PbTiO₃, with a polarization larger than 50 µC cm^?2. The present findings, as further corroborated by phase field simulations and first principle calculations, differ significantly from the common [001]‐oriented films. Fabricating oxide films through [111] epitaxy may facilitate the formation of new phase components and exploration of novel physical properties for future electronic nanodevices.     

Evaluation of Diffusion Barrier Between Lead-Free Solder Systems and Thermoelectric Materials

The intermetallic compound SnTe rapidly formed at interfaces between p-type bismuth telluride (Bi_0.5Sb_1.5Te₃) thermoelectric materials and lead-free solders. The intermetallic compound influences the mechanical properties of the joints and the reliability of the thermoelectric modules. Various lead-free solder alloys, Sn-3.5Ag, Sn-3Ag-0.5Cu, Sn-0.7Cu, and Sn-2.5Ag-2Ni, were used to investigate the interfacial reactions. The results thus obtained show that Ag and Cu preferentially diffused into the Te-rich phase in Bi_0.5Sb_1.5Te₃, so layers of Ag-Te and Cu-Te compounds could not form an effective diffusion barrier. Electroless nickel-phosphorus was plated at the interfaces to serve as a diffusion barrier, and the (Cu,Ni)₆Sn₅ compound formed instead of SnTe. Furthermore, the intermetallic compound NiTe formed between nickel- phosphorus and Bi_0.5Sb_1.5Te₃ and also served as a diffusion barrier. A plot of thickness as a function of annealing time yielded the growth kinetics of the intermetallic compounds in the thermoelectric material systems. The activation energy for the growth of the NiTe intermetallic compound is 111 kJ/mol.     

Integration of functional epitaxial oxides into silicon: from high-k application to nanostructures

We will present results for crystalline gadolinium oxides on silicon in the cubic bixbyite structure grown by solid source molecular beam epitaxy. Additional oxygen supply during growth improves the dielectric properties significantly. Experimental results for Gd₂O₃-based MOS capacitors grown under optimized conditions show that these layers are excellent candidates for application as very thin high-k materials replacing SiO₂ in future MOS devices. We also will present a new approach for nanostructure formation which is based on solid-phase epitaxy of the Si quantum-well combined with simultaneous vapor-phase epitaxy of the insulator on top of the quantum-well. Ultra-thin single-crystalline Si buried in a single-crystalline insulator matrix with sharp interfaces was obtained by this approach on Si(111). Finally, the incorporation of crystalline Si islands into single-crystalline oxide layers will be demonstrated.     

Pure germanium epitaxial growth on thin strained silicon-germanium graded layers on bulk silicon substrate for high-mobility channel metal-oxide-semiconductor field-effect transistors

We demonstrate epitaxially grown high-quality pure germanium (Ge) on bulk silicon (Si) substrates by ultra-high-vacuum chemical vapor deposition (UHVCVD) without involving growth of thick relaxed SiGe buffer layers. The Ge layer is grown on thin compressively strained SiGe layers with rapidly varying Ge mole fraction on Si substrates resulting in several SiGe interfaces between the Si substrate and the pure Ge layer at the surface. The presence of such interfaces between the Si substrate and the Ge layer results in blocking threading dislocation defects, leading to a defect-free pure Ge epitaxial layer on the top. Results from various material characterization techniques on these grown films are shown. In addition, capacitance-voltage (CV) measurements of metal-oxide-semiconductor (MOS) capacitors fabricated on this structure are also presented, showing that the grown structure is ideal for high-mobility metal-oxide-semiconductor field-effect transistor applications.     

Interfacial properties of YBa2Cu3O7−x thin films on AI2O3 substrates prepared by pulsed laser deposition

The interfaces of YBa₂Cu₃O_7−x (YBCO) superconducting thin films grown on (1 102) r-plane A1₂O₃ by pulsed laser deposition have been investigated by a transmission electron microscopy and an Auger electron spectroscopy depth profile. We used the PrBa₂Cu₃O_7−x (PBCO) buffer layer to prevent the interdiffusion and compared the interfaces of YBCO/A1₂O₃ and YBCO/PBCO/A1₂O₃. The intermediate layer in the YBCO film deposited on bare sapphire is visible between the film and the substrate but no boundary layer in the film grown on PBCO buffered sapphire was observed directly by the cross-section image of TEM. The thickness of the intermediate layer in the film on bare sapphire is about 30 nm. This result of TEM observation is consistent with that of AES depth profile.     

LP-MOCVD grown (lnAs)m(GaAs)m short period superlattices on InP

(InAs)_m(GaAs)_m (1 ≤ m ≤ 12) short period superlattices (SPSs) have been grown on semi-insulated InP substrates with a 200 nm InP cap layer using low pressure metalorganic chemical vapor deposition (MOCVD). According to double crystal x-ray diffraction and transmission electron microscopy results, the critical layer thickness of (InAs)_m(GaAs)_m SPS was observed to be ～30Å (m = 5). For the SPS below the critical layer thickness, mirror-like surface morphology was found without defects, and strong intensity Fourier transformed photoluminescence (FT-PL) spectra were also obtained at room temperature. The SPS with m = 4 showed a drastic improvement in photoluminescence intensity of order of two compared to an InGaAs ternary layer. However, the SPS with a large value of m (m ≥ 6), rough surface was observed with defects, with broad and weak FT-PL spectra. The surface morphology of SPS was greatly affected by the substrate orientation. The SPS with m = 5 was grown on two degree tilted substrate from (100) direction and showed poor surface morphology as compared to the one grown on (100) exact substrate Moreover, the SPS grown on a (111)B substrate showed a rough triangular pattern with Nomarski optical microscopy. In-situ thermal annealed SPS with m = 4 showed a 18 meV increase in PL peak energy compared to the as-grown sample due to phase separation resulting from thermal interdiffusion.     

Process parameter dependence of impurity-free interdiffusion in GaAs/AlxGa1−xAs and InxGa1−yAs/GaAs multiple quantum wells

The dependence of the impurity-free interdiffusion process on the properties of the dielectric cap layer has been studied, for both unstrained GaAs/Al_xGa_1−xAs and pseudomorphic In_y Ga_1−yAs/GaAs MQW structures grown by molecular beam epitaxy. The influence of the cap layer thickness, composition, and deposition technique on the degree of interdiffusion were all systematically investigated. Electron-beam evaporated SiO₂ films of varying thickness, chemical-vapor-deposited SiO_xN_y films of varying composition, and spin-on SiO₂ films were used as cap layers during rapid thermal annealing (850-950°C). Photoluminescence at 10K has been employed to determine the interdiffusioninduced bandgap shifts and to calculate the corresponding Al-Ga and In-Ga interdiffusion coefficients. The latter were found to increase with the cap layer thickness (e-beam SiO₂) up to a limit determined by saturation of the outdiffused Ga concentration in the SiO₂ caps. A maximum concentration of [Ga] = 4–7 ×10¹⁹ cm⁻³ in the SiO₂ caps was determined using secondary ion mass spectroscopy profiling. Larger band-edge shifts are also obtained when the oxygen content of SiO_xN_y cap layers is increased, although the differences are not sufficiently large for a laterally selective interdiffusion process based on variations in cap layer composition alone. Much larger differences are obtained by using different deposition techniques for the cap layers, indicating that the porosity of the cap layer is a much more important parameter than the film composition for the realization of a laterally selective interdiffusion process. For the calculated In_0.2Ga_0.8As/GaAs interdiffusion coefficients, activation energies E_A and prefactors D_o were estimated to ranging from 3.04 to 4.74 eV and 5 × Kh⁻³ to 2 × 10⁵ cm²/s, respectively, dependent on the cap layer deposition technique and the depth of the MQW from the sample surface.     

Characteristic evaluation of electroless nickel-phosphorus deposits with different phosphorus contents

The surface morphology, electrical property and reaction with solder alloy of two electroless nickel-phosphorus (EN-P) deposits (Ni-7wt.%P and Ni-10wt.%P) were investigated in this study. The P content of the EN-P layer decreased with increasing pH value. The EN-P plating layers had an amorphous structure and the electrical resistivity of the layer increased with increasing P content. Reaction layers of Ni₃Sn₄, Ni₂SnP and Ni₃P formed at the interfaces between the Sn-3.5Ag solder and the two EN-P deposit layers. The thickness of the interfacial Ni₃Sn₄ intermetallic compound (IMC) layer in the Sn-3.5Ag/Ni-7wt.%P joint was thicker than that in the Sn-3.5Ag/Ni-10wt.%P joint, whereas the thickness of the Ni₃P layer increased with increasing P content. These study results confirmed that the interfacial reaction between solder and the EN-P layer is significantly affected by the composition (P content) of the EN-P layer.     

Molecular beam epitaxial growth of Si1−xGex/Si pseudomorphic layers using disilane and germanium

Molecular beam epitaxial growth of pseudomorphic Si_1−xGe_x/Si layers using disilane (Si₂H₆) and elemental germanium has been studied for the first time. It is found that at a fixed flow rate of Si₂H₆, the germanium content in the Si_1−xGe_x alloys is a function of the germanium cell temperature. Heterostructures and multi-quantum wells with good surface morphology, excellent crystalline quality, and abrupt interfaces are demonstrated, indicating little or no sourcerelated transient effects.     

Effect of substrate annealing and V: III flux ratio on the molecular beam epitaxial growth of AlGaAs-GaAs single quantum wells

Photoluminescence spectra are presented on single quantum well (SQW) structures on thick (1.0 μm) A1_0.20Ga_0.80As buffers grown by molecular beam epitaxy (MBE). Through substrate preparation and careful control of growth conditions, full width half maximum (FWHM) luminescence line-widths of 0.7 meV have been achieved for the n= l confined electron-heavy hole transition. This is the narrowest luminescent linewidth ever reported for any epitaxially grown material. Annealing of substrates with the subsequent removal of the converted surface prior to MBE growth is shown to improve SQW luminescence. Luminescence quality is shown to vary strongly with V: 111 flux ratio during well growth. Improved SQW luminescence is observed for SQW grown using lower V: 111 flux ratios. Growth of a GaAs SQW at 680°Cusing a V:III flux ratio one-half of that required for thick GaAs epilayers while maintaining the same surface reconstruction is demonstrated. The techniques reported are important for the growth of heterojunction interfaces and devices in AlGaAs-GaAs.     

Selective epitaxy of cadmium telluride on silicon by MBE

CdTe B was grown on As-terminated Si(111) by molecular beam epitaxy (MBE). Nucleation and interface properties were studied by photoelectron spectroscopy, scanning tunneling microscopy, electron diffraction, and energy-dispersive spectroscopy of x-rays. Selective growth on Si(111) was investigated either by using SiO₂ as a mask, or by growing on a patterned CdTe seed layer. The highest temperature where CdTe nucleates on As-terminated Si(111) surfaces is typically in the range of 220–250°C. On a SiO₂ mask, CdTe nucleates at the same temperatures, leading to polycrystalline growth. However, homoepitaxy of CdTe is possible around 300°C. Hence, CdTe can be grown selectively on a patterned CdTe seed layer on Si(111). This is confirmed by scanning electron microscopy and scanning Auger microscopy.     

Influence of Cu addition to interface microstructure between Sn-Ag solder and Au/Ni-6P plating

The formation and growth of intermetallics at the interface between Sn-Ag-(Cu) alloy balls and Au/Ni-6P plating were experimentally examined as a function of soldering period. Joint strengths were also evaluated by a ball pull test. For the joint with Sn-3.5Ag, the primary reaction product of Ni₃Sn₄ exhibits growth and shrinkage in thickness repeatedly with a passage of reaction time up to 30 min, while the Ni₃SnP reaction layer monotonously increases its thickness without fluctuation. In the cases of the joints with Cu bearing solder, Sn-3Ag-0.5Cu and Sn-3.5Ag-0.8Cu, a single η-(Cu,Ni)₆Sn₅ interface layer grows by fast Cu segregation from liquid solder to the interface layer on soldering. For all the soldered joints, a P-rich layer appears at the surface region of a Ni-6P plating layer by Ni depletion to form those intermetallic compounds at interfaces. The growth rate of a P-rich layer for Sn-3.5Ag is faster by about 4–8 times than those of the Sn-Ag-Cu. The presence of Cu in solder enhances the formation of the Cu₆Sn₅ intermetallic layer at the interface resulting in prevention of Ni diffusion to liquid solder. For all the soldered joints, coarsened reaction interfaces decrease the joint strengths.     

Removal of the Magnetic Dead Layer by Geometric Design

The proximity effect is used to engineer interface effects such as magnetoelectric coupling, exchange bias, and emergent interfacial magnetism. However, the presence of a magnetic “dead layer” adversely affects the functionality of a heterostructure. Here, it is shown that by utilizing (111) polar planes, the magnetization of a manganite ultrathin layer can be maintained throughout its thickness. Combining structural characterization, magnetometry measurements, and magnetization depth profiling with polarized neutron reflectometry, it is found that the magnetic dead layer is absent in the (111)‐oriented manganite layers, however, it occurs in the films with other orientations. Quantitative analysis of local structural and elemental spatial evolutions using scanning transmission electron microscopy and electron energy loss spectroscopy reveals that atomically sharp interfaces with minimal chemical intermixing in the (111)‐oriented superlattices. The polar discontinuity across the (111) interfaces inducing charge redistribution within the SrTiO₃ layers is suggested, which promotes ferromagnetism throughout the (111)‐oriented ultrathin manganite layers. The approach of eliminating problematic magnetic dead layers by changing the crystallographic orientation suggests a conceptually useful recipe to engineer the intriguing physical properties of oxide interfaces, especially in low dimensionality.     

Exotic Structural and Optoelectronic Properties of Layered Halide Double Perovskite Polymorphs

Discovering new types of layered perovskites has great importance for designing novel optoelectronic devices. In this article, combining first-principle calculations with global structure searching, it is found that Rb₄SnSb₂Br₁₂, a typical halide double perovskite, can unexpectedly possess fertile low formation-energy polymorphs holding van de Walls (vdW) layered structures. Consequently, these polymorphs can be effectively classified into 12 types according to their local octahedral motifs, exhibiting a wide range of bandgap covering the visible spectrum. Interestingly, the structure-dependent bandgap in these polymorphs can be well understood by developing a simple machine learning model. Moreover, as a layered system, the optoelectronic properties of Rb₄SnSb₂Br₁₂ can be effectively tuned by the layer thickness, and both type-I and type-II band alignment can be achieved in single-compound Rb₄SnSb₂Br₁₂ heterojunctions. Finally, it is suggested that the Sn-moderate condition can be considered to grow intrinsic p-type Rb₄SnSb₂Br₁₂ with lower defect density. Those findings not only provide a promising material system for designing the vdW tandem solar cell, but also offer a new opportunity to achieve exotic optoelectronic applications in a single-phase layered perovskite compound.     

Analysis of 14nm technology node In0.53Ga0.47As nFinFET integrated with In0.52Al0.48As cap layer for high-speed circuits

CMOS (Complementary Metal-oxide-semiconductor) based high-speed applications in the sub-14 nm technology node using InGaAs Fin field-effect-transistors (FinFETs) confront with inevitable effect in form of interface traps upon integration of dielectric layer with InGaAs material. In this work, we have explored the impact of the traps on short channel effects (SCEs) and a technique of abating the effect of interface traps by introducing In_0.52Al0.₄₈As cap layer. Proposed work reforms the device by varying the cap layer thickness (Tcap), doping concentrations of cap layer and underlap region. The effect of traps on intrinsic delay, work function variation and SCEs was investigated to assess the trend on devices with In_0.52Al_0.48As cap layer. It has been observed that introduction of Tcap improves SCEs and helps to mitigate the effect of interface traps. SCEs can be additionally diminished by presenting underlap fin length at the cost of higher delay. The experimental results show the value of subthreshold swing = 149.54 mV/decade, drain-induced barrier lowering = 38.5 mV V^?1 and delay = 1.1 ps for T_cap = 4 nm without underlap fin length structure for traps concentration of 10¹² cm^?2eV^?1. Thus, significant improvement has been seen in SCEs and delay performance in FinFET structure with cap layer.