非合作A/C应答解码及识别

传统二次雷达A/C模式解码都是基于询问-应答的合作模式,且有空间滤波,解码相对容易。对于非合作的纯接收系统如何对A/C应答进行解码,提出了一种在基带进行相关处理的解码方法,可在非合作的情况下对A/C应答进行有效解码,同时还可以通过改变门限的大小来满足不同场合的精度要求。另外还提出了A/C模式应答码的识别方法,该方法在多点定位中具有重要的应用价值。     

二次雷达S模式综述

A/C模式的二次雷达在目标数量增加到一定程度时暴露出许多问题,S模式是欧美国家开发的先进二次雷达协议,正在逐步取代传统的A/C模式。文中全面而简略地阐述了S模式的协议内容和工作机制,包括:S模式的起源和特点;S模式询问信号和应答信号的格式、含义、分类及询问应答机制;S模式的上下行数据格式、含义及涉及的重要问题;S模式的兼容性、锁定技术、Squitter模式、数据校验和干扰问题。最后,介绍了S模式在多个领域的应用情况。     

无线中继网络编码的最优化解码方案

网络编码技术在无线通信系统中的应用能够显著的提高通信系统的干扰性从而降低误码率并且提高数据传输率。主要研究了两个用户、两个中继、一个基站组成的无线通信系统,当两个用户同时输出相互独立的信息时,基站的最优解码方案。首先分析了在基站采用独立硬判决解码和联合软判决解码两种解码方案,然后通过数据仿真方法比较了采用两种解码方案时基站接收误码率,最后在理论上推导出联合软判决解码方案的误码率边界曲线并得到最优化的解码方案。     

JPEG XR在S3C2410A上的实现与优化

构建基于S3C2410A的JPEG XR编解码硬件系统,在S3C2410A上移植定制并优化的JPEG XR编解码算法,实现将采集的RGB格式原图进行编码和解码的过程。把采集的RGB格式图像无损转换为YUV 4∶4∶4图像格式,码流结构采用空间模式,对原JPEG XR编解码程序简化。结合S3C2410A自身的体系结构特征,使S3C2410A工作在ARM状态,采用32位总线宽度和32位小端方式的存储空间格式,给出数据块定义和存储空间分配方案,进行基于S3C2410A的汇编级优化。最终将定制并优化的JPEG XR编解码交叉编译为32位ARM指令代码,移植到S3C2410A上,实现对采集的RGB格式图像进行JPEG XR编码和解码的过程。对定制和优化前后进行了运行时间的测试,定制和优化效果明显。     

复杂干扰环境下的分布式多传感器检测

实用多传感器系统应考虑各种环境干扰的复杂性,然而复杂干扰环境下多传感器数据融合的研究是目前尚未开展的领域.为此,本文首先建立了复杂干扰环境下多传感器系统的马尔可夫模型,给出了状态转移图和状态概率,并根据该模型推导出复杂干扰环境下多传感器融合检测的四种判决方法.最后给出了仿真结果,并分析了检测概率和虚警概率.     

基于FPGA的双通道旋转变压器测角系统

提出了一种基于FPGA的双通道旋转变压器测角电路设计方案,通过FPGA来控制AD2S82A、AD2S80A的解码和同步问题。同时用FPGA对转换后数据进行误差补偿和组合,以及二进制角度值的转换,提高了整个系统的集成度和可靠度。整个电路在Altium Designer 9.0设计环境下设计实现。采用Altera公司的EP2C35F484C6型FPGA芯片进行FPGA部分的仿真,实验和仿真的结果很好地实现了该方案的设计功能,并满足高精度、高速度转换的设计要求。     

长江流域气象服务综合业务平台延伸服务探讨

本文通过分析长江流域气象服务综合业务平台技术特点和运行机制,详细探讨了平台延伸向行业用户提供服务的部署方法,展示了虚拟化技术、基于组件多业务平台融合方法、地理信息系统技术、C/S与B/S混合平台模式、海量数据云平台虚拟资源环境等多种新技术在气象信息系统建设中发挥的作用.     

混合结构下远程测试系统的数据通信技术

根据远程测控网络化的需要,提出了一种由B/S和C/S相结合的开放式网络远程测试诊断系统结构,分析了该结构的特点,分别选择了适用于此结构的数据通信技术——DataSocket和ActiveX技术。以Labwindows/CVI为软件平台,对DataSocket Server进行安全、权限等设置,对客户端实行2种不同的控制通信模式,实现了DataSocket在C/S下的应用。以ASP.NET为软件环境实现了B/S模式下的网络通信。总结了采用这2种技术的优缺点。     

MIMO通信系统中一种新的自适应均衡方法

该文提出了时变频率选择性衰落环境下多输入多输出(MIMO)通信系统中一种新的基于递归最小二乘(RLS)的自适应干扰对消的判决反馈均衡方法(RLS-IC-DFE)。该方法将每个数据子流上的自适应判决反馈均衡器等效为一个加长的新的均衡器,并把已解出的子流数据作为新的输入参数,应用RLS算法自适应调整新的均衡器参数。仿真结果表明,该文提出的自适应干扰对消的判决反馈均衡器可以自适应跟踪信道变化,同时比已有的判决反馈均衡器(RLS-DFE)能提供更好的误符号率(SER)性能。     

S模式二次雷达的原理及应用初探

现如今,在空中交通管制中已经普遍运用到了二次雷达系统,帮助更好的完成指挥任务。A/C模式作为传统的二次雷达系统在实践过程中发现存在着诸多的问题,如无法更多的响应编码信息、无法抵抗强烈的干扰等,对于日新月异的空中管制需要而言已经亟需革新。S模式二次雷达系统应运而生,解决了传统A/C模式存在的弊端,文章就S模式二次雷达进行了介绍,阐述了其工作原理和主要特点,并进行了展望。     

A Low-Latency Multi-layer Prefix Grouping Technique for Parallel Huffman Decoding of Multimedia Standards

Huffman coding is a popular and important lossless compression scheme for various multimedia applications. This paper presents a low-latency parallel Huffman decoding technique with efficient memory usage for multimedia standards. First, the multi-layer prefix grouping technique is proposed for sub-group partition. It exploits the prefix characteristic in Huffman codewords to solve the problem of table size explosion. Second, a two-level table lookup approach is introduced which can promptly branch to the correct sub-group by level-1 table lookup and decode the symbols by level-2 table lookup. Third, two optimization approaches are developed; one is to reduce the branch cycles and the other is parallel processing between two-level table lookup and direct table lookup approaches to fully utilize the advantage of VLIW parallel processing. An AAC Huffman decoding example is realized on the Parallel Architecture Core DSP (PAC DSP) processor. The simulation results show that the proposed method can further improve about 89% of decoding cycles and 33% of table size comparing to the linear search method.

Improvement on algorithm of confidence declaration of mode s second surveillance radar

Mode S Second Surveillance Radar (SSR) is very important means for Air Traffic Control (ATC) now and future, all the responding data which the radar receives need parity processing. Bit and confidence declaration is an vital step before error detection and error correction. Based on the commonly used baseline multi-sample algorithm, different conditions are presented and analyzed, the conditions under which error happens are pointed out, and the algorithm in which two statistical variables are added to avoid false declara-tion. In addition, the moving average method is used to preprocess the sampled data, so as to reduce the in-fluence of noise. The merits the baseline multi-sample technique owes are preserved, and the added computa-tion is small. The declaration veracity is improved, and consequently makes error detection and error correc-tion be facilitated successfully.     

Code Compression for VLIW Embedded Systems Using a Self-Generating Table

We propose a new class of methods for VLIW code compression using variable-sized branch blocks with self-generating tables. Code compression traditionally works on fixed-sized blocks with its efficiency limited by their small size. A branch block, a series of instructions between two consecutive possible branch targets, provides larger blocks for code compression. We compare three methods for compressing branch blocks: table-based, Lempel-Ziv-Welch (LZW)-based and selective code compression. Our approaches are fully adaptive and generate the coding table on-the-fly during compression and decompression. When encountering a branch target, the coding table is cleared to ensure correctness. Decompression requires a simple table lookup and updates the coding table when necessary. When decoding sequentially, the table-based method produces 4 bytes per iteration while the LZW-based methods provide 8 bytes peak and 1.82 bytes average decompression bandwidth. Compared to Huffman's 1 byte and variable-to-fixed (V2F)'s 13-bit peak performance, our methods have higher decoding bandwidth and a comparable compression ratio. Parallel decompression could also be applied to our methods, which is more suitable for VLIW architectures.     

Optimal decoding for data acquisition applications of sigma deltamodulators

A class of optimal nonlinear decoding algorithms is proposed for data acquisition applications of sigma-delta (ΣΔ) modulators. The technique is applicable to all current ΣΔ structures, including single and double-loop, cascade, and interpolative modulators. While the performance of the technique is identical to that of other optimal nonlinear decoding schemes such as table lookup, it is considerably simpler to implement. Numerical results are presented to compare its performance to that of linear decoders. Effects of circuit imperfections on performance are examined     

改进的S模式纠错算法

对检测到错误的S模式应答信号报文纠错,传统的方法是查表法,不仅效率很低,而且要求很大的存储空间存放错误图样,不适合工程应用。通过对S模式应答信号的干扰情况、编译码方式及循环码特性的深入研究,提出了余数计算的改进方法;再结合使用码元置信度,实现了能快速、准确定位误码并纠正它们的算法。改进的纠错算法不仅效率高,而且占用系统资源少,易于硬件实现,其有效性已得到工程应用的验证。     

Arranging multicast forwarding table in class sequence in ternary-cam for line-speed lookup

PIM-SM (Protocol Independent Multicast-Sparse Mode) is a main multicast routing protocol in the IPv6 (Internet Protocol version 6). It can use either a shared tree or a shortest path tree to deliver data packets, consequently the multicast IP lookup engine requires, in some cases, two searches to get a correct lookup result according to its multicast forwarding rule, and it may result in a new requirement of doubling the lookup speed of the lookup engine. The ordinary method to satisfy this requirement in TCAM (Ternary Content Addressable Memory) based lookup engines is to exploit parallelism among multiple TCAMs. However, traditional parallel methods always induce more resources and higher design difficulty. We propose in this paper a novel approach to solve this problem. By arranging multicast forwarding table in class sequence in TCAM and making full use of the intrinsic characteristic of the TCAM, our approach can get the right lookup result with just one search and a single TCAM, while keeping the hardware of lookup engine unchanged. Experimental results have shown that the approach make it possible to satisfy forwarding IPv6 multicast packets at the full link rate of 20 Gb/s with just one TCAM with the current TCAM chip.     

Low-Power System Design for MPEG-2/4 AAC Audio Decoder Using Pure ASIC Approach

This paper presents an implementation of a low-power and pure-hardware advanced-audio-coding (AAC) audio decoder system. Based on the characteristics of each decoding block, the AAC system is partitioned into four separate modules. For low-power and low-complexity considerations, architectural- and algorithmic-level approaches are adopted in both individual modules and whole system. In parallel PLA-based codeword decoder, we achieve a constant output rate of Huffman decoding in 2.5 cycles for the worst case, and memory usage is decreased compared to that in the binary-tree memory-based method. In reduced lookup table inverse quantizer, a table lookup with interpolation scheme is adopted which reduces the size of the lookup table from 8192 to 256. In hardware-shared signal processor, we use a hardware-sharing technique which integrates several similar blocks into a common hardware to reduce cost and enhance hardware utilization. In fully pipelined filterbank, a fast algorithm decreases the numbers of multiplication and addition largely to factors of 24 and 144 for the short and long blocks, respectively. A corresponding hardware for filterbank processing is proposed with fully pipelined architecture. Referring to stereo processing, a single hardware is shared for the channel pairs with low-cost consideration. The hardware operations of each module are well scheduled with high utilization of pipeline, and furthermore, the parallel processing among blocks is joined to increase efficiency. A 48% power savings can be reached by using the pipeline and parallel techniques of the channel pair. The proposed AAC decoder is realized in UMC 0.18-${rm mu}hbox{m}$ 1P6M technology and is operated at only 3 MHz in the worst case. The power dissipation is only 2.45 mW at the sampling frequency of 44.1 kHz.      

A DSFBC-OFDM for a Next Generation Broadcasting System With Multiple Antennas

In this paper, we propose a differential space-frequency block code-orthogonal frequency division multiplexing (DSFBC-OFDM) scheme as a multiple-input multiple-output (MIMO) transmission technique for next generation broadcasting system. A linear decoding method for DSFBC, which performs comparably to the ML decoding method, is derived for the cases of two or four transmit antennas. A simple table lookup method is proposed to improve the efficiency of the encoding/decoding process of DSFBC for the case of non-constant modulus constellations. This not only reduces the computational load, but also removes the necessity of channel estimation. Also, synchronization techniques with a DSFBC-encoded phase reference symbol (PRS) are discussed. Finally, an MIMO channel model for the next generation broadcasting system is developed by extending the 3GPP MIMO model to fit broadcasting environments. The MIMO channel model is then used to compare BER performances of differential space block code schemes for various channel environments. Simulation results show that the DSFBC-16QAM scheme using either four transmit antennas with one receive antenna or two transmit antennas with two receive antennas achieves a performance gain of 12 dB, with a data rate twice faster than that of the conventional DQPSK scheme     

一种高并发网络环境下快速流表查找方法

为了改进高速网络环境下连接表的查找速度,本文首先分析了OC-192骨干链路上的流量特征.研究表明,骨干链路不仅具有高并发和高到达速率的特点,而且在适当的缓存窗口下,具有较好的网络局部性特征.基于这些特征和局部性原理,本文在朴素的哈希表结构基础之上增加常量开销的辅助空间,实现了一种快速流表查找方法.理论分析和真实网络数据集上的实验表明,该方法相比现有方法可以降低流表查找长度20.2%,减少流表访问时间17.1%.     

Multiple-symbol parallel decoding for variable length codes

In this paper, a multiple-symbol parallel variable length decoding (VLD) scheme is introduced. The scheme is capable of decoding all the codewords in an N-bit block of encoded input data stream. The proposed method partially breaks the recursive dependency related to the VLD. First, all possible codewords in the block are detected in parallel and lengths are returned. The procedure results redundant number of codeword lengths from which incorrect values are removed by recursive selection. Next, the index for each symbol corresponding the detected codeword is generated from the length determining the page and the partial codeword defining the offset in symbol table. The symbol lookup can be performed independently from symbol table. Finally, the sum of the valid codeword lengths is provided to an external shifter aligning the encoded input stream for a new decoding cycle. In order to prove feasibility and determine the limiting factors of our proposal, the variable length decoder has been implemented on an field-programmable gate-array (FPGA) technology. When applied to MPEG-2 standard benchmark scenes, on average 4.8 codewords are decoded per cycle resulting in the throughput of 106 million symbols per second.