射频预失真器与基带预失真算法结合对行波管功率放大器线性化改善的影响

为了保证自适应算法的效果,一般会将行波管输出功率进行一定回退,但是会降低行波管的工作效率。通过在行波管前端加入射频预失真器,在额定输入功率范围内,线性化后的行波管的非线性失真现象得到了一定程度改善,然后再进行基带自适应算法的实现。X波段行波管在输出功率回退较少的同时,达到较好的非线性失真改善效果。     

基于毫米波GaN固态功放的预失真线性化器

研制了一款用于毫米波GaN 固态功放的预失真线性化器。采用预失真线性化技术,通过调整I、Q 两路正交电路(I 路由线性可调衰减器构成,Q 路由二极管非线性电路构成)的外加偏置电压,可以实现预失真线性化器的幅度和相位分别可调。将该线性化器与工作频率为30 GHz 的毫米波GaN 固态功放级联测试,双音激励信号频率间隔为5 MHz,三阶互调(IMD3)可以改善约10 dB。     

Novel linearizer using balanced circulators and its application tomultilevel digital radio systems

A miniaturized RF predistortion linearizer for a GaAs field-effect transistor power amplifier applicable to 256 quadrature-amplitude modulation (QAM) digital microwave systems is presented. This linearizer, which is based upon the cuber linearizer technique, utilizes circulators and a pair of diodes in the distortion generator to obtain high signal component isolation, and in the variable phase shifter to compensate for temperature variations. This allows miniaturization and easy adjustment of the circuit. Results show that a distortion reduction of more than 10 dB is obtained over a 300 MHz bandwidth. It was verified that distortion reduction can be achieved over a temperature range from 0 to 50°C. The fundamental characteristics of the linearizer and its effect on the 256-QAM signal are shown. The results show an improvement of more than 6 dB in the output back-off of the amplifier     

采用二极管的射频预失真毫米波功放线性化器

文章提出了一种Ka波段的射频预失真线性化器.它由一个GaAs肖特基二极管和一个电容并联构成,通过一个偏置电阻加入直流馈电,具有增益扩展和相位延迟的特性,并且其增益和相位特性具有可调性,尤其其相位特性可调性更强.将其应用于工作频率为30GHz饱和输出功率为10W的功放,输出三阶交调失真(IMD3)可以改善15dBc以上,此时功放输入的双音激励信号频率间隔为5MHz.该线性化器可调性强、结构简单、成本低廉、易于实现,有着非常大的工程应用价值.     

Chip for linearisation of RF power amplifiers using digitalpredistortion

A digital VLSI chip is presented that implements the most critical part of a predistortion system for linearisation of RF power amplifiers. Measurements have shown that the chip provides seven times higher modulation bandwidth (208 kHz) at 10% power (100 mW) compared with a standard digital signal processor     

采用90°分支电桥的C波段预失真线性化器

为了改善功率放大器的三阶交调失真,提出了一种基于90°分支线电桥的C波段预失真线性化器,使用肖特基二极管产生非线性信号。通过改变线性化器的偏置电压及电容,可调整线性化器的增益扩张和相位延迟特性,与功放级联后对功放的三阶交调失真有改善作用。将该线性化器应用到工作频率为7 GHz,饱和功率为20 dBm的放大器上,在输出功率回退5 dBm处对放大器的三阶交调有10 dBc的改善。     

A predistortion linearizer using envelope-feedback technique withsimplified carrier cancellation scheme for class-A and class-AB poweramplifiers

A predistortion linearization method using an envelope-feedback technique is proposed and implemented in this paper. This linearizer compensates the gain and phase nonlinearity of power amplifier (PA) simultaneously by controlling both variable attenuator and phase shifter with the feedback of only the difference signal between input and output envelopes. A new carrier cancellation scheme composed of a minimization circuit, log detector, and vector modulator is also presented. This circuit achieves adaptive control of the linearizer by enabling direct measurement of out-of-band power. It is well suited to a multichannel system where the allocated channels are time variant. The principle of the proposed linearizer is described and simple AM-AM distortion analysis is presented analytically and graphically based on the conceptual schematic diagram. A two-tone test for a class-A PA at 1.855 GHz with frequency spacing of 1 MHz showed intermodulation-distortion reduction of maximum 16 dB and stable operation over 5-dB output power variation up to 4-dB backoff from the saturation power level. The proposed linearizer is also applicable to class-AB PA's without further special adjustments. The adaptation circuit is fully implemented with analog integrated circuits, which can further extend its applicability with the integration technology     

WCDMA功放预失真发生器的研究

针对宽带码分多址(WCDMA)功放的非线性失真问题,提出了一种简单有效的解决方案,即通过预失真发生器对幅度-幅度(AM-AM)及幅度-相位(AM-PM)曲线进行调整,以补偿功放的非线性失真.这种方案主要是通过利用二极管的非线性特性设计出的预失真发生器来实现的.实验证明,将预失真发生器与WCDMA功放配合使用,能将功放的邻道功率泄漏比(ACPR)改善5 dB.     

5G 功放DPD 的FPGA 宽带实现及自动优化

5G 宽带功放数字预失真器(DPD)的FPGA 实现过程中,常遇到数字处理带宽不够和资源有限问题,对 此,文中提出一种基于双路并行数据流的数字预失真带宽扩展方法和基于Zynq Ultrascale+ MPSoC 的自动化模型优化 验证方法,可快速实现对5G 宽带功放线性化方案的优化。使用该并行处理结构的数字预失真器,克服了数字电路最 大时钟频率造成的对FPGA 线性化带宽的限制,使得数字预失真电路在每个时钟周期内可以处理更多的数据,不仅有 效地增加了数字处理带宽,而且降低了DPD 的功耗。然而,这种带宽增加以消耗更多硬件资源为代价,对此,文中同时 提出了对预失真非线性模型的在线自动优化方法,以简化非线性模型、降低DPD 的硬件资源开销。最后,在Zynq Ultrascale+ FPGA 实验平台上实现了具有两路并行数据处理的I-MSA 自优化数字预失真电路,采用100 MHz 的5G 新无 线电(NR)信号在2. 6 GHz 功率放大器上进行线性化实验验证,获得了满意的预失真性能,验证了所提方法的有效性。     

RF power amplifier linearization through amplitude and phasepredistortion

This paper presents a novel technique for power amplifier linearization in digital microwave radio systems. The proposed technique is based on the use of a predistortion circuit, whose AM/AM and AM/PM responses are separately implemented as polynomial approximations of the respective responses of the ideal linearizer. The proposed scheme is shown to attain superior performance in comparison with other well-known predistortion structures, such as those based on the cancellation of third or fifth order distortion, with no substantial aggravation in implementation complexity     

Analysis of Adaptive Digital Feedback Linearization Techniques

A new lookup-table linearization technique is developed based on the digital feedback and digital feedback/predistortion (DFBPD) concepts. The linearization characteristics are investigated through system simulation of a real power-amplifier model with 90-W peak envelope power. The DFB suppresses forward-path nonlinear distortion as a gain reduction due to the FB effect, and this technique enhances the system tolerance without any bandwidth limitation. As the PD network is added to the FB loop, the linearization performance and system tolerance are further improved because of more accurate PD signal extraction. In addition, the gain is purely determined by the FB path, so the gain fluctuation in the forward path, including amplifier aging and temperature effects, is suppressed. The analysis and simulation allow experimental evaluation of the linearization mechanism and performance of the DFBPD technique for an 802.16e mobile Worldwide Interoperability for Microwave Access signal.      

一种基带预失真RF功率放大器线性化技术的模型仿真与实验

提出了一种基于相关函数计算的自适应环延迟补偿法,用于功率放大器的的数字式基带预失真线性化技术。对采用这种软件延时补偿方法的预失真系统特性进行了仿真,并采用通用的数字信号处理器在硬件上实现了一个功放预失真系统性化模型进行了仿真,并采用通用的数字信号处理器在硬件上实现了一个功放预失真线性化模型。仿真和实验结果表明,在功率放大器的基带预失真中采用方法可以获得至少２０ｄＢ的线性度改善。     

A Chip for Linearization of RF Power Amplifiers using Predistortion based on a Bit-Parallel Complex Multiplier

This paper presents a custom chip for linearization of RF power amplifiers using digital predistortion. The chip has been implemented in a standard digital 0.8 m CMOS process with standard static cells and single-phase clocking. A systolic complex multiplier based on distributed arithmetic constitutes the core of the chip. The nonlinear function is realized with a look-up table containing complex gain factors applied to the complex multiplier. Maximum clock frequency was found by means of simulation to be 105 MHz corresponding to 21 Msamples/s throughput with 3 W power consumption using 5 V supply voltage. The fabricated chip is fully functional and has been measured up to 60 MHz clock frequency with 825 mW power consumption with 3.3 V supply voltage. Operation at 1.5 V supply voltage allows 10 MHz clock frequency with 35 mW power consumption.     

FPGA Implementation of a Power Amplifier Linearizer for an ETSI-SDR OFDM Transmitter

Most satellite digital radio （SDR） systems use orthogonal frequency-division multiplexing （OFDM） transmission, which means that variable envelope signals are distorted by the RF power amplifier （PA）. It is customary to back off the input power to the PA to avoid the PA nonlinear region of operation. In this way, linearity can be achieved at the cost of power efficiency. Another attractive option is to use a linearizer, which compensates for the nonlinear effects of the PA. In this paper, an OFDM transmitter conforming to European Telecommunications Standard Institute SDR Technical Specifications 2007-2008 was designed and implemented on a low-cost field-programmable gate array （FPGA） platform. A weakly nonlinear PA, operating in the L-band SDR frequency, was used for signal transmission. An adaptive linearizer was designed and implemented on the same FPGA device using digital predistortion to correct the undesired effects of the PA on the transmitted signal. Test results show that spectral distortion can be suppressed between 6-9 dB using the designed linearizer when the PA is driven close to its saturation region.     

一种行波管用毫米波射频预失真线性化器

射频预失真是提高功率放大器线性度的一种有效手段,精确补偿放大器的非线性失真需保证幅度和相位补偿同时满足要求.针对Ka波段行波管放大器的线性化,提出一种新型射频预失真电路.该电路由前置、后置电平调节模块和基于矢量合成技术的非线性信号产生模块构成.改变两电平调节模块的增益,可实现补偿区间的调节;改变非线性信号产生模块中两支路的偏置电压,可实现预失真补偿量调节及幅度/相位的独立调节.将实际电路与配用Ka行波管联测,在输出功率回退6 dB时,行波管三阶互调系数提高约11.5 dBc.     

Research of compressed sensing for predistortion with relatively low sampling frequency

In order to improve the TWTA digital predistortion linearizer with relatively low sampling frequency, the LUT and indirect learning architecture were used, which was cumbersome. A digital predistortion linearizer with compressed sensing technology was presented, which can provide good linearity improvement with simple and stable way.     

A SiGe PA with dual dynamic bias control and memoryless digital predistortion for WCDMA handset applications

This paper demonstrates a two-stage 1.95-GHz WCDMA handset RFIC power amplifier (PA) implemented in a 0.25-/spl mu/m SiGe BiCMOS process. With an integrated dual dynamic bias control of the collector current and collector voltage, the average power efficiency of the two-stage PA is improved from 1.9% to 5.0%. The measured power gain is 18.5 dB. The gain variation with dynamic biasing is less than 1.8 dB. An off-chip memoryless digital predistortion linearizer is also adopted, satisfying the 3GPP wideband code division multiple access (WCDMA) linearity specification by a 10 dB improvement of adjacent channel power ratio (ACPR) at +26 dBm average channel output power.     

Joint Polynomial and Look-Up-Table Predistortion Power Amplifier Linearization

Digital predistortion at baseband is an efficient and low-cost method for the linearization of a power amplifier (PA) in a wireless system employing a nonconstant-envelop modulation scheme, so as to reduce the adjacent channel interference. The polynomial and the look-up table (LUT) predistortion schemes are two commonly used approaches. However, in each of the two approaches, to reach a satisfactory adjacent channel power ratio (ACPR) in the PA output signal, people usually end up with a complex system having the involved algorithms converge rather slowly. In this brief, we propose a low-complexity joint-polynomial-and-LUT predistortion PA linearizer, where the two mutually dependent predistortion schemes can skillfully help each other. Simulation results show that the proposed joint linearizer can reduce the algorithm convergence time while achieving an excellent ACPR.     

一种二次混频预失真线性化技术

在射频功率放大器设计时,通常采用预失真技术来改善宽带信号的线性度。在普通的预失真技术基础上,提出了一种二次混频预失真线性化器,其非线性失真信号通过二次混频产生,并给出了该电路的应用方式,从理论上对其特性进行了分析,计算机仿真结果表明:使用这种预失真技术能有效抑制三阶交调。通过双音测试,IMD3改善了39 dBc。     

Digital linearizer for RF amplifiers

Broadcast technology is at the beginning of a new era. It is characterized by the intensive use of the most advanced digital modulation formats (8VSB, QAM, OFDM) in combination with high power RF amplifiers. To date the linearity required for these digital formats has only been accomplished in cumbersome low efficiency class A amplifier or even more cumbersome feed-forward systems. A potentially more efficient and cost effective approach is the combination of nonlinear power amplifiers and a predistortion technique capable of compensating for the nonlinear amplifiers. Digital predistortion will provide a highly linear output and improved efficiency. Itelco has developed a digital adaptive base band predistorter to provide for improved performance and cost. The technique is independent of the modulation type, the output frequency, or the signal bandwidth. Furthermore the capability of automatic adaptive predistortion to compensate for the environment (temperature, power supply variations, aging, and even operation during replacement of a faulty module) is highly desirable