基于B方法验证技术的应用研究

形式化B方法建立在严格的数学基础上,通过严格的验证技术证明其正确性,尤其对大型复杂系统的描述是非常有用和正确的。用形式化B方法描述了免疫系统的两个因子网络模型,然后通过严格和精确的验证技术:类型检查和证明义务的给出,证明了抽象机的正确性。     

UML状态机到B形式化规约的转换

文章研究在高可信软件工程中集成形式化方法。以软件设计的UML状态机模型为起点．将其转换为B形式化模型，然后在B工具环境中遵循B方法的精化原则和正确性验证方法，开发出可靠的实现模型。提出一套从UML状态机到B形式化规约的转换规则，涵盖UML基本状态图、分层状态图和并发状态图。实例分析表明．这套转换规则行之有效。     

基于扩展CHAM的SA级路径覆盖方法

化学抽象机形式化语言（CHAM）通过把化学反应和抽象机的概念有机地结合来描述系统状态的变化,以此来指导分析和测试.针对软件体系结构（SA）中构件的概念,采用CHAM对SA中的构件进行建模,并据此导出该构件的标号迁移系统（LTS）,以表示该构件与其它构件之间的行为交互,并根据选取的测试覆盖准则,生成基于此构件的LTS中的所有测试路径.最后以B/S体系结构为例,通过实验验证了该方法在生成DB构件的测试路径上是可行的.     

基于布尔表达式图的可逆电路综合方法

本文基于布尔表达式图（Boolean Expression Diagram,BED）提出一种可逆电路综合方法.该方法使用BED表示函数,采用逐BED结点方式综合可逆电路.在综合一个结点时,通过考虑其子结点函数的值是否还会被后续电路使用,基于由NOT、CNOT以及混合极性Peres门构成的门库构建该结点的局部最优可逆子电路.为进一步改善所得电路的成本,根据函数表达式的乘积项中变量对的共享度对变量进行分组实现BED中变量的排序.使用一组基准函数对所提出方法进行了验证.结果表明所提出方法具有较高时间效率.与现有使用决策图作为函数表示模型的综合方法相比,所提出方法能改善综合所得可逆电路的量子成本,且在许多情况下还能减少量子位数和垃圾线数.     

恒温热线风速仪的一种新型校准方法

恒温热线风速仪作为一种风洞流场测量元件,在湍流脉动测速任务中发挥了重要作用。时热线风速仪的校准工作进行了研究,将B样条与递推最小二乘相结合,提出了一种新型校准方法。该方法选取具有低阶光滑特性的B样条函数进行逆向建模,并采用递推最小二乘的方法估计控制参数,有效地提高了校准精度和实时性。通过对实际风洞实验的数据分析,验证了提出的该校正方法的有效性,并表明其具有样本点少、校正精度高、简单实用等显著优点。     

基于B方法的电梯控制系统形式化研究

B方法是一种新的形式化方法,使用B方法开发软件可有效提高软件的可靠性、可复用性和开发效率.文中使用B方法对电梯控制系统建立了抽象机模型并对其进行活性证明,自动生成相应软件,提高了电梯控制系统的可靠性和稳定性.     

基于动态计算可观测性无关项的OBDD变量序算法

OBDD是一种表示和操纵布尔函数的有效方法。由于许多布尔运算都可以转换为OBDD图的运算，因此，OBDD在集成电路设计领域，如逻辑综合、验证以及测试生成等，得到了广泛的应用。但是，OBDD的大小则严重依赖于变量序，为了实现OBDD的有效操作，寻找一个好的变量序是非常重要的基。基于此，文章提出了一个新的寻找OBDD变量序的启发式算法，它通过动态计算原始输入变量的可观测性无关项来确定一个好的变量序。实验结果表明，对于大部分电路，应用该算法都可以找到一个好的变量序。     

基于KFDD的可逆逻辑电路综合设计方法

可逆逻辑作为量子计算,纳米技术,低功耗设计等新兴技术的基础,近年来得到了越来越多的关注和研究.然而,大多数可逆逻辑综合方法对函数真值表表达形式的依赖使得综合电路规模受到了限制.决策图作为一种更加简洁的布尔函数表示方法,其为可逆逻辑综合提供了另一种途径.本文基于Kronecker函数决策图(KFDD)提出了一种适合于综合大规模电路的综合方法.该方法利用KFDD描述功能函数,以局部最优的方式从三种节点分解方法中寻找最优分解方法,并根据Kronecker函数决策图中不同类型的节点构建相应的可逆逻辑电路模块,最后将各节点替换电路模块实现级联得到结果电路.以可逆基准电路为例,对该方法进行了验证.实验结果表明,该方法能以较低的代价实现对较大规模函数的可逆逻辑电路综合.     

B样条函数在二维导体横截面轮廓成象中的应用

本文将B样条函数应用于根据多入射方向下的后散射场对二维导体柱横截面形状的反演,并将整个反演过程转化为两次非线性优化过程。由于两次优化的目标函数的导数都是可求得的,因此采用基于梯度的优化算法,如Broyden-Fletcher-Goldfard-Shanno变尺度算法(简称BFGS方法)。第一次优化最佳的等效圆柱的半径和深度,然后在第二次优化过程中再进一步优化导体柱横截面的控制节点以得到反演的形状。最后,以数值结果验证了该方法的有效性,并讨论了该方法的抗噪声性能。     

Coad／Yourdon建模方法的改进与支撑系统研究

讨论了面向对象方法中若干热点概念,在对Ｃｏａｄ面向对象建模语言深入分析的基础了,以一致的表达风格对该方法的表达能力进行了改进和扩充,形成了支持大型并发软件设计的新图形规约,并对相应的支撑环境地总体设计,为使用面向对象思想进行并发程序设计提供了一种有效的图形支撑手段。     

Stable Haptic Display of Slowly Updated Virtual Environment With Multirate Wave Transform

This paper proposes a control method that overcomes the instability of a haptic interface arising from both the slow update rates of the virtual environment (VE) and the time delay in a communication line. The instability arising from the time delay in a communication line can be overcome using the wave variables since the time delay on the wave variables becomes passive. The so- called multirate control scheme is applied to cope with the problems presented by the slow update rates of the VE. Since digital sample and hold (rate transitions) can be represented as a series of time delay, the passive nature of time delay on the wave variables is applied. By computing the norm of the scattering matrix, it was verified that rate transitions on the wave variables become passive, so a stable haptic interface was derived with the multirate wave transform. Various experiments have shown that a stable force display can be achieved with the multirate wave transform.     

全相位DFT数字滤波器的设计与实现

本文提出了全相位数据空间的概念,并基于DFT/IDFT滤波导出了一种新型的零相位滤波器——全相位DFT(APDFT)数字滤波器.本文给出了它的脉冲响应与相应的DFT滤波响应向量之间的正、反变换公式,证明了这种滤波器的一些重要性质.APDFT方法兼有窗函数法和频率采样法的优点,是一种设计FIR滤波器的新方法.理论分析和模拟实验证实,其总体性能优于传统方法.APDFT数字滤波器除可用通常的卷积结构实现外,也可用一种直接频域网络实现.本文给出了这种网络结构及其简化算法.这种网络具有实时自设计功能.它可以构成时变系统用于滤波器传递函数实时可变的场合,可以方便地集成为一个长度和频响均可编程的通用零相位数字滤波器,而且还可用于实现严格互补子带滤波.     

A general time model for the specification and design of embedded real-time systems

Design of complex embedded systems feasible with current and upcoming semiconductor technologies necessitates consideration of real-time from the beginning. However, the commonly used specification techniques do not consider temporal aspects in general like fulfillment of high level timing requirements or dynamic reactions on timing violations. In this paper, we discuss the restrictions of current specification techniques for embedded real-time systems and present a general time model that solves this issue. The time model contains the progress of time, the measurement of time and the specification of timing requirements based on event traces. In contrast to earlier techniques, preconditions determine the actual relevance of a specific timing bound. Exemplified for SDL, a solution for the specification of temporal aspects is shown. The advantages of this solution are discussed in a hardware/software co-design case study from the mobile communication area.     

基于实时解调的AIS信号侦察

针对日益增强的船舶自动识别系统（AIS）信号侦察需求,以实 时解调为主要侦察手段,结合采样数据存储,提出了一种通用的AIS信号侦察的FPGA设计方 案。通过乒乓操作、高精度计时器等设计,解决了AIS侦察的实时解调、标准时隙校准、高 精度时标等问题。试验结果验证了该设计的实用性。     

Automatic Processor Customization for Zero-Overhead Online Software Verification

The PSL-to-Verilog (P2V) compiler can translate a set of assertions about a block-structured software program into a hardware design to be executed concurrently with the program. The assertions validate the correctness of the software program without altering the program's temporal behavior in any way, a result never previously achieved by any online model-checking system. Additionally, the techniques and implementations described apply to any general purpose program and the absence of execution overhead renders the system ideal for the verification and debugging of real-time systems. Assertions are expressed in a simple subset of the property specification language (PSL), an IEEE standard originally intended for the behavioral specification of hardware designs. The target execution system is the eMIPS processor, a dynamically self-extensible processor realized with a field-programmable gate array (FPGA). The system can concurrently execute and check multiple programs at a time. Assertions are compiled into eMIPS Extensions, which are loaded by the operating system software into a portion of the FPGA, and discarded once the program terminates. If an assertion is violated, the program receives an exception, otherwise, it executes fully unaware of its verifier. The software program is not modified in any way. It can be compiled separately with full optimizations and executes with or without the corresponding hardware checker. The P2V compiler, implemented in Python, generates code for the implementation of the eMIPS processor running on the Xilinx ML401 development board. It is currently used to verify software properties in areas such as testing, debugging, intrusion detection, and the behavioral verification of concurrent and real-time programs.      

高光学效率相干多普勒激光雷达的测风性能分析与测试

近期研发了一套高光学效率全光纤化相干激光雷达设备,可用于风场的实时探测。该相干激光雷达工作于1.55 m波段,望远镜直径50 mm,时间分辨率和距离分辨率分别是1 s和30 m。系统集成了光纤结构的接收单元、可编程扫描模式的两轴扫描头及一个用于实时信号处理的多核数字信号处理器。对系统的测风性能进行了理论分析并同实验结果进行了对比,验证了系统测量距离达到5 km。之后,通过将激光雷达与超声波风速仪数据进行对比验证系统的测量精度。经过数据分析水平风速相关系数达0.980,标准差为0.235 m/s,风向数据相关系数达0.993,标准差为3.105。表明该相干激光雷达具有优良的性能,可以应用于大气边界层内的风场探测。     

Design of Total Sliding-Mode-Based Genetic Algorithm Control for Hybrid Resonant-Driven Linear Piezoelectric Ceramic Motor

This study presents a total sliding-mode-based genetic algorithm control (TSGAC) system for a linear piezoelectric ceramic motor (LPCM) driven by a newly designed hybrid resonant inverter. First, the motor configuration and driving circuit of an LPCM are introduced, and its hypothetical dynamic model is represented by a nonlinear function with unknown system parameters. In the hybrid resonant drive system, it has the merits of the high voltage gain from a parallel-resonant current source, and the invariant output characteristic from a two-inductance two-capacitance resonant driving circuit. Since the dynamic characteristics and motor parameters of the LPCM are highly nonlinear and time varying, a TSGAC system is therefore investigated based on direction-based genetic algorithm with the spirit of total sliding-mode control (TSC) and fuzzy-based evolutionary procedure to achieve high-precision position control under a wide operation range. In this control scheme, a GAC system is utilized to be the major controller, and the stability can be indirectly ensured by the concept of TSC without strict constraints and detailed system knowledge. In addition, the effectiveness of the proposed drive and control system is verified by numerical simulations and experimental results in the presence of uncertainties     

A higher order FDTD method in Integral formulation

We present a fourth-order (4, 4) finite-difference time-domain (FDTD)-like algorithm based on the integral form of Maxwell's equations. The algorithm, which is called the integro-difference time-domain (IDTD) method, achieves its fourth-order accuracy in space and time by taking into account the spatial and temporal variations of electromagnetic fields within each computational cell. In the algorithm, the electromagnetic fields within each cell are represented by space and time integrals (or integral averages) of the fields, i.e., the electric and magnetic fluxes (D,B) are represented by the surface-integral average, and the electric and magnetic fields (E,H) by the line and time integral average. In order to relate the integral average fields in the staggered update equations, we have obtained constitutive relations for these fields. It is shown that the IDTD update equations combined with the constitutive relations are fourth-order accurate both in space and time. The fourth-order correction terms are represented by the modified coefficients in the update equations; the numerical structure remains the same as the conventional second-order update equations and more importantly does not require the storage of field variables at the previous time steps to obtain the fourth-order accuracy in time. Furthermore, the Courant-Friedrichs-Lewy (CFL) stability criteria of this fourth-order algorithm turns out to be identical to the stability limits of conventional second-order FDTD scheme based on differential formulation.     

A methodology for the development of distributed real-time control applications with focus on task allocation in heterogeneous systems

A distributed application development methodology is necessary to define specific steps, through which the application specification can be successfully mapped to the system devices. Interoperability and real-timeliness are two major issues in distributed control application development. The main focus of this paper is a generic device model, developed to provide interoperability, and the function block allocation (FBALL) algorithm, defined to guarantee that real-time requirements are met. FBALL is a hybrid approach targeted for the nature of distributed control applications, resulting in an assignment of the application tasks to the system resources, as well as a feasible schedule that meets the real-time constraints. Based on these solutions to interoperability and real-time criticality, a methodology is presented, supporting the distributed control application specification, modeling, and implementation to heterogeneous systems.     

AHB总线在密码SoC中的设计与应用

为了提高密码SoC的接口的规范性能和系统的整体性能,提出了一个基于AMBA总线规范高性能总线AHB的多密码算法IP核的集成方案。首先对AHB高性能总线进行了FPGA实现,并在此基础上实现了多个密码算法IP核与AHB总线的挂接,完成了基于AHB总线的片上系统集成。最后对AHB总线和密码算法集成进行了仿真和FPGA测试,并验证了实现的正确性。