环行器对低噪声放大器性能的改善

基于网络S参数理论,分析了环行器对低噪声放大器性能的影响。设计了一种工作在4.3~5.1GHz的微波晶体管低噪声放大器和铁氧体带线Y结环行器,数值仿真对比了环行器接入前后低噪声放大器的驻波比、稳定性和增益平坦度性能。结果显示接入环行器可以改善放大器的输入匹配,增加稳定性和提高增益平坦度,是一种提高低噪声放大器性能的有效方法。     

基于ADS宽带微波低噪声放大器设计与仿真

文章主要研究低噪声放大器在宽频带范围内增益平坦度低、阻抗匹配差的问题。选用Avago公司生产的具有高动态范围和低噪声特性的PHEMT器件ATF-38143晶体管,采用自给偏置共源,负反馈结构,基于ADS仿真设计完成一款两级级联的宽带低噪声放大器。该放大器利用源极串联反馈电感和输入端接双支节微带线的匹配方法。仿真结果显示放大器在1.0～3.0 GHz的频带范围内,输入输出回波损耗均小于-10 dB;系统稳定性因子K> 1;噪声系数为(1.6±0.4)dB;最大增益为26.5 dB,增益平坦度缩小到±0.5 dB。     

S波段低噪声放大器的ADS仿真与设计

介绍低噪声放大器设计的理论基础,并重点介绍了低噪声放大器的主要性能指标:噪声系数、功率增益、驻波比、稳定性等。以ATF38143晶体管为例介绍了ADS仿真软件设计低噪声放大器的方法和主要步骤。采用三级级联结构设计出满足指标的S波段低噪声放大器链路。该放大器链路的指标为噪声系数小于1.2,功率增益大于50dB,增益平坦度小于0.5dB,VSWR小于1.8的低噪声放大器,带宽为6MHz,并具有一定的带外抑制能力。     

3～10GHz SiGe HBTs超宽带低噪声放大器的设计

根据UWB(Ultra-wideband)无线通信标准.提出了一款超宽带低噪声放大器并进行了设计.该放大器选用高性能的SiGe HBTs,同时采用并联和串联多重反馈的两级结构,以达到超宽频带、高增益、低噪声系数以及良好的输入输出匹配的目的.仿真结果表明,放大器在3-10 GHz带宽内,增益.S21高达21 dB,增益平坦度小于1.5 dB,噪声系数在2.4～3.3 dB之间.输入输出反射系数(S11和S22)均小于-9 dB,并且在整个频带内无条件稳定.所有结果表明该LNA性能良好.     

一款采用有源电感的增益可调且平坦的超宽带低噪声放大器

采用有源电感,设计了一款增益可调且平坦的超宽带低噪声放大器(FTG UWB-LNA)。在输入级,采用具有新型偏置电路和RLC反馈的共基-共射放大器来实现良好的宽带输入阻抗匹配;在放大级,采用由新型有源电感与达林顿结构构成的组合电路,来实现增益的可调性、平坦化和幅度提升。在输出级,采用电阻并联和电流镜偏置的共集放大器,来实现良好的输出阻抗匹配。基于WIN 0.2μm GaAs HBT工艺库,对FTG UWB-LNA进行验证,结果表明：在1-6GHz频带内,增益(S21)可以在21.16dB-23.9dB之间调谐,最佳增益平坦度达到±0.65dB;输入回波损耗(S11)小于-10dB;输出回波损耗(S22)小于-12dB;噪声系数(NF)小于4.08dB;在4V的工作电压下,静态功耗小于33mW。     

3.1～5.2GHz超宽带可变增益低噪声放大器设计

低噪声放大器是超宽带接收机系统中最重要的模块之一,设计了一种可应用于3.1～5.2GHz频段超宽带可变增益低噪声放大器。电路输入级采用共栅结构实现超宽带输入匹配,并引入电流舵结构实现了放大器的可变增益。仿真基于TSMC 0.18μm RF CMOS工艺。结果表明,在全频段电路的最大功率增益为10.5dB,增益平坦度小于0.5dB,噪声系数小于5dB,输入反射系数低于-15dB,在1.8V电源电压下,功耗为9mW。因此,该电路能够在低功耗超宽带射频接收机系统中应用。     

3~10 GHz平坦增益超宽带CMOS LNA设计

提出了一种基于共源共栅及电阻并联反馈结构的超宽带低噪声放大器(LNA)。在3~10GHz的工作频段范围内,采用电阻并联反馈和π型匹配网络结构,实现宽带输入匹配,并有效减小整个电路的噪声系数。利用共源共栅输出漏极的并联峰化技术,实现平坦的高频增益及噪声的有效抑制。采用源极电感(Ls)负反馈及晶体管M3构成的源极跟随器,提高电路的线性度和输出匹配。基于TSMC 0.18μm RFCMOS工艺库,采用Cadence Spectre RF,对LNA原理图和版图进行仿真。仿真结果显示,该LNA的S11和S22均小于-10dB,S12小于-32dB,S21为11.38±0.36dB,噪声系数为3.37±0.2dB,P1dB和IIP3分别为-9.41dBm和-2.7dBm。设计的LNA在带宽内具有良好的输入输出匹配、较好的反向隔离度及线性度、高且平坦的增益和低且平坦的噪声系数。     

超宽带低噪声放大器仿真设计

采用负反馈技术和集总参数匹配技术,选用VMMK-1218低噪声E-PHEMT晶体管,利用ADS进行仿真优化,设计了一种微波超宽带低噪声放大器。仿真结果显示,在0.5~4.5GHz范围内,放大器增益大于14.2 dB,平坦度小于1.1 dB,噪声系数小于0.85 dB,输入输出反射系数均小于-11 dB。设计结果可应用于各种宽带微波通信及雷达等领域。     

100-400MHz超宽带低噪声放大器ADS仿真设计

设计了一个100-400MHz超宽带低噪声放大器。该放大器采用两级E-PHEMT晶体管(ATF54143)级联结构,每级都用独立电源供电。应用射频电路仿真软件ADS对匹配电路进行优化设计,最后通过原理图-版图联合仿真得到放大器的各项性能参数。在100-400MHz频带内,噪声系数(NF)小于0.3dB,带内增益大于32dB,带内增益平坦度±0.5dB以内,输入输出驻波比小于1.8。仿真结果表明,该设计完全满足性能指标要求。     

3～5GHz超宽带并联负反馈低噪声放大器的设计

设计了一种用于3～5GHz MB-OFDM超宽带接收机射频前端的CMOS低噪声放大器(LNA).分析了RC电阻反馈式低噪声放大器的结构,针对其存在的噪声大、增益低等问题,提出一种改进电路结构;增加了一个源极电感,以克服上述电路的不足,采用TSMC 0.18μm RFCMOS工艺,进行设计和仿真.仿真结果表明:改进结构在...     

Frequency-Domain Analysis of Effects of the Location of a Feedback Resistor in a Current Feedback Amplifier

A current feedback amplifier (CFA) has good high-speed properties but its performance is very dependent on interconnect designs, particularly its feedback interconnect design. In this brief, effects of the location of a feedback resistor in the feedback interconnect design of a CFA are analyzed in the frequency domain. A transfer function of a CFA is derived, and frequency responses are simulated by varying the location of a feedback resistor in the transfer function. Then, experiments are carried out with test circuits consisting of CFAs with diverse locations. It can be seen that further distance of the resistor to the inverting input of the CFA results in larger distortion of the CFA's frequency response. This result is true even if the total length of the feedback interconnect is constant.     

A high performance monolithic In0.53Ga0.47Asvoltage-tunable transimpedance amplifier

The fabrication and performance of the first monolithically integrated In_0.53Ga_0.47As JFET voltage-tunable transimpedance amplifier for use in InP-based optoelectronic integrated circuits are reported. A narrow-gate transistor is used as an active feedback resistor. The two-stage voltage amplifier has a voltage gain of 10.7 and a bandwidth of 350 MHz. The closed-loop transimpedance of the amplifier is tunable from 10 to 24 kΩ by controlling the gate bias of the feedback transistor     

On the implementation of the floating simulators employing a single active device

In this paper, two circuits for realizing floating inductor (FI), floating capacitor (FC) and floating frequency-dependent negative resistor (FDNR) simulators depending on the passive component selection are introduced. Both of the developed circuits employ a single active device called modified current feedback operational amplifier (MCFOA) and a minimum number of passive elements. The FIs and FCs use a grounded capacitor thus the developed circuits are very suitable for fully integrated circuit (IC) design. Also, the proposed circuits require no critical passive component matching conditions and/or cancellation constraints. The simulation results using SPICE program are also given to verify the theory to exhibit the performance of the first circuit.     

Research Note Two novel voltage( current) controlled integrable oscillators

Two novel voltage( current) controlled oscillator circuits are presented. Each circuit uses a single operational amplifier, a single operational transconductance amplifier, and either a single resistor or a single capacitor. In both circuits the frequency of oscillation can be adjusted by changing the biasing voltage( current) of the operational transconductance amplifier. Experimental results are included     

GaN基紫外探测器读出电路注入效率

读出电路的注入效率是决定紫外焦平面探测器性能的重要因素。基于GaN基p-i-n结构日盲紫外探测器以及CTIA结构读出电路的等效模型,对探测器信号读出的电荷注入效率进行了分析,得到了注入效率的表达式。分析了注入效率与积分时间、探测器等效电阻、探测器等效结电容、CTIA电路中运算放大器增益的依赖关系,并指出了放大器增益是有效影响注入效率的重要可控因素之一,可以用提高增益的方法获得更大的注入效率。设计了几种不同增益的运算放大器电路,并分别构成CTIA结构读出电路。采用GF 0.35 m 2P4M标准CMOS工艺设计电路版图并进行流片。将紫外探测器分别连接至具有不同放大器增益的CTIA读出电路并进行测试,通过对比注入效率的理论分析结果与实际测试结果,可以得知,注入效率的理论分析与实验结果吻合较好。     

A series of new circuits based on CFTAs

The paper presents a series of basic circuits based on CFTAs (current follower transconductance amplifier), which contain amplifier, lossless integrator, first-order universal current-mode filter, simulation resistor, negative resistance converter, gyrator, capacitor multiplier, and frequency-dependent negative resistance circuit. Having used canonic number of grounded capacitors and resistors, the circuits are easy to be integrated and the parameters of the circuits can be adjusted electronically by tuning bias currents of the CFTAs. It is noted that the results of circuit simulations are in agreement with theory.     

用于PDIC的跨阻放大器的优化设计

提出了一种用于PDIC的跨阻放大器.电路由三级相同的推挽放大器级联而成,每级均采用一动态电阻对负载进行补偿,以提高放大器的相位裕度.反馈电阻由一栅极受控的PMOS管替代,避免了大尺寸多晶硅电阻引入的附加相移,增加了电路的稳定性.采用XFAB 0.6μm CMOS工艺提供的PDK,在Cadence Spectre环境下进行电路设计、仿真验证.仿真结果表明,电路的增益、带宽及稳定性均得到满意结果.

Abstract：

Presented is a transimpedance amplifier for PDIC.The designed amplifier is configured on three identical push-pull amplifier stages that use an active load compensated by an active resistor to improve the phase margin of the amplifier.The feedback resistor is replaced by a PMOS transistor which is biased by the gate voltage.The replacement not only avoids the phase-shift introduced by the large ploy-resistor but improves the stability performance of the transimpedance amplifier.Based on XFAB's 0.6 μm CMOS,circuit design and simulation were performed by using Cadence Spectre.The simulation results show that the gain,bandwidth and stability of the amplifier all achieve good performance.     

一种新型开关电流余量放大器

提出了一种基于互补双极工艺的新型余量放大器。该余量放大器由电阻反馈阵列、开关电流阵列和互补双极运算放大器组成,采用了恒定共模电流的方式。相比于传统余量放大器,该余量放大器的时序更简单、精度更高。采用开关电流阵列来调整整个余量放大器的电流流向,采用带高增益放大器的电阻反馈阵列来产生相应的余量放大。在流水线模数转换器中,该余量放大器实现了分段放大功能。     

A 200-V high-voltage amplifier using a parasitic field-oxide transistor for voltage feedback

A 200-V high-voltage amplifier with a 50-kHz bandwidth is built in a 10-V trench-isolated CMOS process with complementary high-voltage transistors. The high-voltage amplifier uses parasitic field-oxide transistors to dc stabilize the input-output voltage transfer characteristic. Use of parasitic field-oxide transistors for output voltage sensing provides only a small capacitive output load and eliminates the need for high-voltage resistor feedback networks. By removing resistor feedback networks, compact and low-power high-voltage amplifiers may be realized for a certain class of applications.