锁相环在微机保护中的应用

针对微机保护中采用传统的采样方法,采样频率难以自动跟踪被测量的频率变化而发生变化,必然会导致FFT运算产生误差。本文采用锁相环同步采样技术实现对微机保护装置中交流电压、电流信号的频率和相位进行锁定,以提高测量精度和实时性。结合锁相环控制AD7656模数转换芯片的实验,证明整周期同步采样在微机保护装置中的可行性,解决了软件同步采样的实时性差、软件编写复杂等问题。     

多相随机子采样FFT模拟信息转换器

模拟信息转换器是实现稀疏信号压缩感知的一种装置,常用的主要结构是随机解调下采样,但是通常存在采样恢复精度低以及压缩率不高的问题。为提高压缩率及采样恢复精度,本文提出了一种多相随机子采样FFT模拟信息转换器实现方法,该模拟信息转换器由多相分频移相器、伪随机数发生器、多路并行低速ADC以及累加器组成。该方法利用信号在频域循环卷积后下采样等效于信号随机子采样FFT的特点,实现对信号的压缩采样,能有效提高信号压缩率及采样恢复精度,且结构简单、易于实现。仿真实验验证了此方法的有效性。      

红外双波段自适应伪装装置研究

对红外双波段自适应伪装装置的实现方案进行了理论分析,并详细介绍了装置的组成、设计方案和硬件设计,通过实验验证了装置的自适应伪装效果。装置可以在近红外和远红外双波段内实现自适应伪装,对自适应伪装装置的研发有一定的参考价值。     

提高光纤光栅传感器测量精度的研究

在实际应用中,光纤光栅传感器的测量精度受到噪声,成本等因素的制约。为了实现低成本的高精度光纤光栅传感器系统,提出了对光纤光栅反射谱采用自适应阈值小波消噪和B多节点样条拟合插值算法的处理技术,并通过实验和仿真得出自适应阈值小波消噪,有效提高了系统的信噪比,在相同采样精度下拟合插值处理前波长检测的误差为0.01nm,处理后误差为0.0017nm,误差降低了一个数量级。实验结果证明该方法不但可以有效降低噪声带来的读取误差,而且提高了测量Bragg波长漂移量的分辨率,从而实现高精度地测量温度、应变等外界参量。     

一种适于时差法超声流量计的自适应采样方法

针对超声流量计高精度、低功耗的要求,提出一种自适应采样方法,克服了周期性采样的不足.该方法以相邻二次采样的时差变化率作为动态控制采样周期的主要指标,可根据流体流动情况自动调整采样周期.通过对自适应和周期性采样算法的实验数据进行比较分析,自适应采样方法不仅能在流体波动环境中显著提高计量精度,而且还可以在流体处于稳定时降低系统功耗.     

一种保持图像细节的线性空间移变插值新方法

将基于双向梯度的插值点灰度预估和局部纹理强度导向的插值强度自适应控制技术相结合,提出了一种新的自适应图像插值方法.该方法用插值点灰度预估值取代近邻采样值纳人重采样运算,并根据降采样图像的局部空间纹理强度实时调节插值强度,从而在不增大运算开销的前提下,实现了插值重建精度的提升.仿真实验结果说明利用该方法插值重建出的图像具有较高的信噪比PSNR和较低的边缘误差比PEE,且视觉效果更锐利.     

一种带自适应斜坡补偿的PCM控制Boost变换器

设计了一种带自适应斜坡补偿的峰值电流模式(PCM)控制Boost变换器。采用一种低功耗自适应斜坡补偿电路,使得升压(Boost)变换器能够实现宽输出范围和高带载能力。在此基础上,提出了一种应用于Boost变换器的电感电流采样电路,该电路实现了高采样速度和高采样精度,且具备全周期的电感电流采样特点。变换器基于SMIC 180 nm BCD CMOS工艺设计。仿真结果表明,该带自适应斜坡补偿的PCM控制Boost变换器输入电压转换范围为2.8 V~5.5 V,输出电压转换范围为4.96 V~36.1 V,最大输出负载电流高达5 A。     

蒸汽压缩式制冷循环教学实验台的研制

为改进机械式实验仪器,即蒸汽压缩式制冷循环实验台的性能缺陷,设计了基于STM32F103的数据采集板卡,提高数据采集的精度和稳定性;采用基于C#语言的实验软件并结合ASP.NET技术实现实验过程自动化和远程实验教学功能。在此对上述功能的实现过程进行必要的阐述并对实验台的重要性能指标不确定度进行了详细的分析。结果表明实验台能满足现有教学实验要求,并对同类实验装置的研发具有一定的参考价值。     

一种自适应采样方法在网络管理中的研究

自适应采样不仅可以动态调整采样率,减少数据处理量,优化网络负载。本文通过Internet流量检测模拟试验比较了系统采样和模糊采样的性能。试验结果表明,自适应采样技术不仅能更好地监测、控制、管理高性能网络,并具有更高的精度,较低的网络开销。     

基于稳健自适应频率采样的宽频电磁数值仿真

已有的基于Stoer-Bulirsch有理函数插值的自适应频率采样算法往往对插值间隔、收敛精度等参数非常敏感,算法稳定性差,甚至会出现伪收敛等问题.针对已有算法的上述缺陷,通过采用极点判断、插值区域二分、参数变换和多次收敛性检验等措施,提出了一种逐一增加采样点的自适应策略.形成了一种通用性强、稳定性好的自适应频率采样算法,可以用较少的采样点插值重构未知函数响应.并结合多层快速多极子方法,对宽频带目标电磁散射进行计算分析,实现采样频点的自适应选取,减少了计算量极大的精确数值计算的次数,提高了仿真效率.     

基亏DSP的多路音／视频采集处理系统设计

采用TI公司的TMS320DM642型数字媒体数字信号处理器（DSP）设计多路音／视频采集处理系统，实现实时处理4路模拟视频和音频输入、1路模拟／数字视频和1路模拟音频信号输出的功能，该系统可适应PAL／NTSC标准复合视频CVBS或分量视频Y／C格式的模拟信号和标准麦克风或立体声音频模拟输入，具有PAL／NTSC标准S端子或数字RGB模拟／数字信号输出和标准立体声音频模拟输出。并给出软／硬件设计原理和电路。     

Mixed-signal quadrature demodulator with a multicarrierregeneration system

This paper presents a combined analog/digital demodulation system built around a (PLL) with digital carrier regeneration. The input signal itself is not digitized, but the PLL is digital wherever it is possible. The link between the analog and the digital domain is a 1-bit sigma-delta converter that converts the (quasi-dc) output signal of the PLL's phase detector into a bitstream. The PLL's loop filter doubles as a decimation filter for the bitstream. The analog I and Q output signals are obtained by multiplying the analog input signal with the digital output signal of the PLL in two four-quadrant multiplying digital-to-analog converters     

Testing analog circuits using spectral analysis

In this work a test strategy for analog circuits based on spectral analysis is proposed. The test strategy is blind, in the sense that only statistical information about the input signal is needed, but no sampling of the input signal is required. This feature allows the test of analog circuits with minimum analog hardware addition. In the context of Systems-on-Chip, this strategy needs only the inclusion of a small random signal generator, and transfers most of the signal processing to the digital domain, allowing the use of a purely digital tester or a digital BIST technique. This paper presents the underlying principle of the method and experimental test results for linear analog systems.     

A single-chip CMOS analog/digital mixed NTSC decoder

A single-chip CMOS LSI that integrates all analog-to-digital (A/D), digital-to-analog (D/A), peripheral, and digital signal processing circuits necessary for a digital National Television System Committee (NTSC) signal decoder is described. The LSI chip accepts composite NTSC video signals in analog form, digitizes them using the on-chip A/D converter, converts them to component RGB signals, and then converts the signals to analog form by using the on-chip D/A converters. The development of circuits that maximize use of the input digital data is discussed. A 6-b A/D circuit is used to reduce the circuit size. Circuits that help maintain acceptable picture quality despite 6-b resolution were developed. Besides analog NTSC signal input and RGB signal output, the IC can also input and output digital NTSC signals, Y/C (luminance, chrominance) signals, and RGB signals. Applications of the LSI are presented     

Hybrid delta-sigma ADC

A hybrid (analog/digital) architecture is proposed to implement a robust high-resolution delta-sigma modulator with a single-bit output. The system contains a low-order multi-bit analog noise-shaping loop, followed by a scaling block and a high-order single-bit digital modulator. The combination simplifies the realization of the analog modulator, and it allows the use of most of its full-scale input range.     

Digital Controller Design for Analog Systems Represented by Multiple Input–Output Time-Delay Transfer Function Matrices with Long Time Delays

This paper presents a digital controller design methodology for multivariable analog systems represented by minimally realizable multiple input–output time-delay transfer function matrices with long time delays. First, the analog transfer function matrix with multiple input–output time delays is minimally realized and represented by a delay-free state-space model and a multiple output-delay function. For a specific multiple time-delay transfer function matrix with complex poles, a minimal realization scheme is newly proposed. Then the minimized delay-free state-space model is utilized for linear quadratic regulator (LQR) design. Furthermore, the designed analog LQR is digitally redesigned via a predictive state-matching method for finding a low-gain digital controller from the pre-designed high-gain analog controller. For implementation of the digitally redesigned controller, a digital observer is constructed for the multiple time-delay system with long time delays. An illustrative example is given to demonstrate the effectiveness of the proposed method.     

数模混合电路实现一维模拟小波变换芯片

整个电路采用标准CMOS工艺,采取模块化设计的方法,把数字频率发生器和模拟滤波器部分分开设计。数字频率发生器采用直接数字综合(DDS)的方式,来产生5种不同中心频率(10个通道),简化了传统模拟压控振荡器(VCO)的设计,提高了频率发生器的灵活性;根据精度要求,模拟高斯低通滤波器采用5阶低通滤波器来进行逼近。并论述和讨论了一种用数字和模拟混合集成电路来实现一维模拟输入的连续小波变换(CWT)芯片的方法。     

A Rank Encoder: Adaptive Analog to Digital Conversion Exploiting Time Domain Spike Signal Processing

An electronic circuit is presented that encodes an array of analog input signals into a digital number. The digital output is a rank order code that reflects the relative strength of the inputs, but is independent of the absolute input intensities. In that sense, the circuit performs an adaptive analog to digital conversion, adapting to the average intensity of the inputs (i.e. effectively normalizing) and adapting the quantization levels to the spread of the inputs. Thus, it can convey essential information with a minimal amount of output bits over a huge range of input signals.As a first processing step the analog inputs are projected into the time domain, i.e. into voltage spikes. The latency of those spikes encodes the strength of the input. This conversion enables the circuit to conduct further analog processing steps by asynchronous logic.     

Estimation of the mean of a quantized signal

The accuracy with which the mean of an analog signal can be estimated from the mean after quantization by an analog/digital converter is examined. The mean of the quantized signal is a good measure of the mean of the input, down to lower values of input noise than is commonly supposed.     

单片机与串行AD转换器TLC0834的接口设计

TLC0834是TI公司生产的八位逐次逼近模数转换器 ,具有输入可配置的多通道多路器和串行输入方式。文中以AT89C51CPU为核心 ,采用LTC0834八位串行A/D转换器设计了一个可将模拟信号转换为数字信号的电路