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利用仿Proteus真软件实现了基于单片机的温度控制器仿真设计。详细分析单片机温度控制器的硬件设计原理,介绍了其编程思路,在Proteus中完成了软、硬件的联合仿真调试,最后给出了仿真运行结果。该设计的电路及驱动程序对相应的实际应用系统具有一定的借鉴作用。 相似文献
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利用嵌入式系统仿真软件Proteus实现了基于AT89C51单片机的自动拨号报警器仿真设计。详细分析自动拨号报警器的硬件设计原理,并在Keil开发环境下设计了对应的驱动程序,在Proteus中完成了软、硬件的联合仿真调试,最后给出了仿真运行结果。通过Proteus软件的前期仿真,大大缩短了实际开发周期,降低开发成本,对于单片机应用系统、电子电路的开发和教学等都有较大的实用价值,且设计的电路及驱动程序对相应的实际应用系统具有一定的借鉴作用。 相似文献
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利用仿Proteus真软件实现了基于AT89C51单片机的温控报警器仿真设计。详细分析温控报警器的硬件设计原理,并在Keil开发环境下设计了对应的驱动程序,在Proteus中完成了软、硬件的联合仿真调试。最后给出了仿真运行结果。通过Proteus软件和Keil软件的联合调试,大大缩短了开发周期,降低开发成本。该设计的电路及驱动程序对相应的实际应用系统具有一定的借鉴作用。 相似文献
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基于PROTEUS的单片机温度采集系统设计与仿真 总被引:1,自引:0,他引:1
本文介绍一种基于Proteus 仿真实现的数字温度采集系统,阐述了系统的工作原理、硬件电路以及软件设计。该系统吸收了硬件软件化的思想,大部分功能通过软件来实现,硬件电路设计简单明了,稳定性大大提高。利用先进的嵌入式仿真平台Proteus进行系统软硬件协同仿真,以检验和评估设计的可行性和稳定性。仿真结果表明,Proteus在嵌入式开发领域具有方便快捷、降低设计成本、提高工作效率等优点。 相似文献
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本文介绍一种基于Proteus仿真实现的数字温度采集系统,阐述了系统的工作原理、硬件电路以及软件设计。该系统吸收了硬件软件化的思想,大部分功能通过软件来实现,硬件电路设计简单明了,稳定性大大提高。利用先进的嵌入式仿真平台Proteus进行系统软硬件协同仿真,以检验和评估设计的可行性和稳定性。仿真结果表明,Proteus在嵌入式开发领域具有方便快捷、降低设计成本、提高工作效率等优点。 相似文献
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主要讨论以微型计算机为操作平台、基于Widnows操作系统的单片机实验教学仿真软件的设计。实现对单片机教学实验的全软件仿真。针对自主研发的单片机实验教学仿真软件的特点和实际实验教学过程面临的问题,详细阐述软件的系统需求分析、建模及各子系统的详细设计过程。在此重点论述了仿真编译、仿真运行和仿真电路子系统的设计思路、相关算法的设计及程序设计与实现。 相似文献
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基于Proteus的单片机系统的虚拟仿真 总被引:6,自引:0,他引:6
单片机体积小、重量轻、具有很强的灵活性而且价格不高,得到了越来越广泛的应用。一般在开发基于单片机的应用系统时,需要大量的硬件设备,不仅易损坏而且携带不方便。Proteus仿真软件的出现恰好的解决了这个矛盾,利用它可随时搭建一个单片机应用系统,对其仿真。Proteus仿真软件能够提高开发效率、降低开发成本、缩短开发周期。 相似文献
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文章首先介绍泛在知识环境、泛在图书馆的内涵,接着简要论述了泛在图书馆特点,最后详细探讨了泛在知识环境下图书馆多元化的信息服务模式。 相似文献
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Riepe M.A. Silva J.P.M. Sakallah K.A. Brown R.B. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》1996,4(1):113-129
Ravel-XL is a single-board hardware accelerator for gate-level digital logic simulation. It uses a standard levelized-code approach to statically schedule gate evaluations. However, unlike previous approaches based on levelized-code scheduling, it is not limited to zero- or unit-delay gate models and can provide timing accuracy comparable to that obtained from event-driven methods. We review the synchronous waveform algebra that forms the basis of the Ravel-XL simulation algorithm, present an architecture for its hardware realization, and describe an implementation of this architecture as a single VLSI chip. The chip has about 900000 transistors on a die that is approximately 1.4 cm2, requires a 256 pin package and is designed to run at 33 MHz. A Ravel-XL board consisting of the processor chip and local instruction and data memory can simulate up to one billion gates at a rate of approximately 6.6 million gate evaluations per second. To better appreciate the tradeoffs made in designing Ravel-XL, we compare its capabilities to those of other commercial and research software simulators and hardware accelerators 相似文献
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Protues在单片机系统设计中的应用 总被引:4,自引:0,他引:4
单片机系统设计包含硬件设计和软件设计2部分。传统的方法是先进行硬件设计,然后使用仿真器在硬件电路上进行仿真调试。当硬件电路不满足设计要求时,就需要修改硬件电路重新进行调试。Proteus是单片机系统仿真软件,在Proteus环境下可直接对单片机系统进行硬件设计和软件仿真,当硬件电路不满足设计要求时,即直接修改电路重新进行仿真,直到系统软硬件满足要求为止,故应用Proteus进行单片机系统仿真设计提高开发效率。使用Protues对基于DS18B20单片机多路温度采集系统进行设计和仿真,验证该设计的正确性和可行性。 相似文献
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D. Verkest K. Van Rompaey I. Bolsens H. De Man 《Design Automation for Embedded Systems》1996,1(4):357-386
This paper addresses CoWare: an environment for design of heterogeneous systems on chip. These systems are heterogeneous both in terms of specification and implementation. CoWare is based on a communicating processes data-model which supports encapsulation and refinement and makes a strict separation between functional and communication behaviour. Encapsulation enables the reuse of existing specification and design environments (languages, simulators, compilers). Refinement provides for a consistent and integrated path from specification to implementation. The design steps that will be addressed include: system specification, simulation at various abstraction levels, data path synthesis, communication refinement and hardware/software co-design. A spread-spectrum based pager system serves to illuminate the design process in the CoWare environment. 相似文献
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针对传统电力传动仿真软件如MATLAB/SIMULINK具有仿真时间长、对计算机硬件要求高等缺点,给出了一种针对电力电子装置实时仿真系统的建立方法,通过对带阻感负载的H桥逆变器进行特性模拟,给出了基于System Generator的实现流程。在FPGA内部实现一个SPWM信号发生器、H桥仿真器及阻感负载仿真器,构成一个完整的单相H桥逆变系统。最后在Xilinx公司S3EStarter_ug230 FPGA实验平台上对整个系统进行实时仿真,并采用DAC对仿真波形进行输出显示,结果验证了整个实时仿真系统的正确性。 相似文献
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Alessandro Balboni William Fornaciari Donatella Sciuto 《Design Automation for Embedded Systems》1996,1(3):257-289
This paper presents a methodology for hardware/software co-design with particular emphasis on the problems related to the concurrent simulation and synthesis of hardware and software parts of the overall system. The proposed approach aims at overcoming the problem of having two separate simulation environments by defining a VHDL-based modeling strategy for software execution, thus enabling the simulation of hardware and software modules within the same VHDL-based CAD framework. The proposed methodology is oriented towards the application field of control-dominated embedded systems implemented onto a single chip. 相似文献
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介绍基于以太网的远程升级嵌入式系统的设计。硬件主要采用系统级芯片C8051F020单片机及RTL8019AS网络芯片设计,软件采用Keil Cx51单片机高级语言编程,网络协议选择通用的TCP/IP协议。详述了此嵌入式系统硬件和软件的设计思路,并介绍了嵌入式系统实现远程软件升级的工作原理。 相似文献
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Bose S. Agrawal P. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》1998,6(2):332-342
Even though hardware accelerators are common in very large scale integration (VLSI) computer-aided design (CAD), fault simulation is a notable exception because of limited availability of memory, the need for dynamic memory management and the complexity of the algorithms themselves. Although simplified fault simulation algorithms that assume a zero delay circuit model can be accelerated, their applicability is limited. Most application specific integrated circuits (ASIC's) designed in industry today have on-chip memory blocks of different dimensions and characteristics, enhancing the complexity of a fault simulator. In this paper, we present a multiple delay algorithm for concurrent fault simulation of logic gates and functional memory blocks. This algorithm has been implemented on the microprogrammable accelerator for rapid simulation (MARS) hardware accelerator system with a 22 MHz clock and a capacity to simulate circuits with millions of devices. Speedup factors of 20 to 30 are easily achieved when compared to software simulators running on comparable hardware platforms and using identical circuit models 相似文献
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本文详细阐述了基于单片机的温度控制系统的硬件组成、软件设计及相关的接口电路设计。并且充分考虑了系统的可靠性,采取了相应的措施予以保证。针对控制对象的特点,在系统辨识的基础上对系统的控制算法进行了仿真研究,并在单片机系统中实现了控制算法。最后针对温控系统进行了实验,通过对实验数据的分析表明本文所述的基于单片机的温度控制系统的设计的合理性和有效性。 相似文献