Optical study of porous silicon buried waveguides fabricated from p-type silicon

The realisation of optical buried waveguides fabricated from porous silicon layers is presented. The refractive index of porous silicon layer varies according to its porosity and its oxidisation process conditions. So either step or graded index waveguides are achieved. These waveguides are formed by a localised anodisation of heavily doped p-type silicon wafers. Measurements at a wavelength of 1.3 μm yield waveguide losses below 4 dB/cm. The waveguides are also characterised by the near-field-guided mode profile at 1.3 μm. This study deals with the modulation of the waveguiding-layer refractive index and the losses on waveguides fabricated from p⁺.     

Reliability and performance limitations in SiC power devices

Despite silicon carbide’s (SiC’s) high breakdown electric field, high thermal conductivity and wide bandgap, it faces certain reliability challenges when used to make conventional power device structures like power MOS-based devices, bipolar-mode diodes and thyristors, and Schottky contact-based devices operating at high temperatures. The performance and reliability issues unique to SiC discussed here include: (a) MOS channel conductance/gate dielectric reliability trade-off due to lower channel mobility as well as SiC–SiO₂ barrier lowering due to interface traps; (b) reduction in breakdown field and increased leakage current due to material defects; and (c) increased leakage current in SiC Schottky devices at high temperatures.Although a natural oxide is considered a significant advantage for realizing power MOSFETs and IGBTs in SiC, devices to date have suffered from poor inversion channel mobility. Furthermore, the high interface state density presently found in the SiC–SiO₂ system causes the barrier height between SiC and SiO₂ to be reduced, resulting in increased carrier injection in the oxide. A survey of alternative dielectrics shows that most suffer from an even smaller conduction band offset at the SiC–dielectric interface than the corresponding Silicon–dielectric interface and have a lower breakdown field strength than SiO₂. Thus, an attractive solution to reduce tunneling such as stacked dielectrics is required.In Schottky-based power devices, the reverse leakage currents are dominated by the Schottky barrier height, which is in the 0.7–1.2 eV range. Because the Schottky leakage current increases with temperature, the SiC Schottky devices have a reduction in performance at high temperature similar to that of Silcon PN junction-based devices, and they do not have the high temperature performance benefit associated with the wider bandgap of SiC.Defects in contemporary SiC wafers and epitaxial layers have also been shown to reduce critical breakdown electric field, result in higher leakage currents, and degrade the on-state performance of devices. These defects include micropipes, dislocations, grain boundaries and epitaxial defects. Optical observation of PN diodes undergoing on-state degradation shows a simultaneous formation of mobile and propagating crystal stacking faults. These faults nucleate at grain boundaries and permeate throughout the active area of the device, thus degrading device performance after extended operation.     

Electrooptic Bragg-diffraction modulators in GaAs/AlGaAsheterostructure waveguides

Reports theoretical and experimental results on electrooptic Bragg-diffraction modulators in GaAs/GaAlAs heterostructure waveguides. The devices utilize the linear electrooptic effect in periodic structures to facilitate spatial modulation of the refractive index in the waveguide. A numerical method was established to solve the waveguide equation and quantify the induced changes in the effective index of the waveguide as a result of reverse bias. The numerical calculation has established the guidelines for an optimum design of the modulator that operates in the Bragg regime. The measured diffraction efficiency of the single-grating Bragg modulator was as high as 90 percent at a driving voltage of 15 V. A device consisting of four such basic diffraction gratings was also fabricated and used to demonstrate the function of scalar addition. The highest bandwidth of the devices that have been measured exceeds 1 GHz. The planar waveguide Bragg modulators offer advantages including lower optical propagation loss, greater fabrication tolerance, and spatial separation between the diffracted and the undiffracted light beams     

Calculation of the effective indices of a GaN/InxGa1−xN optical guiding structure

In this paper, the effective refractive index of a GaN/In_0.38Ga_0.62N optical step index optical guiding structure has been investigated. The used method permits to approximate a three-dimensional optical waveguide to an equivalent waveguide where the index profile to be determined will only depend on y and z co-ordinates.The III-nitrides semiconductor devices have not been used or even investigated in the integrated optics field in order to design optical waveguides. It has been found that there exists a very good optical confinement in this device, where the In_0.38Ga_0.62N is lattice matched to the GaN.     

Advances in SiC power MOSFET technology

In recent years, SiC has received increased attention because of its potential for a wide variety of high temperature, high power, high frequency, and/or radiation hardened applications under which conventional semiconductors cannot adequately perform. For semiconductor devices designed to operate in these harsh conditions, SiC offers an unmatched combination of electronic and physical properties. The availability of SiC wafers on a commercial basis has led to the demonstration of many types of metal-oxide semiconductor (MOS)-gated devices that exploit its unique properties. To which extent the potential of SiC power MOSFET can be utilized is a question of appropriate SiC polytype, device structure, MOS interface quality and maturity of the technology. This paper reviews the present status of the SiC power MOSFETs technology that is approaching commercialization. Emphasis is placed upon the impact of SiO₂–SiC interface quality on the performance of SiC MOSFETs.     

A CV technique for measuring thin SOI film thickness

A technique is developed to measure silicon-on-insulator (SOI) silicon device film thickness using a MOSFET. The method is based on CV measurements between gate and source/drain at two different back-gate voltages. The SOI devices used in this study were n⁺ polysilicon gate n-channel MOSFETs fabricated with modified submicrometer CMOS technology on SIMOX (separation by implanted oxygen) wafers. The SIMOX wafers were implanted with a high dose of oxygen ions (10¹⁸ cm^-2) at 200 keV and subsequently annealed at 1230°C. The NMOS threshold boron implant dose is 2×10¹² cm^-2. This method is simple, nondestructive, and no special test structure is needed. Using this technique, SOI film thickness mapping was made on a finished wafer and a thickness variation of ±150 Å was found     

Modeling for floating body effects in fully depleted SOI MOSFETs

A model based on SOI MOSFET and BJT device theories is developed to describe the current kink and breakdown phenomena in thin-film SOI MOSFET drain-source current-voltage characteristics operated in strong inversion. The modulation of MOSFET current by raised floating body potential is discussed to provide an insight for understanding the suppression of current kink in fully depleted thin-film SOI devices. The proposed analytical model successfully simulates the drain current-voltage characteristics of thin-film SOI n-MOSFETs fabricated on SIMOX wafers     

A simple technique to measure generation lifetime in partiallydepleted SOI MOSFETs

This work presents a new, simple method of measuring the generation lifetime in silicon-on-insulator (SOI) MOSFETs. Lifetime is extracted from the transient characteristics of MOSFET subthreshold current. Using this technique, generation lifetime was mapped across finished SIMOX (Separation by IMplantation of OXygen) wafers and BESOI (Bonded and Etchedback SOI) wafers. BESOI material evaluated in this study had about seven times longer effective generation lifetime than SIMOX material and both the SIMOX and the BESOI are shown to have a lifetime variation of ±10% across four inch wafers     

SIMOX技术及CMOS／SIMOX器件的研究与发展

SIMOX技术是最具有发展前途的SOI技术之一。在发展薄硅层、深亚微米OMOS/SOI集成电路中,SIMOX技术占有极其重要的地位。本文综述了SIMOX基片的形成、高质量SIMOX基片的制备方法。阐述了薄硅层OMOS/SIMOX器件的工艺特点以及器件的性能特点。本文也就SIMOX技术及GMOS/SIMOX器件的研究现状及发展趋势进行了讨论。     

Low-loss, single-model optical phase modulator in SIMOX material

This paper reports results of the simulation of an optical phase modulator. The proposed modulator consists of an elongated p-i-n structure fabricated in a silicon-on-insulator material such as SIMOX. It utilizes the free-carrier effect to produce the desired refractive index change in a single-mode optical rib waveguide. The MEDICI two-dimensional semiconductor device simulation package has been employed to optimize the overlap between the injected free carriers and the propagating optical guided mode. Although the device is designed to support a single optical guided mode, it measures several micrometers in cross-sectional dimensions, thereby simplifying fabrication and allowing efficient coupling to/from other single-mode devices. Furthermore, the device has an extremely high figure of merit, predicting over 200° of induced phase shift per volt per millimeter, as well as a low drive current of less than 10 mA. This is approximately an order of magnitude lower than most other reported devices in silicon