Oxide thickness effect on boron diffusion in thin oxide p+ Si gate technology

Based on a network defect model for the diffusion of B in SiO₂ we propose that B diffuses via a peroxy linkage defect whose concentration in the oxide changes under different processing conditions. We show that as the gate oxide is scaled below 80 Å in thickness, additional chemical processes act to increase B diffusivity and decrease its activation energy, both as a function of the distance from the Si/SiO₂ interface. For a 15 Å oxide, the B diffusivity at 900°C would increase by a factor of 24 relative to diffusion in a 100 Å oxide     

Modeling boron diffusion in ultrathin nitrided oxide p+Si gate technology

Based on a network defect model for the diffusion of B in SiO₂, we propose that B diffuses via a peroxy linkage defect (pld) whose concentration in the oxide changes under different processing conditions. We show that as N is added to the gate oxide (nitridation), N atoms compete with B atoms for activation through the diffusion-defect sites. The model predicts that nitridation is ineffective in stopping B penetration when BF₂ implants dope the polysilicon gate, as well as for the case of very thin gate dielectrics with B-implanted gates     

Anomalous B penetration through ultrathin gate oxides during rapidthermal annealing

We have observed accelerated diffusion of B in ultrathin gate oxides during rapid thermal annealing (RTA) of the gate stack. Enhanced diffusion by 10-100 times over standard furnace annealing has been measured in SiO₂. The activation energy for B diffusion in SiO₂ during RTA is decreased by about 0.5 eV when compared to furnace annealing results. We propose a model that involves the capture of optically generated holes by diffusion defects which results in reduced B migration enthalpy through the modified defect, whose bonding has been weakened by the presence of captured positive charge. No similar optical radiation effect was observed when F was present in the oxide     

Low-Temperature Passivation of Amorphous-Silicon Thin-Film Transistors With Supercritical Fluids

In this letter, supercritical CO₂ (SCCO₂) fluids technology is employed for the first time to effectively passivate the defect states in hydrogenated amorphous-silicon thin-film transistors (a-Si:H TFTs) at low temperature (150degC ). With the high transport and diffusion properties of fluids, it is proposed to act as a transporter in delivering the molecules into the amorphous-silicon film and repairing defect states by the molecules. In addition, the propyl alcohol is used as the surfactant between nonpolar-SCCO₂ fluids and polar-H₂O molecules for mingling H₂O molecules uniformly with the SCCO₂ fluids. After the treatment of SCCO₂ fluids mixed with water and propyl alcohol, the a-Si:H TFT exhibited superior transfer characteristics and lower threshold voltage. The improvement in electrical characteristics could be verified by the significant reduction of density of states in the mobility gap of amorphous-silicon.     

Measurement of lateral dopant diffusion in thin silicide layers

The lateral diffusion of dopants in silicides was studied using a sensitive Schottky-barrier test structure that relies on changes in the I-V characteristic of a silicide-polysilicon interface due to dopant diffusion from the doped silicide into the polysilicon. The process flow of the test structure makes the device readily adaptable to all deposited or reacted silicides. The test structure was used to measure the diffusivity of B, As, and P in WSi₂, TiSi ₂, and CoSi₂ at temperatures from 750 to 1000°C. No measurable lateral diffusion of B in TiSi₂ was observed. In all the other cases, diffusion was several orders of magnitude higher than in silicon. These results should aid the development of process flows to prevent device degradation due to the lateral diffusion of dopants in the silicide layer     

基于CFD技术的GIS设备中SO2扩散效应

通过检测SF₆分解物可发现GIS设备故障,但设备内部分解物扩散效应会影响检测的故障特征组分气体含量,从而导致判断设备故障存在不足,因此文中针对典型SF₆分解物SO₂在GIS设备内部的扩散效应和影响因素进行研究。文中基于CFD技术,仿真模拟SO₂在设备内部的扩散效应,在压力为0.4 MPa条件下,研究了10种初始浓度对SO₂扩散的影响,拟合得到了初始浓度与扩散均匀时浓度的函数关系式,为判断故障的严重性提供理论依据。保持初始浓度不变,在压力分别为0.4 MPa、0.5 MPa、0.6 MPa、0.7 MPa和0.8 MPa的条件下,得到SO₂扩散达到均匀的时间分别为3 940 s、3 850 s、3 740 s、3 630 s和3 550 s,结果表明SF₆气体的压力环境对SO₂扩散有一定的影响,压力越大,SO₂扩散均匀所需要的时间越短。文中综合讨论了压力和初始浓度共同作用对SO₂     

Microscopic theory of hydrogen in silicon devices

Incorporation of hydrogen has a strong effect on the characteristics of silicon devices. A fundamental understanding of the microscopic mechanisms is required in order to monitor and control the behavior of hydrogen. First-principles calculations have been instrumental in providing such understanding. We first outline the basic principles that govern the interaction between hydrogen and silicon, followed by an overview of recent first-principles results for hydrogen interactions with silicon. We show that H₂ molecules are far less inert than previously assumed. We then discuss results for motion of hydrogen through the material, as relating to diffusion and defect formation. We also discuss the enhanced stability of Si-D compared to Si-H bonds, which may provide a means of suppressing defect generation. We present a microscopic mechanism for hydrogen-hydrogen exchange, and examine the metastable ≡SiH₂ complex formed during the exchange process. Throughout, we highlight issues relevant for hydrogen in amorphous silicon (used in solar cells, sensors and displays) and in Si-SiO₂ structures (used in integrated circuits). The broader impact of first-principles calculations on computational electronics will also be discussed     

Characteristics of sub-100-nm p+/n junctions fabricatedby plasma immersion ion implantation

Plasma immersion ion implantation (PIII) is an efficient method for fabricating high-quality p⁺/n diodes with junction depths below 100 nm. SiF₄ is implanted to create an amorphous Si layer to retard B channeling and diffusion, and then BF₃ is implanted. Ultrashallow p⁺/n junctions are formed by annealing at 1060 °C for 10 s. With the shallow implants, no extended defects are observed in device or peripheral areas due to rapid outdiffusion of fluorine. Diode electrical characteristics yield forward ideality factor of 1.05-1.06 and leakage current density below 2 nA/cm ² in the diode bulk. Minority-carrier lifetime below the junction is greater than 250 μs     

Postgrowth control of GaAs/AlGaAs quantum well shapes byimpurity-free vacancy diffusion

The control of quantum well shapes in GaAs/AlGaAs material after growth has been investigated both theoretically and experimentally. Double quantum well samples capped either by SiO₂ or fluorides of the group IIA elements were annealed, and energy gap shifts were measured by photoluminescence. These experimental energy shifts were compared to a theoretical model to obtain the diffusion coefficient of aluminum into the quantum wells. Fluorides were found to inhibit the intermixing process almost completely, whereas SiO₂ is known to enhance it. The aluminum diffusion coefficients for samples annealed at 920°C for 30 s are 4.0×10^-17 cm²/s and 2.1×10^-15 cm²/s for SrF₂ and SiO₂ caps, respectively. The activation energies found were 4.09 and 6.40 eV for the same two caps     

Characterization of vapor diffused Zn:LiTaO3 opticalwaveguides

Diffusion and optical properties of planar waveguides produced in LiTaO₃ by a recently developed technique that utilizes Zn diffusion from vapor phase are presented. The waveguides are obtained by 6-h diffusion at temperatures as low as 800°C. The results indicate that Zn is a fast diffusant in LiTaO₃ and has activation energies that are slightly less than those for Ti diffusion into LiTaO ₃. The diffusion temperatures for Zn are much lower than the 1150-1200°C require for Ti metal indiffusion. The diffusion coefficient of Zn at 800°C, is comparable to that of Ti at 1200°C. The resulting waveguides support both ordinary and extraordinary modes of polarization. The low temperature diffusion slows out diffusion and has been shown to be advantageous for making low-loss optical waveguides in LiTaO₃     

Two-step annealing technique for leakage current reduction inchemical-vapor-deposited Ta2O5 film

A capacitor technology developed to obtain extremely thin Ta₂ O₅ dielectric film with an effective SiO₂ film thickness down to 3 nm (equivalent to 11 fF/μm²) for a 1.5-V, low-power, high-density, 64-Mb DRAM is discussed. The Ta₂ O₅ has low leakage current, low defect density, and excellent step coverage. The key process is two-step annealing after the deposition of the film by thermal chemical vapor deposition (CVD). The first step involves ozone (O₃) annealing with ultraviolet light irradiation, which reduces the leakage current. The second step is dry oxygen (O₂) annealing, which decreases the defect density. A more significant reduction in the leakage current is attained by the combination of the two annealing steps     

缺陷诱导光学薄膜光场增强损伤分析

高损伤阈值的光学薄膜是高功率激光系统的关键器件。众多研究显示,纳米量级的缺陷是光学薄膜激光损伤的主要诱因,是制约光学薄膜向高损伤阈值发展的主要因素。基于有限差分时域方法分析了纳米大小的缺陷诱导SiO₂光学薄膜的局部光场增强导致的激光损伤。结果显示:缺陷的存在使SiO₂单层薄膜的光场分布发生了变化,无缺陷的SiO₂薄膜峰值光场位于膜层表面,而有缺陷的SiO₂薄膜峰值光场位于缺陷与薄膜的边界处,光场增强了约2.3倍;同时缺陷诱导的光场局部增强不仅依赖于缺陷与膜层之间的相对折射率,而且也依赖于缺陷的大小、缺陷在膜层中的分布深度,以及入射激光波长。缺陷与膜层的相对折射率越大,缺陷的直径越大,缺陷在膜层中的深度越小,入射激光波长越短,光场增强越大。研究结果显示光学薄膜中纳米大小的缺陷诱导的光场增强不可忽视,在研究光学薄膜的激光损伤过程中应予以考虑。     

Dielectric deposition process for Cu/SiO2 integration in a dual damascene interconnection architecture

A challenge to integrate Cu in device interconnections is to avoid Cu diffusion into silicon active zone that could seriously damage device performance, and into interlevel dielectric that could induce shorts or degrade dielectric performance. This paper relates the integration of Cu-CVD with SiO₂. Structures studied are SiO₂ deposited on Cu-CVD, and SiO₂/SiN/Cu structure: a thin SiN layer is deposited on Cu before SiO₂ to act as diffusion barrier and as an etch stop during the interconnect structure patterning. Both SiO₂ and SiN dielectric processes are made in plasma-enhanced chemical vapor deposition processes, from SiH₄ precursor with addition of, respectively, N₂O or NH₃. Cu contamination is shown to occur during the dielectric deposition onto Cu, and is enhanced by the fluorine presence in the deposition chamber. Deposition processes were evaluated in order to lower Cu contamination in the dielectric bulk. On an other hand, a noticeable degradation in Cu layer resistance was evidenced after dielectric deposition due to copper contamination during the dielectric deposition process. This issue can be addressed by the optimization of the dielectric deposition process.     

Ti-Si-N diffusion barriers between silicon and copper

Thin films of Ti-Si-N, reactively spattered from a Ti₅Si₃ target, are assessed as diffusion barriers between silicon substrates and copper overlayers. By tests on shallow-junction diodes, a 100 nm Ti₃₄Si₂₃N₄₃ barrier is able to prevent copper from reaching the silicon substrate during a 850°C/30 min anneal in vacuum. A 10 nm film prevents diffusion up to 650°C/30 min. By high-resolution transmission electron microscopy, Ti₃₄Si₂₃N₄₃ predominantly consists of nanophase TiN grains roughly 2 nm in size     

Refractory metal silicon device technology

Films 2000–5000 Å thick of Mo or W deposited over thin films of thermally grown SiO₂ are shown to be effective high temperature diffusion masks against both phosphorous and boron. These metal films may be precisely patterned and their diffusion masking properties can be used to define the source and drain regions of MOSFETs. In this manner, self-registered MOSFETs can be fabricated with a portion of the diffusion masking metal film acting as the gate electrode. Using P or B doped deposited glasses as diffusion sources, n or p channel enhancement mode MOSFETs were made by diffusion through the exposed thin SiO₂ film into p and n type Si to form source and drain junctions. Contact was subsequently made by etching holes through the oxide layers to the source and drain regions and to the refractory metal gate electrode buried within the oxide layers. These devices exhibit channel mobilities between 200 and 300 cm²/V-sec at gate voltages about 10 V above threshold. The stability of MOS structures processed in a similar manner has been measured. After being stressed at ±6 × 10⁵ V/cm and 250°C for 15 hr, these devices exhibited shifts in their C---V characteristics less than 200 mV.     

Electron transport in bipolar transistors with biaxially strainedbase layers

In silicon npn bipolar junction transistors grown on (100) oriented substrate, at base doping levels in excess of 10²⁰ boron atoms/cm³, strain induced splitting of the normally sixfold degenerated conduction band minimum becomes important and needs to be considered in modeling of injection currents. The biaxial tensile strain, originating in the smaller covalent radius of boron compared to silicon, induces a lowering of two valleys with heavy effective mass in vertical direction whereas the remaining four valleys are raised in energy. Using a coupled set of equations for the electron gas systems in the twofold and fourfold degenerated valleys, emitter and collector current formulas are derived. In the relevant case of strong f-type intervalley scattering rates compared to Auger recombination rates (which holds at least up to about 10²¹ cm^-3) collector currents are described by (V_BC=0 V) j_C=-e(D_n4n_4,0+D_n2n_2,0 )/w(e^V(BE/V(th))-1) provided that the electron diffusion length is large compared to the base width w. D_n4 D _n2, and n_4,0, n_2,0 are diffusion constants and equilibrium minority carrier concentrations in the two electron gas systems, respectively. In Si/SiGe heterojunction bipolar transistors the conduction band situation in the base is similar to that in extremely heavily boron doped (homojunction) base layers as presence of Ge also causes the conduction band minimum to split (splitting is, however, of opposite sign). Thus, the transport model discussed here applies also to that kind of device     

Formation of high quality storage capacitor dielectrics by in-siturapid thermal reoxidation of Si3N4 films inN2O ambient

This letter reports on a novel reoxidation technique for SiO₂ /Si₃N₄ (ON) stacked films by using N₂ O as oxidant. Effect of in-situ rapid thermal N₂O reoxidation (RTNO) on the electrical characteristics of thin ON stacked films are studied and compared with those of in-situ rapid thermal. O ₂ reoxidation (RTO). Prior to reoxidation, the Si₃N₄ film was deposited by rapid thermal chemical vapor deposition (RT-CVD) using SiH₄ and NH₃. Results show that RTNO of the Si₃N₄ films significantly improves electrical characteristics of ON stacked films in terms of lower leakage current, suppressed charge trapping, reduced defect density and improved time-dependent-dielectric-breakdown (TDDB), as compared to RTO of the Si₃N₄ films     

Technology limitations for N+/P+ polycidegate CMOS due to lateral dopant diffusion in silicide/polysilicon layers

The device degradation of dual-polycide-gate N⁺/P⁺ CMOS polycide transistors due to the lateral diffusion of dopants in the silicides is studied using a coupled 2-D process and device simulator. Design rule spacings between the NMOS and the PMOS transistor are given for various NMOS:PMOS gate area ratios and thermal processing conditions. The simulations show that contrary to previous findings, micrometer and submicrometer spacings are possible for certain silicide technologies using low-temperature or short higher-temperature furnace steps. Simulations show that CoSi₂ and TiSi₂ appear to be better candidates for submicrometer dual-gate applications than WSi₂     

High-κ Metal Gate MOSFETs: Impact of Extrinsic Process Condition on the Gate-Stack Quality—A Mobility Study

The effects of source/drain activation thermal budget and premetallization degas conditions on interfacial regrowth, carrier mobility, and defect densities are examined for SiO₂/HfO₂/TaN stacks. We observe a correlation between the mobility degradation and the interfacial re-growth possible with the thermal budget employed. The mobility degradation arises from an increase of defects, both within the interface layer (IL) and the high-kappa bulk, as detected by both pulsed current-voltage and charge-pumping measurements. Two junction activation processes have been applied: a conventional process (peak temperature of 1000 degC spike for t=1 s) and a Solid Phase Epitaxial Re-growth (SPER) (peak temperature of 650 degC for t=60 s). For 1000 degC spike-annealed films, where the highest SiO₂/IL defect density is observed, the consequent mobility degradation is explained by a transition region between HfO₂ and the IL which increases for high-temperature processing     

An alternative interpretation of hot electron interface degradationin NMOSFETs: isotope results irreconcilable with major defect generationby holes?

The giant deuterium isotope effect found previously for NMOS hot electron degradation is applied to study defect generation at the Si-SiO ₂ interface. The data suggest that interface defects related to hydrogen depassivation may be generated directly by channel hot electrons bombarding the interface without the necessity of injection into the oxide. This is in contrast to the standard teaching that energetic holes, created by impact ionization, and injected into the oxide are the main cause for hydrogen-related defect generation at the Si-SiO₂ interfaces