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1.
The objective of this paper is to investigate stress and strain of a special scale package‐substrate on chip for reliability evaluation or manufacture strategy in deep‐seated situation. A two‐dimensional model with one‐half of cross‐section (2D model) and a three‐dimensional model with one‐fourth of whole package (3D model) were built, respectively, to simulate the thermal stress and strain of CSP‐SOC under the condition of the standard industry thermal cycling temperature −40 to125°C. The different locations can be processed by using the two models, respectively, based on different modeling simplified modes. By using 2D model, the numerical simulation shows that the maximum deformation of the prototype occurs in printed circuit board (PCB), the maximum stress and strain occurs in the outer solder balls. In the meantime, by the results of 3D model, the simulation shows that the maximum elastic strain occurs in the interface between the solder balls and PCB, the minimum strain occurs in the underfill tape, the maximum packaging stress occurs in the edge area of the chip. The result from 3D model maybe more impersonal to reflect the stress and strain characteristics because the third direction is considered in modeling. The analysis by integrating the 2D model and 3D model can get a more comprehensive profile for the thermal investigation of chip scale package (CSP) than by using any single model. The investigation built a basis for improving reliability in engineering design of CSP product. Copyright © 2008 John Wiley & Sons, Ltd.  相似文献   

2.
Type‐2 (T2) fuzzy set was introduced to model vagueness associated with primary membership function of type‐1 (T1) fuzzy set. While it was invented to handle more fuzzy information, there are only a few algorithms (models) to deal with data in the form of T2 fuzzy variables given their three‐dimensional features. To solve the problem, we define the expected value of a T2 fuzzy variable using credibility theory in this paper. And by substituting the expected value for the original T2 fuzzy set, the vertical uncertainties of data are transferred to horizontal ones without much distortion of information. Calculations between three‐dimensional T2 fuzzy sets are thus transferred to two‐dimensional range calculations between T1 fuzzy sets. Based on that principle, we also build a T2 fuzzy expected regression model and apply it to the arbitrage pricing theory. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.  相似文献   

3.
Three‐dimensional (3D) field programmable gate array (FPGA) has evoked significant interest in wire‐length reduction for routing requirement. However, the complex design of the 3D switch boxes will limit the performance improvement and suffer from the area efficiency problems. This paper proposed a systematic graph model (SGM) for 3D switch boxes design to simplify the design process and reduce the storage memory for path programming. An interlaced 3D switch boxes and two‐dimensional (2D) switch boxes placement topology is also presented in this paper to design the 3D FPGA architecture for area efficiency purpose. The 3D place and route tool and TSMC 0.18‐µm CMOS process parameters are used to support building the experimental flow for verification. Performance evaluation shows that about 50% storage memory reduction can be obtained by using the proposed SGM‐based switch design approach. Additionally, compared with conventional architectures of 2D FPGA, the proposed scheme based on interlaced switch boxes placement approach can approximately achieve 20% delay‐power product improvement and 43% area‐delay product reduction. Copyright © 2010 John Wiley & Sons, Ltd.  相似文献   

4.
This paper presents a thermal model that uses a Fourier series solution to the heat equation to carry out transient 3D thermal simulation of power device packaging. The development and implementation of this physics‐based method is described. The method is demonstrated on a stacked 3D multichip module. The required aspects of 3D heat conduction are captured successfully by the model. Compared with previous thermal models presented in literature, it is fast, accurate and can be easily integrated with an inverter circuit simulator to model realistic converter load cycles. Copyright © 2012 John Wiley & Sons, Ltd.  相似文献   

5.
In this paper, a three‐dimensional (3D) model of threshold voltage is presented for dual‐metal quadruple‐gate metal‐oxide‐semiconductor field effect transistors. The 3D channel potential is obtained by solving 3D Laplace's equation using an isomorphic polynomial function. Threshold voltage is defined as the gate voltage, at which the integrated charge (Qinv) at the ‘virtual‐cathode’ reaches to a critical charge Qth. The potential distribution and the threshold voltage are studied with varying the device parameters like gate metal work functions, channel cross‐section, oxide thickness, and gate length ratio. Further, the drain‐induced barrier lowering has also been analyzed for different gate length ratios. The model results are compared with the numerical simulation results obtained from 3D ATLAS device simulation results. Copyright © 2015 John Wiley & Sons, Ltd.  相似文献   

6.
This paper proposes a computationally highly efficient interface between two‐dimensional (2‐D) and three‐dimensional (3‐D) electromagnetic (EM) simulators for the optimization‐oriented design of high‐order 3‐D filters. In a first step, the novel optimization‐oriented design methodology aligns the 3‐D EM simulator response with the 2‐D EM simulator response of a low‐order 3‐D filter by using an inverse linear space mapping optimization technique. Then, a second mapping performs a calibration with the optimal 2‐D and 3‐D design parameters obtained from the first mapping. The optimization of high‐order filters is carried out using only the efficient 2‐D EM simulator, and the calibration equations directly give the design parameters of the 3‐D filter. The potential and the effectiveness of the proposed optimization‐oriented design methodology are demonstrated through the design of C‐band 3‐D evanescent rectangular waveguide bandpass filters with increasing orders from three to eight. Copyright © 2014 John Wiley & Sons, Ltd.  相似文献   

7.
In this paper, a charge control model is developed for AlGaN/GaN High Electron Mobility Transistor (HEMT) and Metal Oxide Semiconductor High Electron Mobility Transistor (MOSHEMT) by considering the triangular potential well in the two‐dimensional electron gas (2DEG) and simulated with matlab . The obtained results from the developed model are compared with the experimental data for drain current, transconductance, gate capacitance and threshold voltage of both devices. The physics‐based models for 2DEG charge density, threshold voltage and gate capacitance have been developed. By using these developed models, the drain current for both linear and saturation modes is derived. The predicted threshold voltage with the variation of barrier thickness has been plotted. A positive threshold voltage can be obtained by decreasing the barrier thickness that builds up the foundation for enhancement mode MOSHEMTs. The predicted C‐V, Id‐Vgs, Id‐Vds and transconductance characteristics show an excellent agreement with the experimental results from the literature and hence validate the developed model. The results clearly establish the potential of using AlGaN/GaN MOSHEMT approach for high power microwave and switching applications. Copyright © 2015 John Wiley & Sons, Ltd.  相似文献   

8.
基于ANSYS分析的铝电解槽电磁场计算方法   总被引:4,自引:0,他引:4  
为了探讨求解电解槽电磁场的计算方法,在对实际铝电解槽做出合理假设的基础上。利用ANSYS电磁场有限元法,建立了电解槽三维电磁场有限元模型,计算了槽内电流密度分布;根据槽内电流密度分布,利用耦合法求出了熔体电流产生的磁场;采用标量磁位法计算本槽槽周母线及邻槽母线在本槽产生的磁场,熔体电流产生的磁场与槽周母线产生的磁场相加就得到总的电磁场分布。通过对实际230kA试验槽的电磁场分布计算,计算结果和实测结果比较一致,说明了该计算方法的正确性。  相似文献   

9.
Exact solution of two‐dimensional (2D) Poisson's equation for fully depleted double‐gate silicon‐on‐insulator metal‐oxide‐semiconductor field‐effect transistor is derived using three‐zone Green's function solution technique. Framework consists of consideration of source–drain junction curvature. 2D potential profile obtained forms the basis for estimation of threshold voltage. Temperature dependence of front surface potential distribution, back surface potential distribution and front‐gate threshold voltage are modeled using temperature sensitive parameters. Applying newly developed model, surface potential and threshold voltage sensitivities to gate oxide thickness have been comprehensively investigated. Device simulation is performed using ATLAS 2D (SILVACO, 4701 Patrick Henry Drive, Bldg. Santa Clara, CA 95054 USA) device simulator, and the results obtained are compared with the proposed 2D model. The model results are found to be in good agreement with the simulated data. Copyright © 2013 John Wiley & Sons, Ltd.  相似文献   

10.
The two‐dimensional (2D) physical compact model for advanced power bipolar devices such as injection enhanced gate transistor (IEGT) or Trench IGBT is presented in this paper. In order to model the complex 2D nature of these devices the ambipolar diffusion equation has been solved simultaneously for different boundary conditions associated with different areas of the device. The IEGT compact model has been incorporated into the SABER simulator and tested in standard double‐pulse switching test circuit. The compact model has been established to model a 4500V‐1500A flat pack TOSHIBA IEGT. Copyright © 2004 John Wiley & Sons, Ltd.  相似文献   

11.
Particles and fields represent two major modeling paradigms in pure and applied science at all. Particles typically exist in a spatial domain and they may interact with other particles or with field quantities defined on that domain. A field, on the other hand, defines a set of values on a region of space. In this paper, a methodology and some of the results for three‐dimensional (3D) simulations that includes both field and particle abstractions are presented. In our studies, charging damage to a semiconductor structure during plasma etching is simulated by using 3D level set profile evolution simulator. The surface potential profiles and electric field for the entire feature were generated by solving the Laplace equation using finite elements method. Calculations were performed in the case of simplified model of Ar+/CF4 non‐equilibrium plasma etching of SiO2. Copyright © 2010 John Wiley & Sons, Ltd.  相似文献   

12.
Methods of qualitative analysis, such as qualitative classification, have gained importance as an essential complement of existing quantitative analysis in numerous fields. Only a few models have been developed to deal with qualitative inputs in the form of type‐2 fuzzy(T2F) sets properly, given that traditional defuzzification method like the Karnik–Mendel algorithm performs dimensionality reduction at the cost of loss of information. To improve the situation, we define the expected value and variance of T2F set in this paper. By using a combination of them, we transfer the vertical three‐dimensional uncertainty of T2F set to horizontal range uncertainty without much distortion of information. Additionally, current classification models are unsuitable to the partial classification problem if an output is not fully assigned to a single class. We build a comprehensive qualitative classification model based on fuzzy support vector machine (FSVM) combined with type‐2 fuzzy expected regression (FER) to solve the partial classification problem as mentioned. This classifier (i.e. FER‐FSVM) makes it possible to achieve the discrimination of output while characterizing membership for each class in terms of multidimensional qualitative inputs (attributes) in the form of T2F sets. FER‐FSVM also can self‐learn the data structure and shift between FER or FSVM for classification automatically, thus largely improving the efficiency of the classification process. The new model is almost 7 times more efficient than FSVM, as shown by our empirical experiments. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.  相似文献   

13.
This paper presents image thinning algorithms using cellular neural networks (CNNs) with one‐ or two‐dimensional opposite‐sign templates (OSTs) as well as non‐unity gain output functions. Two four‐layer CNN systems with one‐dimensional (1‐D) OSTs are proposed for image thinning with 4‐ or 8‐connectivity, respectively. A CNN system, which consists of an eight‐layer CNN with two‐dimensional (2‐D) OSTs followed by another four‐layer CNN with 2‐D OSTs, is constructed for image thinning with 8‐connectivity, in which designs of B‐ and I‐templates are simpler than in CNNs with 1‐D OSTs. In the aforementioned designs, parameter values of 1‐D OSTs are chosen to make CNNs operate with thinning‐like property 1 (TL‐1), and those of 2‐D OSTs with 2‐D thinning‐like property (2‐DTL). Simulation studies show that these CNN systems have a good image thinning performance. Copyright © 1999 John Wiley & Sons, Ltd.  相似文献   

14.
In this paper, a semi‐classical one‐dimensional (1D) electron fluid model is built that is based on a classical two‐dimensional electron fluid theory taking into account electron–electron repulsive forces, which are significant in 1D system. We have used 1D fluid model to characterize the carbon nanotube (CNT) as interconnects, built a transmission line model and studied S‐parameters and group delays. We have also compared S‐parameters and group delays of CNT interconnects with the corresponding parameters of Cu interconnects. The results show that the CNT interconnects exhibit superior performance over the Cu interconnects. The results also suggest using CNT as interconnects for radio frequency (RF)/microwave applications. Copyright © 2009 John Wiley & Sons, Ltd.  相似文献   

15.
铁氧体环形电感器寄生电容的提取   总被引:3,自引:0,他引:3  
铁氧体电感器在较高频率时可等效为"电阻、电感"的串联支路与一寄生电容的并联,该电容的存在对电感器的高频性能有重要影响.建立铁氧体环形电感器2D平行平面场和3D静电场有限元模型,分别计算任意两线匝之间的杂散电容,由此得到其等效电容网络.若在电感器输入和输出线匝间加一单位电流,基于节点电压方程,则可求解得到电感器的容性集中参数——寄生电容.在假定该寄生电容与频率无关时,利用测试电感器的谐振频率,可得到该寄生电容.计算与实验对比显示,电感器的边缘效应在静电场的模型建立中占据非常重要的地位,即包括线匝杂散电容计算在内的静电场分析必须以3D模型进行.若仅考虑相邻3匝间的杂散电容,则电感器等效寄生电容值可达考虑所有线匝间杂散电容时寄生电容的95%以上,寄生电容与铁氧体磁心和导线绝缘材料的介电常数呈线性关系,且绝缘材料的介电常数对寄生电容的影响更大.  相似文献   

16.
We present a new, very accurate and fast model of photonic bandgap (PBG) structure characterized by a two‐dimensional (2D) periodic change of the refractive index and finite height, therefore named quasi 3D PBG. The new model is based on the Floquet–Bloch formalism and allows to find all the propagation characteristics including the space harmonics and the total field distribution, the propagation constants, the guided and radiated power and modal loss induced by the 2D grating. A clear explanation of the physical phenomena occurring when a wave propagates inside the 2D periodic structure is presented, including the photonic bandgap formation and the radiation effects. The approach does not require any theoretical approximation, and can be applied to study rigorously any PBG‐based multilayer structures. We have applied the model to investigate several structures for both optical and microwave applications. Copyright © 2005 John Wiley & Sons, Ltd.  相似文献   

17.
The stability of the implicit finite‐difference time‐domain (FDTD) method named alternating implicit block overlapped (AIBO) FDTD is presented in this paper. Based on separation of variables method, the spectral radius of the growth matrix for AIBO‐FDTD is obtained. Analytical results show that the AIBO‐FDTDs both in one‐dimensional and two‐dimensional cases are unconditionally stable. But it is conditionally stable in 3D case, like the conventional FDTD. Numerical results are also presented to demonstrate its effectiveness for parallel processing. Copyright © 2008 John Wiley & Sons, Ltd.  相似文献   

18.
The 3D numerical modeling of nanoscale InGaAs quantum dot is developed and the characteristics of the device are presented. The exact potential and energy profile of the Quantum Dot are computed by obtaining the solution of 3D Poisson and Schrodinger equations using homotopy analysis. The dark current is estimated by considering the Quantum Dot density, applied voltage, length of quantum dot array, number of quantum dot array and temperature. The results obtained show that the dark current is strongly influenced by Quantum Dot density and applied voltage. The developed model is physics based one and overcomes the limitations of the existing analytical models. The model is validated by comparing the results obtained with the existing models.  相似文献   

19.
In this paper, a two‐dimensional (2D) analytical sub‐threshold model for a novel sub‐50 nm multi‐layered‐gate electrode workfunction engineered recessed channel (MLGEWE‐RC) MOSFET is presented and investigated using ATLAS device simulator to counteract the large gate leakage current and increased standby power consumption that arise due to continued scaling of SiO2‐based gate dielectrics. The model includes the evaluation of surface potential, electric field along the channel, threshold voltage, drain‐induced barrier lowering, sub‐threshold drain current and sub‐threshold swing. Results reveal that MLGEWE‐RC MOSFET design exhibits significant enhancement in terms of improved hot carrier effect immunity, carrier transport efficiency and reduced short channel effects proving its efficacy for high‐speed integration circuits and analog design. Copyright © 2008 John Wiley & Sons, Ltd.  相似文献   

20.
This paper presents a finite element physics‐based power diode model with parameters established through an extraction procedure validated experimentally. The model core is a numerical module that solves the ambipolar diffusion equation through a variational formulation followed by an approximate solution with the finite element method. Other zones of the device are modeled with classical methods in an analytical module. This hybrid approach enables accurate modeling and simulation of power bipolar semiconductor devices, using standard SPICE circuit simulators, with low execution times. As physics‐based models need a significant number of parameters, an automatic parameter extraction method has been developed. The procedure, based on an optimization algorithm (simulated annealing), enables an efficient extraction of parameters using some simple device waveform measurements. Implementation details of power diode model, in IsSpice simulator, are presented. Experimental validation is performed. Results prove the usefulness of the proposed methodology for efficient design of power circuits through simulation. Copyright © 2008 John Wiley & Sons, Ltd.  相似文献   

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