连续系统仿真专用多处理机的探讨

本文分析了仿真计算任务的特点及其并行性的开发,对仿真专用机的结构形式进行了讨论。文中指出,SIMD 计算机不能允许分开发右函数计算的并行性。纯异构型多处理机的结构形式受限制也较大。文中提出了一个以同构型多处理机阵列为核心的新的仿真机结构形式,并对其系统结构特点和工作过程进行的讨论。     

数据并行计算机体系结构建模

分析并研究国内外典型的数据并行计算机体系结构建模,结合LS-MPP计算机的体系结构,提出一种基于二维阵列结构的SIMD计算机抽象模型。通过对逻辑部件的时序分析,实现关于该模型的解释型SIMD仿真器,在进行细粒度时钟精确级建模时兼顾仿真效率。仿真器测试结果表明,该抽象模型具有一定应用价值。     

蒙特卡罗仿真机及其应用

蒙特卡罗仿真机是通过对随机性问题采用Monte Carlo方法进行计算机仿真，从而得出待解问题的解。为了研究复杂的随机问题，文中提出了基于蒙特卡罗的随机模拟法的蒙特卡罗仿真机，并说明了它的基本原理。通过圆周率的计算，实践了蒙特卡罗仿真机的应用过程，从而显示出蒙特卡罗仿真法处理随机性问题的优越性和仿真普遍的适用性。     

新型火电站仿真机研究及其发展趋势

在电力行业中,计算机仿真一直是不可缺少的工具,它在减少损失、节约经费、提高效率、确保安全经济运行等方面发挥了巨大作用.该文主要介绍计算机仿真技术在火电站中的具体应用.以邯峰发电厂#1机为对象,采用STAR-90仿真支撑系统,建立起660MW火电机组11仿真机,并且在实际机组投产前建成,取得了良好的培训效果.该文最后还介绍了火电站仿真机未来的发展趋势,包括开发高精度机理性仿真数学模型以及真实的DCS仿真模型、进行性能计算与故障诊断、应用于热工人员培训及机组调试等.     

火电站计算机仿真研究及发展趋势

在电力行业中,计算机仿真一直是不可缺少的工具,它在减少损失、节约经费、提高效率、确保安全经济运行等方面发挥了巨大作用。本文主要介绍计算机仿真技术在660MW火电站中的具体应用。以邯峰发电厂#1机为对象,采用STAR-90仿真支撑系统,建立起660MW火电机组1：1仿真机,并且在实际机组投产前建成,取得了良好的培训效果。本文最后还介绍了火电站仿真机未来的发展趋势,包括开发高精度机理性仿真数学模型以及真实的DCS仿真模型、进行性能计算与故障诊断、应用于热工人员培训及机组调试等。     

适用于SIMD体系结构的FPGA分页仿真模型研究

SIMD结构能有效地开发多媒体和复杂科学计算的并行性,成为产业应用和研究的热点.在大规模SIMD体系结构研究中,为缓解FPGA芯片容量对仿真系统规模的限制,提出了适用于SIMD体系结构的FPGA分页仿真模型,有效降低了SIMD结构对FPGA计算资源和存储资源的需求,提高了SIMD结构的可验证规模.对MASA流处理器的仿真实验结果表明,不采用任何仿真优化技术,FPGA芯片EP2S180可支持的最大仿真规模为8个cluster的MASA,采用分页仿真模型,EP2S180的最大仿真规模可增加至256个cluster的MASA,而且仿真时间的增量是可接受的.     

LS MPP并行图像处理机

L S MPP是一个包含 10 2 4个处理元的细粒度并行 SIMD计算机 .为了满足低级图像处理的需要 ,以二维网格互连构成 32× 32阵列 .该文介绍 L S MPP并行处理机的系统组成、处理元结构、系统控制器、存储器组织 .并对 L S MPP并行处理机的性能进行了评估     

300MW原理型仿真机锅炉建模

介绍300MW火电机组原理型仿真机控制循环汽包锅炉的数学模型。该模型模拟了从冷态启动到停炉的全部操作过程，正确反映此类机组的动态特性，并给出了部分仿真结果。     

导弹武器系统开发中的仿真机系统综述

该文从仿真计算机开发的角度，介绍了仿真机研制中需要注意的几方面问题以及预计的发展方向，在系统体系结构、仿真语言、仿真网络等方面进行了讨论，为相关开发者提供了参考，尤其是通用计算机平台仿真应用中的软硬件配合和实时网络应用方面的分析对今后仿真机系统的开发具有很好的借鉴作用。     

名词术语解释

仿真通过对真实系统的数学模型的实验去研究一个存在的或设计中的系统,或运用数学模型描绘真实系统行为的过程和评价真实系统的方法。计算机仿真·用模拟或数字或混合的计算机实现仿真。数学模型·用于描述真实系统的一组数学方程。数学仿真·基于数学模型的计算机仿真。仿真模型·在计算机上实现的数学模型。     

A sliding memory plane array processor

A mesh-connected single-input multiple-data (SIMD) architecture called a sliding memory plane (SliM) array processor is proposed. Differing from existing mesh-connected SIMD architectures, SliM has several salient features such as a sliding memory plane that provides inter-PE communication during computation. Two I/O planes provide an I/O overlapping capability. Thus, inter-PE communication and I/O overhead can be overlapped with computation. Inter-PE communication time is invisible in most image processing tasks because the computation time is larger than the communication time on SliM. The ability to overlap inter-PE communication with computation, regardless of window size and shape and without using a coprocessor or an on-chip DMA controller is unique to SliM     

Mapping massive SIMD parallelism onto vector architectures for simulation

A software behavioural simulator for a new massively parallel single-instruction/multiple data (SIMD) architecture has been developed that can accurately simulate the entire 16, 384 bit-serial processor array. The key to this high performance modelling is the exploitation of an inherent mapping that exists between massively parallel SIMD architectures and the vector architectures used in many high performance scientific super-computers. The new SIMD architecture, called BLITZEN, is based on the Massively Parallel Processor (MPP) built for NASA by Goodyear in the late 1970s. By simulating the full-scale machine with very high performance, the simulator allows development of algorithms and high-level software to proceed before realization of the hardware. This paper describes the SIMD - vector architecture mapping, the highly vectorized simulator in which it is used, and how the result was a simulator that achieved a level of performance three orders of magnitude faster than the conventional uniprocessor approach.     

A Parallel Algorithm for Volume Projections on SIMD Mesh-Connected Computers

Projections are widely used in machine vision, volume rendering, and computer graphics. For applications with 3D volume data, we design a parallel projection algorithm on SIMD mesh-connected computers and implement the algorithm on the Parallel Algebraic Logic (PAL) computer. The algorithm is a parallel ray casting algorithm for both orthographic and perspective projections. It decomposes a volume projection into two transformations that can be implemented in the SIMD fashion to solve the data distribution and redistribution problem caused by non-regular data access patterns in volume projections.     

Implementation of a Sliding Memory Plane Image Processor

This paper presents architectures and implementation of a Sliding Memory Plane (SliM) Image Processor to build a SIMD parallel computer. The paper also proposes an enhanced multiplication algorithm to reduce the gate count and the number of cycles. The SliM chip consists of mesh-connected 5×5 PEs. Due to the idea ofsliding, that is, overlapping the inter-PE communication time with the computation time, SliM can greatly reduce the inter-PE communication overhead. In addition, four operations corresponding to ALU, shift, data I/O, and inter-PE communication can be grouped into an instruction to be executed in a cycle simultaneously. The implemented SliM chip operates at 25 MHz and gives 625 MIPS. Because of a mesh topology, a large number of chips can be easily connected to form a SIMD parallel computer. We have implemented the scalable SliM Array Processor and developed parallel algorithms for real-time image processing.     

SIMD计算机的优化编译器设计

利用处理器的相关资源,提高编译器优化性能和增强代码可适应性是SIMD处理器优化编译的关键。该文基于M语言和LSSIMD体系结构,结合现代编译器的编译技术,提出针对SIMD协处理器编译器的优化和实现方法,包括寄存器分配、单值合并、代码压缩等。实验结果表明,编译生成的目标代码准确、高效。     

二维SIMD结构的低功耗调度

针对二维SIMD结构,提出一种可以动态关闭空转部件且结合编译器、指令集和体系结构支持的低功耗调度算法,其中包括编译器优化二维SIMD指令,功耗指令发出部件开关信号,系统接收信号并执行。采用对不同功能单元分别调度的方式和部件局部化的方法。在模拟器上的实验结果表明该方法可以节省整个系统约15％的能量消耗。     

Efficient mapping algorithm of multilayer neural network on torus architecture

This paper presents a new efficient parallel implementation of neural networks on mesh-connected SIMD machines. A new algorithm to implement the recall and training phases of the multilayer perceptron network with back-error propagation is devised. The developed algorithm is much faster than other known algorithms of its class and comparable in speed to more complex architecture such as hypercube, without the added cost; it requires O(1) multiplications and O(log N) additions, whereas most others require O(N) multiplications and O(N) additions. The proposed algorithm maximizes parallelism by unfolding the ANN computation to its smallest computational primitives and processes these primitives in parallel.     

一种基于C扩展的SIMD的并行程序设计语言

ＳＩＭＣ（ＳＩＭＤＣ）是通过对Ｃ语言进行语法扩展（未进行语义扩展）得到的支持ＳＩＭＤ（ｓｉｎｇｌｅｉｎｓｔｒｕｃｔｉｏｎｍｕｌｔｉｐｌｅｄａｔａ）并行程序设计的并行语言．ＳＩＭＣ可方便地描述ＳＩＭＤ并行算法，具有ＳＩＭＤ计算机系统结构定义能力，可支持多种系统结构上的并行算法研究．ＳＩＭＣ语言的模拟执行系统已在单机上实现，并作为作者研究开发的ＳＩＭＤ计算机程序设计及性能评价模拟环境的并行程序设计语言，用于ＳＩＭＤ计算机算法及结构的性能评价.     

二维SIMD体系结构研究与模拟器实现

二维SIMD结构是指一个由N×N的处理单元按一定的拓扑结构连接组成的阵列结构,其同行/列的处理单元以SIMD方式工作。二维SIMD结构作为多媒体加速部件广泛应用在各种多媒体处理的SOC中,因此其体系结构的设计是获得高性能多媒体计算的重要因素。结合多媒体应用程序的特点,研究分析不同设计参数对二维SIMD结构性能的影响,并设计实现了一个二维SIMD结构的性能模拟器。实验结果显示了二维SIMD结构对多媒体程序有很好的加速比并证实了研究分析结论。