采用LonWorks技术设计基于主机的智能节点

采用LonWorks现场总线技术设计基于主机的智能节点。节点采用AT89C51单片机为主处理器,神经元芯片3150为从处理器。主处理器负责对模拟信号和数字信号的采集,从处理器负责节点的通信和数据的转发。该节点在测控现场有很大的应用价值。     

低功耗无线传感器网络节点的设计

文章分析了传感器节点的能耗,介绍了一种采用MSP430F149处理器和无线收发模块设计的低功耗无线传感器网络节点,阐述了该节点的组成、节点处理控制单元、无线通信单元和传感探测单元的设计及节点软件的设计等。     

一种Host-Based结构的LonWorks智能节点的设计与实现

LonWorks节点是LonWorks现场总线的一个重要的组成部分,介绍了一种Host-Based结构的LonWorks智能节点的设计应用.这种LonWorks节点采用神经元芯片TMPN3120作为从处理器,主要负责Lon网络通信;DSP芯片TMS320F240作为主处理,它能够大大提高LonWorks节点的数据处理和控制的能力.     

基于音频信息采集的LonWorks节点的研究

为增强LonWorks技术控制音频信息的能力,设计了基于SPCE061A单片机和MC143150神经元芯片的LonWorks节点.阐述了SPCE061a单片机和MC143150神经元芯片的功能特点,分析了节点中SPCE061A与MC143150两处理器之间串行接口的设计,接口通过硬件握手协议避免了数据的丢失;节点的软件部分给出了节点对音频数据采集和处理的程序流程图,对相关寄存器的设置进行了介绍,并给出了利用Neuron C语言中的io-changes事件、IO对象、IO库函数和网络变量将节点采集到的信息发送到LonWorks网络上.实验表明节点通信性能良好.     

基于低能耗的无线传感器节点硬件设计方法研究

无线传感技术相对于传统的传感技术具有方便、快捷、成本低等优点.由无线传感器构成的无线传感器网络能够在无人区域内迅速的构建网络拓扑,达到传输探测信息的目的.但由于其传感设备节点功耗受限问题的存在,给无线传感器网络的稳定性及可靠性带来一些问题.主要针对无线传感器网络中的节点功耗受限的问题,将传感器节点分为处理器单元、传感单元,无线传输单元、电源管理单元4个单元进行研究与分析,探讨如何通过合理设计电路来降低设备功耗,提高设备的能量利用率,从而达到提高无线传感器网络的稳定性和可靠性,延长网络生命周期的目的.     

基于CPLD和多处理器结构的控制网络节点设计

节点是控制网络系统的基本构成单元。论文提出了一种基于CPLD和多处理器结构的控制网络节点设计方法。它能够提高单节点的并行处理能力,其模块化结构增强了节点的可靠性;不同处理器之间的连接形式可以通过VHDL等软件在线改变,使得节点柔性与扩展性提高。同时,其软件可按照不同处理器模块分步开发,软件结构也得以简化,有利于节点的调试。遵循该方法,成功开发出一种多功能LonWorks控制网络节点。     

基于LonWorks技术的智能节点设计

LonWorks智能节点是LonWorks现场总线的一个非常重要的组成部分,本文介绍了一种Host—Based结构的LonWorks智能节点的设计方法。并采用Motorola公司生产的MC143150神经元芯片,主要负责Lon网络通信;采用DSP芯片TMS320F240作为主处理器,它能够大大提高LonWorks节点的数据处理和控制的能力。     

基于ARM的GPS/无源北斗互备PMU研究与设计

介绍了同步相量测量单元,在广域测量系统中实现对电力系统各个节点数据的同步采集和相量监测。分析了利用北斗信号的必要性和可能性,设计基于ARM处理器与DSP处理器相结合的双CPU的结构,完成对GPS信号和北斗信号的采集和处理,实现PMU单元的实时数据信息采集及时标数据的发送和接收,与以太网络连接。     

面向新一代众核处理器的高性能SNC的设计与验证

先进可扩展接口(AXI)是ARM公司推出的应用于高频系统的通道型总线,广泛应用于各种高性能SoC设计中.当前,通用处理器的主流是多核处理器,而多核处理器的主流是"通用DSP内核+应用专用核心"的异构融合结构.应用专用核心分为两种结构:同构多核和异构多核.在同构多核结构中,随着核数的增加,逐渐采用超节点结构,即在处理器中,几个内核构成一个超级节点,通过超级节点控制器实现片上网络与DSP内核之间的数据交互.在这项工作中,论文基于AXI总线,为新一代多核处理器设计了一种高性能、高带宽、低延迟的超级节点控制器.该超级节点控制器设计具有单独的读写数据通道,使用双向VALID和READY信号来实现握手机制,支持不对齐的数据传输、burst数据传输、广播操作、并支持乱序交易等.验证和综合结果表明,该超级节点控制器可以正确实现DSP内核与片上网络之间的数据交互,性能满足设计要求.     

基于PSoC的无线传感器网络节点设计

无线传感器网络节点的优劣直接关系到无线传感器网络的生存周期及其传递的数据的可靠性.用PSoC(可编程片上系统)作为处理器模块的处理器,运用于无线传感器网络节点的设计之中,使无线传感器网络节点降低功耗,缩小体积,提高可靠性,降低成本,增加生存周期,缩短开发周期.论文首先简单介绍了PSoC独特的内部资源及其特有的功能,然后详细阐述了采集环境的温度和湿度的无线传感器网络节点的硬件电路和处理器模块的软件设计方案.最后给出了实验结果,其实测结果表明设计的传感器系统性能良好.     

基于中断方式LON节点处理器SPI接口设计

为增强LonWorks节点控制能力,采用单片机作为LonWorks节点的主处理器,Neuron芯片作为从处理器;主从处理器采用SPI通信接口;SPI接口利用Neuron芯片中声明的Neurowire对象和AT89S51单片机中用软件模拟SPI操作,以边沿触发中断的方式在8个时钟脉冲的上升沿和下降沿完成主从处理器的数据传递。实际使用表明:用SPI方式实现单片机与Neuron芯片的通信提高Neuron芯片利用率,提高节点的性价比,增强系统可靠性,降低节点开发难度,缩小节点体积。     

Evaluating scheduling policies for fine-grain communication protocols on a cluster of SMPs

Distributed-memory parallel computers and networks of workstations (NOWs) both rely on efficient communication over increasingly high-speed networks. Software communication protocols are often the performance bottleneck. Several current and proposed parallel systems address this problem by dedicating one general-purpose processor in a symmetric multiprocessor (SMP) node specifically for protocol processing. This protocol processing convention reduces communication latency and increases effective bandwidth, but also reduces the peak performance since the dedicated processor no longer performs computation. In this paper, we study a parallel machine with SMP nodes and compare two protocol processing policies: the Fixed policy, which uses a dedicated protocol processor; and the Floating policy, where all processors perform both computation and protocol processing. The results from synthetic microbenchmarks and five macrobenchmarks show that: (i) a dedicated protocol processor benefits light-weight protocols much more than heavy-weight protocols, (ii) a dedicated protocol processor is generally advantageous when there are four or more processors per node, (iii) multiprocessor node performance is not as sensitive to interrupt overhead as uniprocessor node because a message arrival is likely to find an idle processor on a multiprocessor node, thereby eliminating interrupts, (iv) the system with the lowest cost-performance will include a dedicated protocol processor when interrupt overheads are much higher than protocol weight—as in light-weight protocols.     

ARM和nRF24L01的无线图像采集系统

针对传统有线图像采集系统布线麻烦、成本高、布局固定、灵活性差的特点,将短距离无线通信技术应用到分布式图像传输,设计基于ARM处理器和nRF24L01无线传输模块的远程图像采集和传输系统。该系统以Cortex-A8内核的三星S5PV210处理器和ARM9内核S3C2440处理器为主控部件,无线收发模块选用的是nRF24L01。文中详细阐述了该系统的各个硬件模块设计方案,给出了各部分的软件设计。实验证实,该系统工作稳定,传输效率高,可以实现对远程节点图像的采集和无线传输。     

Simulations of pulse propagation in optical fibers using graphics processor units

Several simple cases of pulse propagation in optical fibers have been simulated using a graphics processor unit. Comparisons with simulations in a computer processor unit are also reported. Speedups from 4 to 36 have been obtained by different numerical methods, reaching a similar accuracy both in computer processor unit and in graphics processor unit, working with double-precision floating point numbers. Best results are achieved in simulations when the number of points in t grid rises. Therefore, the results indicate that graphics processor units could be a good tool to improve numerical simulations of pulse propagation in fibers.     

Using hybrid MPI and OpenMP programming to?optimize communications in parallel loop self-scheduling schemes for multicore PC clusters

Recently, a series of parallel loop self-scheduling schemes have been proposed, especially for heterogeneous cluster systems. However, they employed the MPI programming model to construct the applications without considering whether the computing node is multicore architecture or not. As a result, every processor core has to communicate directly with the master node for requesting new tasks no matter the fact that the processor cores on the same node can communicate with each other through the underlying shared memory. To address the problem of higher communication overhead, in this paper we propose to adopt hybrid MPI and OpenMP programming model to design two-level parallel loop self-scheduling schemes. In the first level, each computing node runs an MPI process for inter-node communications. In the second level, each processor core runs an OpenMP thread to execute the iterations assigned for its resident node. Experimental results show that our method outperforms the previous works.     

Hardware support for memory protection in sensor nodes

With reference to the typical hardware configuration of a sensor node, we present the architecture of a memory protection unit (MPU) designed as a low-complexity addition to the microcontroller. The MPU is aimed at supporting memory protection and the privileged execution mode. It is connected to the system buses, and is seen by the processor as a memory-mapped input/output device. The contents of the internal MPU registers specify the composition of the protection contexts of the running program in terms of access rights for the memory pages. The MPU generates a hardware interrupt to the processor when it detects a protection violation. The proposed MPU architecture is evaluated from a number of salient viewpoints, which include the distribution, review and revocation of access permissions, and the support for important memory protection paradigms, including hierarchical contexts and protection rings.     

电气设备温度监测的无线传感器网络节点设计

提出了一种可用于对封闭式开关柜内的电气设备进行测温的无线传感嚣网络( WSNs)节点的设计方案.用可编程片上系统(PSoC)作为处理器模块的处理器,运用于WSNs节点的设计之中,使WSNs节点降低功耗,缩小体积,提高可靠性,降低成本,增加生存周期,缩短开发周期.详细阐述了节点系统的硬件和软件实现,并给出了实验结果,其实...     

GF(2m)上椭圆曲线密码协处理器的硬件实现

给出了一款GF(2m)上椭圆曲线密码协处理器的描述。对于椭圆曲线密码学中最关键的模乘运算采用蒙格玛利模乘算法，并且对这种算法进行改进，得到一种通用性较强的算法。对于硬件实现中遇到的判断寄存器是否为零，给出了一种快速方法。该协处理器共分为6部分，分别为：主控制单元，椭圆曲线点乘单元，椭圆曲线点加单元，椭圆曲线点倍单元，有限域加法单元，蒙格玛利模乘算法单元。     

基于PowerPC主机处理器的计算机模块设计

PowerPC主机处理器MPC7447A是高性能、低功耗的32位嵌入式处理器,文章设计了基于MPC7447A的单板计算机,详细说明了硬件设计中处理器节点设计、控制器设计等要点,并介绍了VxWorks BSP的开发方法。