A Reference Architecture to support the development of mobile applications based on self-adaptive services

Nowadays, most human daily tasks can be performed by means of Mobile Applications (MobApps). Devices running such applications have some limitations (e.g., processing and storage) compared to personal computers. Therefore, integration of MobApps into service-based systems has been a feasible alternative to overcome these limitations. Moreover, these applications must be prepared to deal with the changes at runtime (e.g., user’s new needs or modifications in their execution environment). In parallel, Reference Architectures (RA) have been used as an important way to support the development, standardization, and evolution of software systems. Although relevant, RA for the domain of MobApps based on services that require adaptation at runtime is still an issue to be explored in depth. This paper presents a RA for Self-MobApps (named RA4Self-MobApps), which aims to support the development of such applications. To show the applicability of our RA, a case study was conducted. As result, we observe our RA has good perspective to efficiently contribute to the Self-MobApps domain.     

Parallel Software Abstractions for Structured Adaptive Mesh Methods

We describe and analyze parallelization techniques for the implementation of portable structured adaptive mesh applications on distributed memory parallel computers. Such methods are difficult to implement on parallel computers because they employ elaborate dynamic data structures to selectively capture localized irregular phenomena. Our infrastructure supports a set of layered abstractions that encapsulate low-level details of resource management, such as grid generation, interprocessor communication, and load balancing. Our layered design also provides the flexibility necessary to accommodate new applications and to fine-tune performance. This flexibility has enabled us to show that the uniformity restrictions imposed by a data parallel Fortran implementation (e.g., HPF) would significantly impact performance of structured adaptive mesh methods. We present computational results from eigenvalue computation arising in materials design.     

Vector-supercomputers

Today, the field of high-speed computers and supercomputing applications is dominated by the vector-processor architecture. This paper gives a survey on the architectural principles of vector computers like segmentation, pipelining, and chaining as well as on the spectrum of real systems available in the market. It illuminates the potentiality and the limitations of vectorization strategies. Recent developments towards multi-vectorcomputer systems give impact to new supercomputing concepts balancing vectorization versus parallel computation by exploiting multitasking principles. Covering a wide spectrum of applications vector-supercomputers are making relevant contributions to the progress in scientific research and technology.     

A slowdown model for applications executing on time-shared clustersof workstations

Distributed applications executing on clustered environments typically share resources (computers and network links) with other applications. In such systems, application execution may be retarded by the competition for these shared resources. In this paper, we define a model that calculates the slowdown imposed on applications in time-shared multi-user clusters. Our model focuses on three kinds of slowdown: local slowdown, which synthesizes the effect of contention for CPU in a single workstation; communication slowdown, which synthesizes the effect of contention for the workstations and network links on communication costs; and aggregate slowdown, which determines the effect of contention on a parallel task caused by other applications executing on the entire cluster, i.e., on the nodes used by the parallel application. We verify empirically that this model provides an accurate estimate of application performance for a set of compute-intensive parallel applications on different clusters with a variety of emulated loads     

Model driven middleware: A new paradigm for developing distributed real-time and embedded systems

Distributed real-time and embedded (DRE) systems have become critical in domains such as avionics (e.g., flight mission computers), telecommunications (e.g., wireless phone services), tele-medicine (e.g., robotic surgery), and defense applications (e.g., total ship computing environments). These types of system are increasingly interconnected via wireless and wireline networks to form systems of systems. A challenging requirement for these DRE systems involves supporting a diverse set of quality of service (QoS) properties, such as predictable latency/jitter, throughput guarantees, scalability, 24x7 availability, dependability, and security that must be satisfied simultaneously in real-time. Although increasing portions of DRE systems are based on QoS-enabled commercial-off-the-shelf (COTS) hardware and software components, the complexity of managing long lifecycles (often ∼15-30 years) remains a key challenge for DRE developers and system integrators. For example, substantial time and effort is spent retrofitting DRE applications when the underlying COTS technology infrastructure changes.This paper provides two contributions that help improve the development, validation, and integration of DRE systems throughout their lifecycles. First, we illustrate the challenges in creating and deploying QoS-enabled component middleware-based DRE applications and describe our approach to resolving these challenges based on a new software paradigm called Model Driven Middleware (MDM), which combines model-based software development techniques with QoS-enabled component middleware to address key challenges faced by developers of DRE systems — particularly composition, integration, and assured QoS for end-to-end operations. Second, we describe the structure and functionality of CoSMIC (Component Synthesis using Model Integrated Computing), which is an MDM toolsuite that addresses key DRE application and middleware lifecycle challenges, including partitioning the components to use distributed resources effectively, validating software configurations, assuring multiple simultaneous QoS properties in real-time, and safeguarding against rapidly changing technology.     

Attitudes towards specific uses of the computer Quantitative, decisionmaking and record-keeping applications

A survey of 203 undergraduates indicated that there are three clusters of computer applications about which respondents hold similar attitudes: quantitative applications (e.g. processing bills), decisionmaking applications (e.g. diagnosing medical problems) and record-keeping applications (e.g. storing information about criminals). Respondents were favourable towards quantitative and record-keeping applications but rejected decisionmaking applications, especially those involving decisions traditionally made by psychologists. Experience with computers and perceptions of the computer as efficient, humanizing and enjoyable were correlated significantly with attitudes towards specific applications. Locus of control and interpersonal trust were not related to attitudes. Interpretations of potentially dehumanizing effects of computers were discussed, along with implications of attitudes towards specific applications for decisions about how computers ought to be used.     

The marketplace of high-performance computing

In this paper we analyze the major trends and changes in the High-Performance Computing (HPC) market place since the beginning of the journal `Parallel Computing'. The initial success of vector computers in the 1970s was driven by raw performance. The introduction of this type of computer systems started the area of `Supercomputing'. In the 1980s the availability of standard development environments and of application software packages became more important. Next to performance these factors determined the success of MP vector systems, especially at industrial customers. MPPs became successful in the early 1990s due to their better price/performance ratios, which was made possible by the attack of the `killer-micros'. In the lower and medium market segments the MPPs were replaced by microprocessor based symmetrical multiprocessor (SMP) systems in the middle of the 1990s. There success formed the basis for the use of new cluster concepts for very high-end systems. In the last few years only the companies which have entered the emerging markets for massive parallel database servers and financial applications attract enough business volume to be able to support the hardware development for the numerical high-end computing market as well. Success in the traditional floating point intensive engineering applications seems to be no longer sufficient for survival in the market.     

Scalability limits of Bag-of-Tasks applications running on hierarchical platforms

Bag-of-Tasks applications are parallel applications composed of independent (i.e., embarrassingly parallel) tasks, which do not communicate with each other, may depend upon one or more input files, and can be executed in any order. Each file may be input for more than one task. Examples of Bag-of-Tasks (BoT) applications include Monte Carlo simulations, massive searches (such as key breaking), image manipulation applications and data mining algorithms. A common framework to execute BoT applications is the master-slave topology, in which the user machine is used to control the execution of tasks. In this scenario, a large number of concurrent tasks competing for resources (e.g., CPU and communication links) severely limits application execution scalability. This paper is devoted to study the scalability of BoT applications running on multi-node systems (such as clusters and multi-clusters) organized as hierarchical platforms, considering several communication paradigms. Our study employs a set of experiments that involves the simulation of various large-scale platforms. The results presented provide important guidelines for improving the scalability of practical applications.     

Performance evaluation and comparison of parallel conjugate gradient on modern multi-core accelerator and massively parallel systems

Two parallel computer paradigms available today are multi-core accelerators such as the Sony, Toshiba and IBM Cell or Graphics Processing Unit (GPUs), and massively parallel message-passing machines such as the IBM Blue Gene (BG). The solution of systems of linear equations is one of the most central processing unit-intensive steps in engineering and simulation applications and can greatly benefit from the multitude of processing cores and vectorisation on today's parallel computers. We parallelise the conjugate gradient (CG) linear equation solver on the Cell Broadband Engine and the IBM Blue Gene/L machine. We perform a scalability analysis of CG on both machines across 1, 8 and 16 synergistic processing elements and 1–32 cores on BG with heptadiagonal matrices. The results indicate that the multi-core Cell system outperforms by three to four times the massively parallel BG system due to the Cell's higher communication bandwidth and accelerated vector processing capability.     

Implementing molecular dynamics on hybrid high performance computers – Particle–particle particle-mesh

The use of accelerators such as graphics processing units (GPUs) has become popular in scientific computing applications due to their low cost, impressive floating-point capabilities, high memory bandwidth, and low electrical power requirements. Hybrid high-performance computers, machines with nodes containing more than one type of floating-point processor (e.g. CPU and GPU), are now becoming more prevalent due to these advantages. In this paper, we present a continuation of previous work implementing algorithms for using accelerators into the LAMMPS molecular dynamics software for distributed memory parallel hybrid machines. In our previous work, we focused on acceleration for short-range models with an approach intended to harness the processing power of both the accelerator and (multi-core) CPUs. To augment the existing implementations, we present an efficient implementation of long-range electrostatic force calculation for molecular dynamics. Specifically, we present an implementation of the particle–particle particle-mesh method based on the work by Harvey and De Fabritiis. We present benchmark results on the Keeneland InfiniBand GPU cluster. We provide a performance comparison of the same kernels compiled with both CUDA and OpenCL. We discuss limitations to parallel efficiency and future directions for improving performance on hybrid or heterogeneous computers.     

A neural-network architecture for syntax analysis

Artificial neural networks (ANNs), due to their inherent parallelism, offer an attractive paradigm for implementation of symbol processing systems for applications in computer science and artificial intelligence. The paper explores systematic synthesis of modular neural-network architectures for syntax analysis using a prespecified grammar-a prototypical symbol processing task which finds applications in programming language interpretation, syntax analysis of symbolic expressions, and high-performance compilers. The proposed architecture is assembled from ANN components for lexical analysis, stack, parsing and parse tree construction. Each of these modules takes advantage of parallel content-based pattern matching using a neural associative memory. The proposed neural-network architecture for syntax analysis provides a relatively efficient and high performance alternative to current computer systems for applications that involve parsing of LR grammars which constitute a widely used subset of deterministic context-free grammars. Comparison of quantitatively estimated performance of such a system (implemented using current CMOS VLSI technology) with that of conventional computers demonstrates the benefits of massively parallel neural-network architectures for symbol processing applications.     

PCB—A Distributed Computing System in CORBA

CORBA (common object request broker architecture) provides a conceptual software bus for distributed object systems, which is not only suitable for enterprise distributed computing, but also suitable for parallel–distributed scientific computations. This paper describes a distributed computing system, named PCB (parallel component bus), based on a cluster of computers with the Java/CORBA technologies. The architecture of the system supports scalability in either SPMD or MIMD models. The measured performance of a parallel computation shows that the system can reach N-fold speedup for large grain applications.     

Fifth generation and VLSI architectures

Most Western Governments (USA, Japan, EEC, etc.) have now launched national programmes to develop computer systems for use in the 1990s. These so-called Fifth Generation computers are viewed as “knowledge” processing systems which support the symbolic computation underlying Artificial Intelligence applications. The major driving force in Fifth Generation computer design is to efficiently support very high level programming languages (i.e. VHLL architecture).

Historycally, however, commercial VHLL architectures have been largely unsuccesful. The driving force in computer designs has principally been advances in hardware which at the present time means architectures to exploit very large scale integration (i.e. VLSI architecture).

This paper examines VHLL architectures and VLSI architectures and their probable influences on Fifth Generation computers. Interestingly the major problem for both architecture classes is parallelism; how to orchestrate a single parallel computation so that it can be distributed across an ensemble of processors.     

Adaptive load balancing of iterative computation on heterogeneous nondedicated systems

Dynamic load balancing in heterogeneous systems is a fundamental research topic in parallel computing due to the high availability of such systems. The efficient utilization of the heterogeneous resources can significantly enhance the performance of the parallel system. At the same time, adapting parallel codes to state-of-the-art parallel computers composed of heterogeneous multinode–multicore processors becomes a very hard task because parallel codes are highly dependent on the parallel architectures. That means that applications must be tailored requiring a great deal of programming effort. We have developed the ALBIC (Adaptive Load Balancing of Iterative Computation) system that allows for the dynamic load balancing of iterative codes in heterogeneous dedicated and nondedicated Linux based systems. In order to validate the system several parallel codes have been analyzed in different scenarios. The results show that the ALBIC approach achieves better performance than the other proposal. This lightweighted library eases porting homogeneous parallel codes to heterogeneous platforms, since the code intrusion is low and the programming effort is quite reduced.     

A Java-based parallel platform for the implementation of evolutionary computation for engineering applications

As computers continually improve in performance and decrease in manufacturing cost, distributed systems consisting of multiple computers implemented as parallel computation platforms have become viable for engineering applications which demand intensive computation power. This paper proposes an extended version of a previously developed low cost parallel computation platform called para worker. The system is based on a cluster structure which is a form of a distributed system. The new system is termed para worker 2 which differentiates it from the earlier system. The new proposed system adds enhanced features of improved dynamic object reallocation, adaptive consistency protocols, and location transparency. Performance of the para worker 2 has proven to be superior to the para worker. Testing was based on an execution of Genetic Algorithm to solve the Economic Dispatch problem in Power Engineering. The proposal is particularly useful for the implementation and execution of computational intelligence techniques such as evolutionary computing for engineering applications.     

Automatically constructing trusted cluster computing environment

Trusted Computing is a technology proposed by the Trusted Computing Group (TCG) to solve security problems in computers. A lot of work has been conducted to support Trusted Computing for individual computers; however little has been done for distributed systems (e.g., clusters). If malicious or unqualified applications are deployed on cluster nodes, users may obtain forged results or their data may be leaked out. In this paper, a methodology of the Trusted Cluster Computing (TCC) is proposed to automatically construct user-trustable cluster computing environments. User-specified applications are downloaded from user-specified locations and automatically and dynamically deployed on cluster nodes. To reduce the dynamic-deployment overhead, a novel Heuristics-based Overhead-Reducing (HOR) replacement strategy is also proposed. A highly configurable simulator has been implemented to perform a series of simulations. The simulation results demonstrate that the HOR can produce Average Speedup with up to 14% (light workload), 10% (medium workload), 8% (heavy workload) higher than that of LRU-based strategies, with a typical setting of the Average Ratio of Deployment time to Execution time (ARDE) being 0.2.     

Parallel computers for region-level image processing

It is well known that parallel computers can be used very effectively for image processing at the pixel level, by assigning a processor to each pixel or block of pixels, and passing information as necessary between processors whose blocks are adjacent. This paper discusses the use of parallel computers for processing images at the region level, assigning a processor to each region and passing information between processors whose regions are related. The basic difference between the pixel and region levels is that the regions (e.g. obtained by segmenting the given image) and relationships differ from image to image, and even for a given image, they do not remain fixed during processing. Thus, one cannot use the standard type of cellular parallelism, in which the set of processors and interprocessor connections remain fixed, for processing at the region level. Reconfigurable cellular computers, in which the set of processors that each processor can communicate with can change during a computation, are more appropriate. A class of such computers is described, and general examples are given illustrating how such a computer could initially configure itself to represent a given decomposition of an image into regions, and dynamically reconfigure itself, in parallel, as regions merge or split.     

Predicting the behavior of large scale P2P systems by parallel discrete event simulation

P2P systems are becoming the dominator of Internet.Such systems are typically composed of thousands to millions of physical computers,which make it difficult to predict their behaviors without a large scale distributed system simulator.This paper is an attempt to predict the behavior of large scale P2P systems by building a novel parallel simulator:AegeanSim,which provides parallel discrete event simulation of such systems on high performance server clusters.We abstract the execution of P2P applications wit...     

A novel compiler support for automatic parallelization on multicore systems

The widespread use of multicore processors is not a consequence of significant advances in parallel programming. In contrast, multicore processors arise due to the complexity of building power-efficient, high-clock-rate, single-core chips. Automatic parallelization of sequential applications is the ideal solution for making parallel programming as easy as writing programs for sequential computers. However, automatic parallelization remains a grand challenge due to its need for complex program analysis and the existence of unknowns during compilation. This paper proposes a new method for converting a sequential application into a parallel counterpart that can be executed on current multicore processors. It hinges on an intermediate representation based on the concept of domain-independent kernel (e.g., assignment, reduction, recurrence). Such kernel-centric view hides the complexity of the implementation details, enabling the construction of the parallel version even when the source code of the sequential application contains different syntactic variations of the computations (e.g., pointers, arrays, complex control flows). Experiments that evaluate the effectiveness and performance of our approach with respect to state-of-the-art compilers are also presented. The benchmark suite consists of synthetic codes that represent common domain-independent kernels, dense/sparse linear algebra and image processing routines, and full-scale applications from SPEC CPU2000.     

Cellular processing tools for high-performance simulation

Cellular automata offer a powerful modeling approach for complex systems in which global behavior arises from the collective effect of many locally interacting, simple components. Several tools based on CA are providing meaningful results for real-world applications. Cellular automata represent an efficient paradigm for the computer solution of important problems in science and engineering. Moreover, the CA model lets researchers effectively use parallel computers to achieve scalable performance. As researchers use parallel computers to solve scientific problems, they will need problem representations (paradigms) for this class of computers. Abstract mathematical models that offer an implicitly parallel representation of problems better match those architectures, but could benefit from new high-level languages, environments, and techniques. The three should support all the development steps of computational science applications while hiding architectural details from users. Computational science is also an interdisciplinary field in which many areas converge, and developing applications in this field requires the cooperation of people from different domains. Modeling and simulation using parallel cellular methods helps researchers cooperate by offering both a way to code an algorithm and an integrated environment for developing software