可重配置处理器的体系结构级功耗模型与分析

按照可重配置处理器的体系结构建立并实现功耗模型;模型对处理器的电路级特性进行抽象,基于体系结构级属性和工艺参数进行静态峰值功耗估算,基于性能模拟器进行动态功耗统计,并实现三种条件时钟下的门控技术;可重配置处理器与超标量通用微处理器相比,在性能方面获得的平均加速比为3.59,而在功耗方面的平均增长率仅为1.48;通过实验还说明采用简单的CC1门控技术能有效地降低可重配置系统的功耗和硬件复杂度;该模型为可重配置处理器低功耗设计和编译器级低功耗优化研究奠定了基础。     

可重配置系统研究与分析

随着通信和多媒体技术的发展,出现了大量新的应用模型,传统的嵌入式设备一般采用专用硬件芯片或者基于纯粹的软件方案,很难兼顾性能和灵活性两个方面的要求。为此,能够兼顾两者优点的可重配置系统越来越受到工业界和学术界的重视,成为研究的热点。文章对可重配置系统进行了综述,从可重配置系统的硬件和软件结构两个角度出发,介绍了相关的研究工作,并展望了其未来的发展方向。     

星载计算机可重配平台设计

对Tcl／Tk语言的代码可重用特性在可重配置平台上的应用进行研究，讨论星载计算机可重配置特性的机理，并详细介绍这种面向用户的脱离底层代码操作的重配置平台的搭建步骤和代码实现，并给出该方案在一款星载数据处理系统可重配置设计上的应用结果．     

流水线配置技术在可重构处理器中的应用

提出一种应用于可重构处理器中的流水线配置技术,能够有效减低配置时间,提高应用程序的执行速度。可重构处理器包括通用处理器和一个粗颗粒度的可重构阵列。可重构阵列将处理应用中占据大量执行时间的循环,这些循环将被分解为不同的行在阵列上以流水线的方式执行。该技术在FPGA验证系统上得到了验证。验证的应用包括H.264基准中的整数离散余弦变换和运动估计。相比传统的可重构处理器PipeRench, MorphoSys以及TI的DSP TMS320DM642有大约3.5倍的性能提升。     

简易船载航海数据记录仪S-VDR的设计与实现

从性能标准要求、系统原理与功能、系统结构组成等几个方面对简易船载航海数据记录仪（S—VDR）进行了简单的介绍。并介绍了运用模块化的设计思想实现的S-VDR系统。该系统综合应用了嵌入式工控机、单片机、多媒体技术、数据压缩技术及通信技术．可以根据不同船舶的要求进行配置，对于远洋船舶和沿海船舶均有使用价值。     

导购小姐

金长城 S400 466M 多媒体计算机 采用VESA局部总线结构和GUI图形加速技术,大大提高显示系统的效率和色彩丰富程度,可达真彩色显示效果。强大的多媒体功能,可利用CD—ROM读取光盘资料,播放CD唱盘,并可利用声卡运行各种多媒体教育和办公软件,或进行声色俱佳、引人入胜的游戏娱乐。配置如下:CPU:486 DX2/66;显示系统:VESA局部总线,     

电脑装机方案推荐

这套配置显卡采用盈通R5770—1024GD5游戏高手版，主板选用华硕M4A88T—M，定位于游戏，但价格并不是很高。3．0G的高主频和4核心的设计可以满足当前主流的游戏对处理器的性能的要求，4G的内存对于当前的主流应用需求来说也足够了，而1G显存的HD5770对于主流游戏是没有任何问题的。有购买预算的朋友不妨参考一下。     

一种FPGA配置数据压缩算法的参数选择方法

随着现场可编程门阵列 (FPGA) 配置数据规模的显著增加,片外配置存储的低带宽成为了运行时可重构系统配置的瓶颈.考虑片外配置存储和片上配置接口对配置数据流传输速度的双重限制,建立了配置压缩系统的配置加速比模型,并实现了一种基于 LZSS 算法的压缩和解压系统.实验结果表明:配置加速比高的压缩算法相对压缩率高的算法能够...     

多媒体电脑的配置、连接与使用

一、前言 目前,许多品牌电脑都集成了较完善的多媒体功能,市场上也有一些集声卡、解压卡、电视卡、VGA卡等多种功能于一身的多媒体板卡在出售,这些都是广大多媒体爱好者的福音,但是,对于多媒体“发烧友”来说,选择自己中意的多媒体组件,自己动手组装一台全功能的多媒体电脑,却不失为—种有益的尝试。正是基于这样的考虑,我们于1995年初自己组装了一台多媒体电脑,经过近两年的使用,系统运行状态良好。现将我们的心得介绍给大家,以期能对大家有所启发。 二、系统的构成与连接 1.系统构成 主要配置:台湾产ALI主板,INTEL PENTIUM66处理器,8M内存,540M硬盘,Trident 9680真彩显示卡,15英     

支持动态可重构硬件透明编程的预配置调度

面向微处理器和可编程器件加速器的混合异构多核体系结构的可重构计算环境,采用程序员熟悉的函数描述格式,在运行时根据软硬件划分的结果,动态实现到软件函数实体代码或者硬件函数实现电路的连接。为降低重配置开销,提高系统性能,统计了各个硬件函数的调用次数和次序,并结合其运行时间和硬件面积等信息,设计了一种预配置算法,尽量使配置和计算能够重叠处理,从而缩短系统的整体运行时间,获得更大性能加速。     

Performance Analysis of Linear Algebraic Functions Using Reconfigurable Computing

This paper introduces a new mapping of geometrical transformation on the MorphoSys (M1) reconfigurable computing (RC) system. New mapping techniques for some linear algebraic functions are recalled. A new mapping for geometrical transformation operations is introduced and their performance on the M1 system is evaluated. The translation and scaling transformation addressed in this mapping employ some vector–vector and vector–scalar operations [6 and 7]. A performance analysis study of the M1 RC system is also presented to evaluate the efficiency of the algorithm execution. Numerical examples were simulated to validate our results, using the MorphoSys mULATE program, which emulates M1 operations.     

Cyclic coding algorithms under MorphoSys reconfigurable computing system

This paper introduces reconfigurable computing (RC) and specifically chooses one of the prototypes in this field, MorphoSys (M1) [1], [2], [3], [4], [5]. The paper addresses the results obtained when using RC in mapping algorithms pertaining to digital coding in relation to previous research [6], [7], [8], [9], [10]. The chosen algorithms relate to cyclic coding techniques, namely the CCITT CRC-16 and the CRC-16. A performance analysis study of the M1 RC system is also presented to evaluate the efficiency of the algorithm execution on the M1 system. For comparison purposes, three other systems were used to map the same algorithms showing the advantages and disadvantages of each compared with the M1 system. The algorithms were run on the 8×8 RC (reconfigurable) array of the M1 (MorphoSys) system; numerical examples were simulated to validate our results, using the MorphoSys mULATE program, which simulates MorphoSys operations.     

Multimedia and firewalls: a performance perspective

Firewalls are a well-established security mechanism to restrict the traffic exchanged between networks to a certain subset of users and applications. In order to cope with new application types like multimedia, new firewall architectures are necessary. The performance of these new architectures is a critical factor because Quality of Service (QoS) demands of multimedia applications have to be taken into account. We show how the performance of firewall architectures for multimedia applications can be determined. We present a model to describe the performance of multimedia firewall architectures. This model can be used to dimension firewalls for usage with multimedia applications. In addition, we present the results of a lab experiment, used to evaluate the performance of a distributed firewall architecture and to validate the model.     

面向多媒体应用的程序特征分析与研究

本文首先介绍了多媒体应用程序测试的工具和对象。其次，分析了国内外有关多媒体程序特征研究的成果和现状。发现这些研究和工作在微观领域--多媒体应用程序核心循环方面的研究和关注还显不足，并据此引出了对有关多媒体程序核心循环的循环特征的一些研究。最后，探讨了未来面向多媒体程序特征分析的一些研究方向。     

一种新的等效带宽估计方法

网络技术和图像语音处理技术的发展促进了多媒体通信技术的发展,随着分级交换网中多媒体通信研究的深入,多媒体流的适时性问题得到了特别的关注,在实时多媒体应用中,同包丢失率一样,时延也是一个重要的性能指标,在综合考虑多媒体业务的统计特性以及包丢失率和时延等QoS参数影响的基础上,给出了一个计算简单且便于实时带宽估计和管理的多媒体业务等效带宽的近似表达式,并讨论了相关参数对等效带宽的影响。     

An Extended ANSI C for Processors with a Multimedia Extension

This paper presents the Multimedia C language, which is designed for the multimedia extensions included in all modern microprocessors. The paper discusses the language syntax, the implementation of its compiler and its use in developing multimedia applications. The goal was to provide programmers with the most natural way of using multimedia processing facilities in the C language. The MMC language has been used to develop some of the most frequently used multimedia kernels. The presented experiments on these scientific and multimedia applications have yielded good performance improvements.     

An intelligent memory caching architecture for data-intensive multimedia applications

With the rapid developments in cloud computing and mobile networks, multimedia content can be accessed conveniently. Recently, some novel intelligent caching-based approaches have been proposed to improve the memory architectures for multimedia applications. These applications often face bottleneck related challenges which result in performance degradation and service delay issues. Intelligent multimedia network applications access the shared data by using a specific network file system. This results in answering the processing related constraints on hard-drive storage and might result in bringing bottleneck issues. Therefore, to improve the performance of these multimedia network applications, we present an intelligent distributed memory caching system. We integrate the multimedia application message passing interface in a multi-threaded environment and propose an algorithm which can handle concurrent response behavior for different multimedia applications. Results demonstrate that our proposed scheme outperforms traditional approaches in terms of throughput and file read access features.

     

多媒体数据压缩标准—MPEG系列

随着各种多媒体数据压缩标准的制定及计算机硬件、网络技术的发展，多媒体信息的应用呈现出爆炸式的增长。为了适应用户终端的多样性及网络自身的传输特性，20世纪90年代后期，一些国际标准化组织制定了几个多媒体数据压缩标准，并且获得了成功的应用，其中最主要的是MPEG系列。在此主要从视频的编码原理，视频数据组织结构和应用领域等方面对MPEG－1、MPEG－2、MPEG－4和MPEG－7做了一些介绍。     

MorphoSys reconfigurable hardware for?cryptography:?the?twofish?case

This paper presents the mapping and performance analysis of the Twofish algorithm on MorphoSys. MorphoSys is a reconfigurable architecture that can provide high performance compared to custom hardware and yet preserves a level of flexibility compared to general-purpose processors. With today’s high demand for secure data transfer mediums including wired and wireless networks, there is a growing demand for real-time implementation of cryptographic algorithms. The choice of the Twofish algorithm, one of the five AES finalists, is because it is computationally intensive algorithm. It requires lookup tables, logical and arithmetic computations that stipulate high flexibility and performance. So it is a perfect algorithm to be mapped in order to evaluate such hardware.