实时微处理器体系结构综述

实时应用已经成为嵌入式应用中一类快速崛起的典型应用。作为实时系统的核心部件,实时微处理器体系结构是微处理器领域的一个重要研究方向。与通用处理器追求最大吞吐量不同,实时处理器要求具有紧凑且可计算的最坏执行时间。传统的实时处理器往往采用较为简单的处理器结构,避免复杂结构引入执行时间的不确定性。随着实时应用对处理器性能需求越来越高,实时处理器正逐渐向多线程与多核结构发展。在多线程与多核处理器中,共享资源竞争导致实时系统的确定性变差,对实时处理器体系结构带来了更大挑战。对实时微处理器体系结构进行综述,首先从指令集、微体系结构、存储、I/O、任务调度等多个方面对传统实时处理器进行分析;然后分别对采用多线程与多核结构的高性能实时处理器展开分析;最后对几种商用实时处理器结构进行比较,总结实时处理器发展现状与未来发展趋势。     

基于FPGA的流水线微处理器设计

提高指令级并行度是微处理器体系结构发展的重要方向,也是开发基于FPGA的高性能微处理器的重要内容之一.本文论述了一个基于FPGA的流水线微处理器的指令流水线结构和系统设计,针对在指令流水执行过程中出现的相关问题,提出了相应的检查算法及解决方法.通过一个典型程序对流水线微处理器功能进行仿真,其运行结果表明此微处理器的最大吞吐率为一个时钟周期解释完一条指令,证实了流水线微处理器设计的正确性和高性能.该微处理器的设计在开发未来具有微处理功能的专用集成电路设计方面具有较高的实用价值.     

改善系统能量效率的体系结构方法:并行处理

因为对高性能微芯片和系统设计的广泛影响,能量消耗问题受到计算机界越来越广泛的关注.多个层次的技术被用于改善系统的能量效率,并行处理是体系结构层提高能量效率的主要手段.并行处理使用性能适中的计算节点减少能量消耗,使用多个节点并行执行维持高吞吐量.文中分析了并行处理提高能量效率的基本原理,给出了并行处理的时间开销和能量开销模型.基于模型分析,对低电压并行系统、动态电压调节(Dynamic Voltage Scaling,DVS)的并行系统和多核微处理器3个并行处理方向进行了展望,给出了这些并行处理方向改善能量效率的空间.     

面向高性能业务应用的基于剖视信息的系统能耗优化

当前,很多部门使用高性能计算机周期性地进行业务性的数值计算。维护这些业务系统的主要代价是每天消耗的大量电能,降低能量消耗能够极大地降低维护业务系统的成本。高性能业务系统的核心是微处理器,当前,微处理器普遍支持动态电压调节技术。该技术通过降低微处理器的电压和频率减小微处理器的能耗,但是一般会导致系统性能的下降。提出了一种面向高性能业务应用的能量优化技术。该技术利用系统支持的多个频率层次,建立性能约束下的能量优化模型,优化业务应用的能耗。根据程序信息获取方式的差别,提出了SEOM 和 CEOM 两种能量优化模型,SEOM模型的程序信息可以直接测试获取,CEOM的程序信息采用编译器插桩方法获取。使用典型平台对能耗优化效果进行了验证,最多可节省12%的能耗。     

高性能Pentium处理器的结构特征

介绍了以Pentium Pro微处理器为核心的高性能微处理器的体系结构特征，以及在多媒体，网络通信，并行计算等方面表现出的优异性能。     

数据访问层性能优化策略

对于以数据为中心的体系结构,大量的工作是编写和测试数据访问层。高性能的数据访问层对应用程序整体性能至关重要。本文从．NET常用代码、ADO．NET及性能测试三个方面分析、介绍实现高性能．NET数据访问层的优化策略及方法。     

高性能微处理器微体系结构级功耗模型及分析

基于Itanium2微处理器体系结构提出单时钟和多时钟域两种基准模型；对处理器的电路级特性进行微体系结构级抽象，建立了参数化的峰值功耗估算模型；提出事件调度算法，实现了多时钟域处理器系统的行为级模拟；以IMPACT工具集作为模拟引擎实现了处理器的动态功耗模拟模型．与其它同类模型Wattch相比，该模型能够支持多时钟系统的模拟，峰值功耗估算精度高了约3％，而模拟速度提高了42％．通过实验说明了多时钟域的功耗特性，在一种多电压和频率环境下，多时钟域处理器的功耗和能量分别降低了21％和38％．该模型可以很好地应用到体系结构级低功耗研究设计．     

面向神经计算的并行机体系结构设计

面向神经计算的并行计算机体系结构是神经网络研究中的一项重要工作。本文在对大量的神经计算进行需求分析的基础上，讨论了以高性能的微处理器作为计算单元，进行面向神经计算的并行计算机体系结构设计，并且介绍了它原型实现的结构、参数和性能     

ARM微处理器体系结构及其嵌入式SOC

嵌入式微处理器是体系结构研究领域的一个热点，文章从微处理器设计者的角度出发，对在嵌入式系统当中应用广泛的32位ARM微处理器系列的体系结构作了研究和探讨，简要介绍了3种当前市场上流行的、典型的基于ARM的SOC芯片。     

多核、多线程处理器的低功耗设计技术研究

随着微处理器设计技术和半导体制造工艺的进步，芯片的规模和复杂度急剧增大，超高的功耗密度对系统稳定性造成很大影响，功耗壁垒已经成为提升微处理器性能的最大障碍。本文介绍了低功耗设计的基本原理、研究内容、设计方法，分析了CMP和SMT体系结构的功耗需求和特性，讨论了不同的功耗优化策略在两种体系结构下的适用程度以及对性能造成的影响。针对多核、多线程体系结构，着重从系统级、结构级和电路级等不同抽象层次对典型的功耗优化技术做了讨论。最后，展望了未来微处理器低功耗设计技术的发展趋势。     

无线传感器网络中基于能量效率的分布式MAC协议

针对无线传感器网络中能量效率与频谱资源利用率的问题,提出了一种分布式媒介接入控制(MAC)算法。通过分析基于节约能量消耗的SMAC(Sensor-MAC)协议,结合现有的一些协议的改进方法,利用功率控制技术有效降低了更多的能量消耗。同时通过选择与维护邻居调度表的方式,提升了网络的有效链接并降低了碰撞率。节点采用在侦听与睡眠之间相互切换,在侦听期间以最优发送功率发送控制与数据信息,降低了干扰范围。数值计算与实验仿真结果显示,算法可以有效地改善网络性能,节省网络能量消耗,提升网络的有效吞吐量。     

Modelling and optimization of power consumption in wireless access networks

The power consumption of wireless access networks will become an important issue in the coming years. In this paper, the power consumption of base stations for mobile WiMAX, fixed WiMAX, UMTS, HSPA, and LTE is modelled and related to the coverage. A new metric, the power consumption per covered area PC_area, is introduced, to compare the energy efficiency of the considered technologies for a range of bit rates. Assuming the model parameters are correct, the conclusions are then as follows. For a 5 MHz channel, UMTS is the most energy-efficient technology until a bit rate of 2.8 Mbps, LTE between 2.8 Mbps and 8.2 Mbps, fixed WiMAX between 8.2 Mbps and 13.8 Mbps and finally mobile WiMAX for bit rates higher than 13.8 Mbps. Furthermore, the influence of MIMO is investigated.For a 2 × 2 MIMO system, PC_area decreases by 36% for mobile WiMAX and by 23% for HSPA and LTE compared to the SISO system, resulting in a higher energy efficiency.The power consumption model for base stations is used in the deployment tool GRAND (Green Radio Access Network Design) for green wireless access networks. GRAND uses a genetic based algorithm and is applied on an actual case for the Brussels Capital Region, showing the possibilities of energy-efficient planning.     

Energy-optimal base station density in cellular access networks with sleep modes

Sleep modes are widely accepted as an effective technique for energy-efficient networking: by adequately putting to sleep and waking up network resources according to traffic demands, a proportionality between energy consumption and network utilization can be approached, with important reductions in energy consumption. Previous studies have investigated and evaluated sleep modes for wireless access networks, computing variable percentages of energy savings. In this paper we characterize the maximum energy saving that can be achieved in a cellular wireless access network under a given performance constraint. In particular, our approach allows the derivation of realistic estimates of the energy-optimal density of base stations corresponding to a given user density, under a fixed performance constraint. Our results allow different sleep mode proposals to be measured against the maximum theoretically achievable improvement. We show, through numerical evaluation, the possible energy savings in today’s networks, and we further demonstrate that even with the development of highly energy-efficient hardware, a holistic approach incorporating system level techniques is essential to achieving maximum energy efficiency.     

An experimental study of soft errors in microprocessors

The issue of soft errors is an important emerging concern in the design and implementation of future microprocessors. The authors examine the impact of soft errors on two different microarchitectures: a DLX processor for embedded applications and a high-performance alpha processor. The results contrast impact of soft errors on combinational and sequential logic, identify the most vulnerable units, and assess soft error impact on the application.     

Parallel energy-efficient coverage optimization with maximum entropy clustering in wireless sensor networks

Energy constraint is an important issue in wireless sensor networks. This paper proposes a parallel energy-efficient coverage optimization mechanism to optimize the positions of mobile sensor nodes based on maximum entropy clustering in large-scale wireless sensor networks. According to the models of coverage and energy, stationary nodes are partitioned into clusters by maximum entropy clustering. After identifying the boundary node of each cluster, the sensing area is divided for parallel optimization. A numerical algorithm is adopted to calculate the coverage metric of each cluster, while the lowest cost paths of the inner cluster are used to define the energy metric in which Dijkstra’s algorithm is utilized. Then cluster heads are assigned to perform parallel particle swarm optimization to maximize the coverage metric and minimize the energy metric where a weight coefficient between the two metrics is employed to achieve a tradeoff between coverage area and energy efficiency. Simulations of the optimization mechanism and a target tracking application verify that coverage performance can be guaranteed by choosing a proper weight coefficient for each cluster and energy efficiency is enhanced by parallel energy-efficient optimization.     

基于虚拟机调度的数据中心节能优化

随着数据中心的快速发展,其能耗问题已经愈发突出,数据中心节能机制已成为研究热点;但大多节能机制并未充分考虑数据中心的异构性,如不同时间购置的服务器之间存在差异。为此引入代表服务器能耗效率的能效比(Performance/Power)作为参数,提出一种基于虚拟机调度的节能算法PVMAP,动态整合虚拟机时优先充分使用能效比高的服务器,从而尽量减少虚拟机迁移次数和同时运行的服务器数量。仿真实验结果表明,算法能够在节能的同时保证服务质量(QoS),比其他算法具有更好的稳定性和可扩展性。     

Energy-efficient control in serial production lines: Modeling,analysis and improvement⋆

Control of production operations is one of the most cost-effective methods to improve energy efficiency in production lines. Although many research efforts have been devoted to utilizing production control to boost production energy efficiency, it is not clear how production dynamics change in reaction to the energy saving operations, which is important to capture energy saving opportunities. In this paper, an optimal energy saving control method based on N-policy is introduced to reduce the system energy consumption while only slightly decreasing productivity. A Markov chain model is established to interpret the dynamics of serial production lines with N-policy. The analytical formulas of production rate and energy consumption are derived. Then, an energy-efficient control model is formulated to balance the productivity and energy consumption. For two-machine production lines, the monotonicity property of the model is proved, and the analytical N-policy is derived. For longer production lines, an adaptive genetic algorithm is utilized to solve the energy-efficient control model. Case studies validate the effectiveness of the proposed optimal energy saving control method.     

Kilo-instruction processors: overcoming the memory wall

Historically, advances in integrated circuit technology have driven improvements in processor microarchitecture and led to todays microprocessors with sophisticated pipelines operating at very high clock frequencies. However, performance improvements achievable by high-frequency microprocessors have become seriously limited by main-memory access latencies because main-memory speeds have improved at a much slower pace than microprocessor speeds. Its crucial to deal with this performance disparity, commonly known as the memory wall, to enable future high-frequency microprocessors to achieve their performance potential. To overcome the memory wall, we propose kilo-instruction processors-superscalar processors that can maintain a thousand or more simultaneous in-flight instructions. Doing so means designing key hardware structures so that the processor can satisfy the high resource requirements without significantly decreasing processor efficiency or increasing energy consumption.