A case study in design space exploration: the Tosca environmentapplied to a telecommunication link controller

The concept of system design, or codesign, includes a variety of possible definitions according to the considered relevant aspects, the application field, and the system granularity of the analysis. The novelty of codesign with respect to the design of pure hardware and software, which are well-known subjects, arises from the tight integration between the two types of design and from the global scope of the design constraints. Since such applications strive for high volumes, there is a payoff for size, power, and speed optimization techniques. This article presents a system-level design methodology to specify, analyze, and explore different hardware/software solutions, whose benefits have been tested by redesigning a commercial device     

基于移动嵌入式系统硬/软件协同设计的EHSC算法

嵌入式系统设计的一个重要任务就是寻找硬/软件最佳搭配方案.随着系统复杂性的不断提高,采用嵌入式系统硬/软件协同设计是提高设计质量的有效手段.本文在讨论嵌入式系统设计一般方法的基础上,阐述了系统的硬/软件协同设计技术和硬件/软件划分方法,提出了以系统硬/软件划分策略为基础,系统组件的权重值为参考,组成元素划分为依据的设计理念,构造了基于移动环境的系统的硬/软件协同设计的EHSC（Embedded Hardware/Softwarre Codesign）模型.并依照此模型,实现了一种移动嵌入式系统“电子书包”阅读器的设计和开发.     

Codesign from cospecification

Describes an object-oriented codesign specification approach designed to eliminate the bias introduced from using more commonplace software or hardware specification languages. The goal is to investigate automated partitioning of behavior into hardware and software. The design methodology allows gradual, continuous repartitioning of codesign operations during design. For instance, designers might start with an all-software implementation and check the implementation's functionality: they might then refine the implementation over time to a mixed hardware-software implementation. At the system level, the authors use an object-oriented approach to identify the basic objects and associated functions of a system. They divide them into three groups: hardware, software, and codesign . They represent the codesign group's objects and functions using a prototype codesign specification language, Object-Oriented Functional Specifications (OOFS), which lets one describe system state in objects and write object methods as pure functions. Thus, the authors can describe complex systems without biasing the implementation toward hardware or software     

软件密集型系统的协同设计问题

首先讨论了目前设计软件密集型系统设计中存在的错误认识，并指出了协同设计对于软件密集型系统设计的必要性。在此基础上，文章讨论了基功能分解的协同设计方法，并用实例讨论了不同硬软件组合对于系统设计的影响。     

嵌入式系统软硬件协调设计环境构造与实现方法

文章研究嵌入式系统协调设计方法,重点讨论一个完整的嵌入式系统协调设计环境———BitCoDesign构造,把嵌入式系统设计分解为系统功能描述和划分阶段、软硬件设计阶段、协同模拟阶段和软硬件综合阶段。具体阐述各设计阶段功能的实现方法,使嵌入式系统在设计初期,通过协同模拟手段验证系统的设计正确性,避免设计反复,降低开发成本,缩短开发周期     

Prototyping networked embedded systems

Sophisticated consumer devices that support multimedia-personal digital assistants, network computers, and mobile communication devices-pose challenges for embedded systems designers. The low-cost, consumer-oriented, fast time-to-market mentality that dominates embedded system design today forces design teams to use hardware-software codesign to cope with growing design complexities. New codesign methodologies and tools must support a key characteristic of next-generation embedded systems: the capability to communicate over networks and adapt to different operating environments. The paper discusses two emerging classes of embedded systems: multifunction systems and multimode systems     

Model-based codesign

Hardware-software codesign has been a research topic since the beginning of this decade (1990s), but only now are structured methods emerging that focus on automating design. Unfortunately, to date most codesign approaches leverage performance from individual hardware and software tools, rather than enforcing a structured integration of hardware and software systems simultaneously. A few frameworks have successfully done this integration and have the potential for significant benefits, including reduced time to market, smaller scale design, better likelihood of component reuse, and maximum use of processing power. The article describes a codesign approach that lets developers create models of a formal system representation independently of the hardware and software implementation. The authors' framework, which targets embedded systems, lets developers use simulation based modeling to explore the feasibility of virtual prototypes and then interactively map the specification onto a software-hardware architecture     

A framework for hardware/software codesign

It is argued that a hardware/software codesign methodology should support the following capabilities: integration of the hardware and software design processes; exploration of hardware/software tradeoffs and evaluation of hardware/software alternatives; and model continuity. A codesign methodology that supports many of these capabilities is outlined. The methodology is iterative in nature and serves to guide codesign exploration with the uninterpreted/interpreted modeling approach. It integrates performance (uninterpreted) models and functional (interpreted) models in a common simulation environment     

网络环境下基于网络 QoS 的网络控制器优化设计

在网络控制中，基于网络服务质量(Quality of services, QoS) 的网络控制器的优化问题是网络控制研究中一个非常重要的问题，但到目前为止该问题的研究还不够深入. 本文首先给出了网络环境下控制器与网络调度协作过程模型, 然后在此模型基础上提出了控制器设计及网络特性相关的综合性能指标, 接着以优化此指标为目的，利用离散LQR (Linear quadratic regulator) 方法完成网络控制器与网络的交互设计过程. 仿真结果说明了协作设计过程的有效性.     

A decade of hardware/software codesign

The term hardware/software codesign, coined about 10 years ago, describes a confluence of problems in integrated circuit design. By the 1990s, it became clear that microprocessor-based systems would be an important design discipline for IC designers as well. Large 16- and 32-bit microprocessors had already been used in board-level designs, and Moore's law ensured that chips would soon be large enough to include both a CPU and other subsystems. Multiple disciplines inform hardware/software codesign. Computer architecture tells us about the performance and energy consumption of single CPUs and multiprocessors. Real-time system theory helps analyze the deadline-driven performance of embedded systems. Computer-aided design assists hardware cost evaluation and design space exploration.     

Hardware/software codesign and rapid prototyping of embeddedsystems

The complexity and the short time to market of embedded systems require the use of automated techniques during the specification, implementation, and testing phases of such systems. Due to the cost requirements and the timing constraints of such systems, application-specific hardware solutions are often needed, making the codesign of hardware and software a major topic for the design automation of embedded systems. This article describes tools for the analysis, synthesis, and rapid prototyping of distributed embedded real-time systems and presents a complete design flow from specification to implementation     

What's in a name [embedded systems]

Hardware/software codesign grew out of system-level synthesis. ASICs offer performance advantages at the expense of post-design- time programmability. This contrasts with computer architecture, which focuses on support for a wide variety of end-use programming scenarios. Currently neither hardware synthesis nor hardware/software codesign describes the system-level design represented in CODES+ISSS. CODES were the name of the International Conference on Hardware/Software Codesign. ISSS was the name of the International Symposium on System Synthesis.     

Cautious optimism for the future [codesign research]

The expectations, experimental results, and open issues relating to codesign research are discussed. Codesign refers to the integrated design of systems implemented using both hardware and software components. It is argued that the renewed interest in codesign is largely explained by the increasing diversity and complexity of applications employing embedded systems; the need to decrease the cost of designing and testing such systems; and advances in some key enabling technologies     

Software development for high-performance, reconfigurable, embedded multimedia systems

Reconfigurable platforms can be very effective for lowering production costs because they allow the reuse of architecture resources across a variety of applications. We show how to program a reduced-instruction-set-computing (RISC) microprocessor with a reconfigurable functional unit, focusing on DSP applications and using the example of a turbodecoder. We have developed a complete design flow, including a methodology and compilation tool chain, to address the instruction set hardware-software codesign problem for a processor with a runtime reconfigurable unit. The flow starts from a system-level specification (usually a software program) of the application and partitions it into software and hardware domains to achieve the best speed, power, and area performance, while satisfying resource constraints imposed by the target platform architecture. We describe a methodology and a set of tools that allow extensive design exploration for hardware-software codesign with the goal of improving the overall utilization of reconfigurable multimedia platforms.     

A SystemC refinement methodology for embedded software

This article presents a design environment that provides an interface for user-written SystemC modules that model application software to make calls to a real-time operating system (RTOS) kernel and cosimulate with user-written SystemC hardware modules. The environment also facilitates successive refinement through three abstraction layers for hardware-software codesign suitable for embedded-system design.     

Synthesis steps and design models for codesign

Codesign is a joint development of hardware and software components to obtain a complete system design. The fields of specification, design, and synthesis of mixed hardware/software systems are becoming increasingly more popular. The paper provides a taxonomy of codesign and discusses some design environments and models     

Event‐triggered fault detection for switched systems with time‐varying sojourn probabilities

In this paper, a codesign strategy of an event‐triggered scheme and a fault detection filter (FDF) is developed for the networked switched systems with delayed measurements. A novel switching rule is proposed to better describe the switching behavior in a real system, under which the probability staying in each subsystem is time varying and results in a piecewise continuous system dynamics. An event‐triggered strategy based on the relative error with respect to the delayed measurement signal is established to reduce the communication burden. Our attention is concentrated on the construction of an event‐triggered fault detection technique for the proposed switched system with delayed measurements. Combining the stochastic analysis techniques and the average dwell time (ADT) method, a sufficient condition is obtained to guarantee the finite‐time boundedness of the generated residual system, the sensitivity of the residual signal to faults, and the disturbance attenuation of the switched system to external disturbances. Based on the established condition, a codesign strategy is developed to get the event‐triggered threshold and the FDF gain. Finally, two simulation results verify the effectiveness of the proposed design method.     

Chip-package codesign flow for mixed-signal SiP designs

Design engineers are challenged with two separate entities: the chip and package designs. Because system-in-package integrates multiple dies into a package, design engineers should have a tool to easily combine the two entities. This article demonstrates a seven-die SiP design that implements a chip-and-package codesign platform using available EDA tools.     

A two-level cosimulation environment

Hardware/software codesign seeks to integrate system level, hardware, and software design. Ideally, we would like tools that allow rapid evaluation of design decisions and a full exploration of the design space. Available tools are often too slow and concentrate on the low level cosimulation of hardware and software parts, after the design has been partitioned. We are attempting to remedy these problems with Tosca (Tools for System Codesign Automation), a hardware/software codesign environment. Targeted at single chip implementations consisting of a CPU core cell and dedicated hardware, Tosca performs a high level cosimulation for what-if analyses before hardware/software cosynthesis. After cosynthesis, Tosca generates simulatable software to be run on a retargetable instruction level model of the CPU. The software and hardware bound parts are then cosimulated using a commercial VHDL simulator. The performance of the low level cosimulation strategy and the high level simulator is remarkable. Low level cosimulation performance is about that of dedicated CPU software emulators-7200 pseudo assembly instructions per second. High level cosimulation is three times faster than the low level cosimulation. Both simulators allow functional debugging by interfacing to a commercial waveform visualizer (Mentor Graphics SimView). Engineers have used Tosca to redesign a commercial link controller