状态图中可同步测试序列生成策略

对于由通信有限状态机构成的状态图的可同步测试序列的生成策略，一种现有的方法是由状态图生成相应的积自动机，然后采用有限状态机的测试序列生成策略。这种方法存在组合空间爆炸问题和测试序列的同步问题。在定义了测试序列的两类同步问题的基础上，提出了基于多测试驱动的测试模型MTM和基于该模型的测试序列生成策略，该策略在不生成积自动机的情况下，通过同步锁和相应的策略解决两种类型的同步问题，避免了组合空间爆炸问题。     

多单元协议一致性测试中的同步序列的生成

有限状态机模型一般被用来描述通信协议和其它各类的分布式系统,对于一个多端口的有限状态机,需要多个测试单元进行测试,使用一个包括K个（K≥2）测试单元的测试系统可以检查一个多单元通信协议软件的收发行为是否与协议规格一致,在测试过程中,K个测试单元之间可能会出珊步问题,目前,主要是通过增加外部同步操作来解决同步问题,提出了一种新的同步测试序列生成模型－－同步有向图,它可以判断一个给定的协议规格是否可以在不需要外部同步操作的情况下,产生同步测试序列;如果可以产生,则此生成中以将非同步测试相应的同步测试序列;另外此生成模型还可以用来选择为测试系统增加外部同步通道的方法。     

基于CFSM的一致性测试序列生成方法

本文采用通信有限状态机模型描述通信协议,基于通信有限状态机模型提出了协议一致性测试的测试序列生成方法,解决了构件化协议的测试序列生成的问题。本文实现了测试序列的生成算法,通过实例说明了采用测试序列生成算法生成了比传统算法更少的测试序列。同时本算法还可以用于多层协议测试。     

基于CFSM的一致性测试序列生成方法

本文采用通信有限状态机模型描述通信协议,基于通信有限状态机模型提出了协议一致性测试的测试序列生成方法,解决了构件化协议的测试序列生成的问题。本文实现了测试序列的生成算法,通过实例说明了采用测试序列生成算法生成了比传统算法更少的测试序列。同时本算法还可以用于多层协议测试。     

基于通信多端口有限状态机的协议互操作性测试生成研究

协议测试是一种保证网络通信协议实现质量的重要技术，互操作性测试是一类常用的协议测试技术．文章提出了一种基于通信多端口有限状态机模型的协议互操作忡测试生成方法．首先采用已有的基于可达性分析的方法生成集中式测试序列；然后采用单一错误模型对其进行系统的错误覆盖分析，为达到更高的错误覆盖度，进一步提出一种增强的测试生成算法；最后讨论了互操作性测试巾的控制观察问题，选择适当的分布式测试架构，并进而生成分布式同步测试序列．实验结果表明：与原有方法相比，该方法可以有效地提高测试集的错误覆盖，并具备一定的可行性和有效性．     

BGP-4协议一致性测试序列生成

该文讨论了一种协议测试序列生成的方法,它使用有限状态机模型作为协议的形式化描述规范,然后基于UIO序列和中国乡村邮路算法生成测试序列。该文将其应用于对BGP-4协议的一致性测试中。这种方法以协议的形式化描述为输入,易于自动化实现,同时生成的测试序列较短,提高了测试效率。     

基于通信扩展有限状态机的测试集生成技术

在协议一致性测试中，选择恰当的测试例至关重要。文章介绍协议一致性测试的基本概念及有限状态机和扩展有限状态机的测试模型，重点探讨基于通信扩展有限状态机的测试集生成技术。     

基于np-FSM的分布式协议的虚拟多端口测试方法

在协议工程领域,协议测试是非常重要的工作;对于分布式协议的测试多采用多端口有限状态机模型进行描述;由于分布式协议测试存在控制观察问题,需要对测试序列进行同步和协调;通过对现有分布式测试模型的改进,引入虚拟多端口测试的方法,极大地简化了多个测试器之间的同步和协调问题,并且不会显著增加系统的构建成本,提高了测试效率.     

一种一致性测试方法在专有通信协议测试中的应用研究

专有通信协议一致性的实现是保证项目系统通信质量的关键。本文采用有限状态机FSM对通信协议进行建模。并依据产生的UIO序列生成相应的一致性测试序列,并对一个实际项目进行协议的一致性测试,发现使用了一致性测试方法的测试比没有使用此方法的测试更有效。     

含自发事件的协议一致性测试例的生成

目前有许多基于有限状态机生成一致性测试序列的方法,但是这些方法还不能应用于含有自发事件的有限状态机。文中对UIO方法加以补充,使之适用于含自发事件的有状态机,并已将该方法应用于OSPF协议的一致性测试。     

Canonical finite state machines for distributed systems

There has been much interest in testing from finite state machines (FSMs) as a result of their suitability for modelling or specifying state-based systems. Where there are multiple ports/interfaces a multi-port FSM is used and in testing, a tester is placed at each port. If the testers cannot communicate with one another directly and there is no global clock then we are testing in the distributed test architecture. It is known that the use of the distributed test architecture can affect the power of testing and recent work has characterised this in terms of local s-equivalence: in the distributed test architecture we can distinguish two FSMs, such as an implementation and a specification, if and only if they are not locally s-equivalent. However, there may be many FSMs that are locally s-equivalent to a given FSM and the nature of these FSMs has not been explored. This paper examines the set of FSMs that are locally s-equivalent to a given FSM M. It shows that there is a unique smallest FSM χ_min(M) and a unique largest FSM χ_max(M) that are locally s-equivalent to M. Here smallest and largest refer to the set of traces defined by an FSM and thus to its semantics. We also show that for a given FSM M the set of FSMs that are locally s-equivalent to M defines a bounded lattice. Finally, we define an FSM that, amongst all FSMs locally s-equivalent to M, has fewest states. We thus give three alternative canonical FSMs that are locally s-equivalent to an FSM M: one that defines the smallest set of traces, one that defines the largest set of traces, and one with fewest states. All three provide valuable information and the first two can be produced in time that is polynomial in terms of the number of states of M. We prove that the problem of finding an s-equivalent FSM with fewest states is NP-hard in general but can be solved in polynomial time for the special case where there are two ports.     

Constructing checking sequences for distributed testing

The objective of testing is to determine whether an implementation under test conforms to its specification. In distributed test architectures involving multiple remote testers, this objective can be complicated by the fact that testers may encounter coordination problems relating to controllability (synchronization) and observability during the application of tests. Based on a finite state machine (FSM) specification of the externally observable behaviour of a distributed system and a distinguishing sequence, this paper proposes a method for constructing a checking sequence where there is no potential controllability or observability problems, and where the use of external coordination message exchanges among testers is minimized. The proposed method does not assume a reliable reset feature in the implementations of the given FSM to be tested by the resulting checking sequence. phone: 613-562-5800(Extn)6684 Received May 2004 Revised March 2005 Accepted April 2005 by J. Derrick, M. Harman and R. M. Herons     

基于CVI的多通道串口板卡测试软件的设计与实现

针对一种刚开发的、可快速集成实验系统的智能多串口卡,设计实现了专门对其量身定做的测试其数据通信性能的软件。设计此卡的目的在于解决无人机半物理仿真实验存在的传感器众多并且接口不统一的问题。该测试软件是基于功能强大的虚拟仪器软件开发工具LabWindows/CVI完成的。该软件解决了一般调试助手不能对板卡内存进行访问,并且不能同时同步进行多通道收发的问题,客观准确地验证了板卡性能,同时提出了简化程序的一种新方案。     

Overcoming controllability problems with fewest channels between testers

When testing a system that has multiple physically distributed ports/interfaces it is normal to place a tester at each port. Each tester observes only the events at its port and it is known that this can lead to additional controllability problems. While such controllability problems can be overcome by the exchange of external coordination messages between the testers, this requires the deployment of an external network and may thus increase the costs of testing. The problem studied in this paper is finding a minimum number of coordination channels to overcome controllability problems in distributed testing. Three instances of this problem are considered. The first problem is to find a minimum number of channels between testers in order to overcome the controllability problems in a given test sequence to be applied in testing. The second problem is finding a minimal set of channels that allow us to overcome controllability problems in any test sequence that may be selected from the specification of the system under test. The last problem is to find a test sequence that achieves a particular test objective and in doing so allows fewest channels to be used.     

Packet synchronization for synchronous optical deflection-routedinterconnection networks

Deflection routing resolves output port contention in packet switched multiprocessor interconnection networks by granting the preferred port to the highest priority packet and directing contending packets out other ports. When combined with optical links and switches, deflection routing yields simple bufferless nodes, high bit rates, scalable throughput, and low latency. We discuss the problem of packet synchronization in synchronous optical deflection networks with nodes distributed across boards, racks, and cabinets. Synchronous operation is feasible due to very predictable optical propagation delays. A routing control processor at each node examines arriving packets and assigns them to output ports. Packets arriving on different input ports must be bit wise aligned; there are no elastic buffers to correct for mismatched arrivals. “Time of flight” packet synchronization is done by balancing link delays during network design. Using a directed graph network model, we formulate a constrained minimization problem for minimizing link delays subject to synchronization and packaging constraints. We demonstrate our method on a ShuffleNet graph, and show modifications to handle multiple packet sizes and latency critical paths     

基于VC++的金属充氚系统实时监控软件设计

介绍了以Visual C++为开发工具,以PC机为上位机,通过串口与现场仪表通信的金属充氚自动控制系统,该系统使用了MoxaPComm Lite2.5的API函数、多线程技术、定时器、Windows等待函数、同步事件对象、临界区对象等技术来实现多串口的通信。分析论述了监控软件实时数据的采集、储存,数据曲线的绘制,温度信号控制等功能的实现方法。     

Using status messages in the distributed test architecture

If the system under test has multiple interfaces/ports and these are physically distributed then in testing we place a tester at each port. If these testers cannot directly communicate with one another and there is no global clock then we are testing in the distributed test architecture. If the distributed test architecture is used then there may be input sequences that cannot be applied in testing without introducing controllability problems. Additionally, observability problems can allow fault masking. In this paper we consider the situation in which the testers can apply a status message: an input that causes the system under test to identify its current state. We show how such a status message can be used in order to overcome controllability and observability problems.     

基于TMS320C6713的McBSP和EDMA实现串口通信

针对TI公司的DSP芯片TMS320C6713,利用片上同步多通道缓冲串行口(McBSP)和增强型直接存储器存取(EDMA)实现了串口通信功能。该方案解决了芯片只有同步串口而不能进行异步传输的问题,丰富了接口功能。