多核系统中基于Global EDF 的在线节能实时调度算法

随着多核系统能耗问题日益突出,在满足时间约束条件下降低系统能耗成为多核实时节能调度研究中亟待解决的问题之一.现有研究成果基于事先已知实时任务属性的假设,而实际应用中,只有当任务到达之后才能够获得其属性.为此,针对一般任务模型,不基于任何先验知识提出一种多核系统中基于Global EDF在线节能硬实时任务调度算法,通过引入速度调节因子,利用松弛时间,结合动态功耗管理和动态电压/频率调节技术,降低多核系统中任务的执行速度,达到实时约束与能耗节余之间的合理折衷.所提出的算法仅在上下文切换和任务完成时进行动态电压/频率调节,计算复杂度小,易于在实时操作系统中实现.实验结果表明,该算法适用于不同类型的片上动态电压/频率调节技术,节能效果始终优于Global EDF算法,最多可节能15％～20％,最少可节能5％～10％.     

单处理器多外设实时系统全局能耗优化算法研究

在电池供电的实时嵌入式系统中,能耗是系统设计的一个重要研究问题.动态电压调度和动态电源管理是两种重要的节能技术.前者是动态改变处理器电压/频率,降低处理器能耗;而后者是动态调整片外设备的工作模式,减少片外设备能耗.目前只有少量研究把这两种技术综合在一起.本文研究支持这两种技术的嵌入式全系统实时任务节能调度问题.针对连续和离散处理器频率模型,论文分别提出高效的算法,通过计算系统运行的能耗最小处理器最优频率和设备最优空闲时间,来实现全系统综合节能的目的.实验模拟表明本文算法大大优于其他算法.     

一种基于程序段的动态电压缩放算法

动态电压缩放技术是一种能有效优化处理器能耗的方法,它允许处理器在运行时动态地改变其时钟频率和供电电压.针对处理器提出了一种基于程序段的动态电压缩放算法PBVSA,该算法使用建立在指令工作集签名基础上的程序段监测状态机来判断程序段是否发生变化,并作出CPU电压和频率调整决定,在程序段内,通过计算该段的频率缩放因子β(片外工作时间与片上工作时间的比例关系)来设定CPU的电压和频率,在sim-panalyzer模拟器上完成了算法的实现,通过对Mibench测试程序集的测试表明:该算法平均降低了处理器29%的能耗,而性能损失平均为5.3%.     

用于多核嵌入式环境的硬实时任务感功调度算法

充分考虑当前CMOS多核嵌入式处理器片上仅提供全局动态电压缩放(DVS)支持以及亚纳米时代后CMOS处理器泄露功耗不可忽视的现状,提出一种新的多核嵌入式环境中的硬实时任务感功调度算法GRR&CS。算法通过基于贪心法的静态任务划分,基于全局资源回收利用和任务迁移的动态负载均衡,以及动态核缩放三个步骤实现整体能耗的降低,并同时保证实时任务的可调度性约束。实验表明,提出的算法相比较现有算法多节省14.8%~41.2%的能耗。     

非对称多核处理器上的操作系统集成调度

相对于对称多核处理器,非对称多核处理器具有更高的效能,将成为未来并行操作系统中的主流体系结构.对于非对称多核处理器上操作系统的并行任务调度问题,现有的研究假设所有核心频率恒定,缺乏理论分析,也没有考虑算法的效能和通用性.针对该问题,该文首先建立非线性规划模型,分析得出全面考虑并行任务同步特性、核心非对称性以及核心负载的调度原则.然后,基于调度原则提出一个集成调度算法,该算法通过集成线程调度和动态电压频率调整来提高效能,并通过参数调整机制实现了算法的通用性.提出的算法是第一个在非对称多核处理器上结合线程调度和动态电压频率调整的调度算法.实际平台上的实验表明:该算法可适用于多种环境,且效能比其他同类算法高24%～50%.     

基于程序访存行为的片上网络能耗优化方法

片上网络作为未来多核处理器片上互连的发展趋势,其能耗优化问题越来越受到重视。动态电压频率调节是一种有效的运行时能耗管理手段,近年来已被许多研究者用在片上网络的能耗优化上。针对目前主流的分布式控制方案存在软硬件代价高的缺点,提出了一种全局控制的能耗优化方法,通过监控程序的关键性访存信息来动态调整片上网络的电压和频率。仿真结果表明,在允许性能损失5%的限制下,该方法可以实现约45%的能耗节省。     

多核系统中基于动态电压频率调节的实时节能调度研究

在实时嵌入式领域,特别是无线移动和便携式计算领域,能耗是首要考虑的因素,这也是多核处理器尚未在嵌入式领域全面展开应用的首要因素。目前针对多核系统的实时应用,基于动态电压频率调节(DVFS)的实时节能调度技术研究得较少,还有许多问题亟待解决。本文介绍了多核系统中动态电压频率调节技术,分析讨论了当前多核系统中实时调度研究进展,主要针对同构多核、异构多核、并行任务模型和弱硬实时模型等方面,深入探讨了多核系统中基于DVFS的实时节能调度。本文结合多核系统、电压频率动态调节节能和实时调度,探索了多核系统中的实时节能调度,奠定了理论和技术基础,具有重大的理论意义和现实应用价值。     

开销敏感的多处理器最优节能实时调度算法

嵌入式多处理器系统的能耗问题变得日益重要,如何减少能耗同时满足实时约束成为多处理器系统节能实时调度中的一个重要问题.目前绝大多数研究基于关键速度降低处理器的频率以减少动态能耗,采用关闭处理器的方法减少静态能耗.虽然这种方法可以实现节能,但是不能保证最小化能耗.而现有最优的节能实时调度未考虑处理器状态切换的时间和能量开销,因此在切换开销不可忽视的实际平台中不再是最优的.文中针对具有独立动态电压频率调节和动态功耗管理功能的多处理器系统,考虑处理器切换开销,提出一种基于帧任务模型的最优节能实时调度算法.该算法根据关键速度来判断系统负载情况,确定具有最低能耗值的活跃处理器个数,然后根据状态切换开销来确定最优调度序列.该算法允许实时任务在处理器之间任意迁移,计算复杂度小,易于实现.数学分析证明了该算法的最优性.     

一种确定处理器频率的节能调度策略

在数据中心动态电压调整(DVS)节能应用中,追求低的处理器执行频率不一定能获得好的节能效果。因为利用DVS技术降低电压/频率在降低系统功耗的同时,会导致系统性能的降低,引起执行时间增加。为此,通过分析实时系统数据中心实时事务基于DVS的能耗数学模型,结合事务执行时间与处理器频率的关系,推导一种仅依赖于服务器静态特征参数的处理器能效最优初始执行频率的计算方法。实例数据的计算结果表明,使用最优初始执行频率完成事务,比单一使用最大处理器频率可以节省30%左右的能耗。     

实时系统中混合任务集的动态电压调节算法

在实时嵌入式系统中,核心处理器的能耗占据整个能耗的相当大一部分.动态电压调节被看作是降低处理器能耗的关键技术,介绍实时系统和动态电压调节的基本概念,并在CMOS器件功耗理论和实时系统下任务调度理论的基础上,提出基于混合任务集的减慢因子DVS算法.     

基于动态电压调节的低功耗视频解码技术研究

讨论在嵌入式系统中使用动态电压调节技术降低视频解码功耗。提出一种基于动态电压调节的低功耗解码技术。该方法采用移动平均法预测帧的解码时间,依据预测的结果动态地调节解码过程中微处理器的工作电压,降低能量消耗。实验结果表明,基于动态电压调节的视频解码器比常规解码器减少10%￣30%的能量消耗。     

A methodology for performance/energy consumption characterization and modeling of video decoding on heterogeneous SoC and its applications

To meet the increasing complexity of mobile multimedia applications, SoCs equipping modern mobile devices integrate powerful heterogeneous processing elements among which Digital Signal Processors (DSP) and General Purpose Processors (GPP) are the most common ones. Due to the ever-growing gap between battery lifetime and hardware/software complexity in addition to application’s computing power needs, the energy saving issue becomes crucial in the design of such architectures. In this context, we propose in this paper an end-to-end study of video decoding on both GPP and DSP. The study was achieved thanks to a two steps methodology: (1) a comprehensive characterization and evaluation of the performance and the energy consumption of video decoding, (2) an accurate high level energy model is extracted based on the characterization step.The characterization of the video decoding is based on an experimental methodology and was achieved on an embedded platform containing a GPP and a DSP. This step highlighted the importance of considering the end-to-end decoding flow when evaluating the energy efficiency of video decoding application. The measurements obtained in this step were used to build a comprehensive analytical energy model for video decoding on both GPP and DSP. Thanks to a sub-model decomposition, the developed model estimates the energy consumption in terms of processor clock frequency and video bit-rate in addition to a set of constant coefficients which are related to the video complexity, the operating system and the considered hardware architecture. The obtained model gave very accurate results (R² = 97%) for both GPP and DSP energy consumption. Finally, based on the results emerged from the modeling methodology, we show how one can build rapidly a video decoding energy model for a given target architecture without executing the full characterization steps described in this paper.     

Dynamic core allocation for energy efficient video decoding in homogeneous and heterogeneous multicore architectures

This paper describes two dynamic core allocation techniques for video decoding on homogeneous and heterogeneous embedded multicore platforms with the objective of reducing energy consumption while guaranteeing performance. While decoding a frame, the scheme measures “slack” and “overshoot” over the budgeted decode time and amortizes across the neighboring frames to achieve overall performance, compensating for the overshoot with the slack time. It allocates, on a per-frame basis, an appropriate number and types of cores for decoding to guarantee performance, while saving energy by using clock gating to switch off unused cores. Using the Sniper simulator to evaluate the implementation of the scheme on a modern embedded processor, we get an energy saving of 6%–61% while strictly adhering to the required performance of 75 fps on homogeneous multicore architectures. We receive an energy saving of 2%–46% while meeting the performance of 25 fps on heterogeneous multicore architectures. Thus, we show that substantial energy savings can be achieved in video decoding by employing dynamic core allocation, compared with the default strategy of allocating as many cores as available.     

Optimizing random network coding for multimedia content distribution over smartphones

It is known that random network coding (RNC) technology helps enhance multimedia content distribution systems in various ways; however, the enhancement can vary widely depending on how the technology is realized in the systems. RNC technology entails an encoding process at the server-side and a decoding process at the clients. Typically, the decoding process is the bottleneck especially when resource-limited mobile clients such as smartphones are employed. Thus, to fully exploit the benefit of RNC technology, it is crucial to maximize throughput and minimize latency of the decoding process of RNC at the client-side. In this paper, we explore the implementation space of RNC on smartphone platforms and propose best practices that optimize RNC performance on smartphone in terms of decoding throughput (or delay) as well as energy consumption. Via experimental results, we show that our proposal for optimizing RNC achieves throughput enhancement along with energy conservation at the same time on smartphones.     

几种协作分集模式能量消耗比较

为了提高通信性能和延长无线网络生命周期,提出了统一的系统模型;分析了选择译码转发(SDF)和多输入多输出(MIMO)协作工作模式,研究了影响能耗的几个因素。研究表明,对于同一平均误比特率值,SDF系统比单输入单输出(SISO)系统的能量消耗低;当发射节点数目固定时,MIMO协作方式接收节点不是越多越好,而是存在一个最佳数目。短距离时,协作MIMO系统比传统SISO系统的比特能耗高。大于临界距离时,协作MIMO系统才能节省能量。     

无线传感器网络的差错控制技术研究

在分析传统无线网络差错控制方案的基础上,研究差错控制引起的能量消耗因素,通过介绍无线传感器网络能量消耗模型,借助Synopsys power comp lier分析了采用前项差错控制以及常用纠错码所引起的能量消耗。最后,讨论了无线传感器网络差错控制技术今后的研究重点。     

Hybrid weighted bit flipping low density parity check decoding

Low density parity check codes (LDPC) exhibit near capacity performance in terms of error correction. Large hardware costs, limited flexibility in terms of code length/code rate and considerable power consumption limit the use of belief-propagation algorithm based LDPC decoders in area and energy sensitive mobile environment. Serial bit flipping algorithms offer a trade-off between resource utilization and error correction performance at the expense of increased number of decoding iterations required for convergence. Parallel weighted bit flipping decoding and its variants aim at reducing the decoding iteration and time by flipping the potential erroneous bits in parallel. However, in most of the existing parallel decoding methods, the flipping threshold requires complex computations.In this paper, Hybrid Weighted Bit Flipping (HWBF) decoding is proposed to allow multiple bit flipping in each decoding iteration. To compute the number of bits that can be flipped in parallel, a criterion for determining the relationship between the erroneous bits in received code word is proposed. Using the proposed relation the proposed scheme can detect and correct a maximum of 3 erreneous hard decision bits in an iteration. The simulation results show that as compared to existing serial bit flipping decoding methods, the number of iterations required for convergence is reduced by 45% and the decoding time is reduced by 40%, by the use of proposed HWBF decoding. As compared to existing parallel bit flipping decoding methods, the proposed HWBF decoding can achieve similar bit error rate (BER) with same number of iterations and lesser computational complexity. Due to reduced number of decoding iterations, less computational complexity and reduced decoding time, the proposed HWBF decoding can be useful in energy sensitive mobile platforms.     

Energy-aware feedback control for a H.264 video decoder

Embedded devices using highly integrated chips must cope with conflicting constraints, while executing computationally demanding applications under limited energy storage. Automatic control and feedback loops appear to be an effective solution to simultaneously accommodate for performance uncertainties due to the tiny scale gates variability, varying and poorly predictable computing demands and limited energy storage constraints. This paper presents the example of an embedded video decoder controlled by several feedback loops to carry out the trade-off between decoding quality and energy consumption, exploiting the frequency and voltage scaling capabilities of the chip. The inner loop controls the dynamic voltage and frequency scaling through a fast predictive control strategy. The outer loop computes the scheduling set-points needed by the inner loop to process frames decoding. The feedback loops have been implemented on a stock PC and experimental results are provided.     

A hybrid genetic algorithm with multiple decoding methods for energy-aware remanufacturing system scheduling problem

Remanufacturing system scheduling is an essential and effective approach to realize the digitization and greening of the remanufacturing industry. However, previous researches on the remanufacturing system scheduling problem mainly consider a single or two production stages and economic objectives. In this paper, by integrating the three core production stages, i.e., disassembly, reprocessing and reassembly together, we study the energy-aware remanufacturing system scheduling problem in which the well-accepted Turn Off and On strategy is also considered. First, a mathematical model aiming at minimizing the total energy consumption (TEC) of the remanufacturing system is established. Then, a hybrid genetic algorithm based on variable neighborhood search (GAVNS) solution method is proposed, given the NP-hard nature of the problem. In GAVNS, each chromosome is encoded by a job sequence and three different decoding methods are specially designed according to the formation of optimization objective TEC. To enhance the algorithm's local search capability, the variable neighborhood search technique is introduced. The feasibility and effectiveness of GAVNS in addressing the energy-aware remanufacturing system scheduling problem is verified through simulation experiments on a set of designed test instances. Experimental results also demonstrate that: (1) the Turn Off and On strategy can effectively reduce TEC of the remanufacturing system, which can reach an energy saving rate of 6.68%; (2) the performance of those decoding methods varies with respect to the problem size; (3) the decoding method based on minimizing the energy consumption of the remanufacturing system (namely DM3) has the best performance among the three decoding methods in most cases; (4) GAVNS is more effective than its four peers, i.e., a variant GAVNS_R, iterated greedy algorithm (IG), extended artificial bee colony algorithm (EABC), discrete invasive weed optimization algorithm (DIWO) in seeking the optimal schedule.     

基于磁耦合的水下无线携能通信系统

磁耦合无线充电技术不仅能够为水下设备不间断地提供能量,同时在其传输能量上加载特定 的信号也可以为水下设备构建高速、稳定的数据传输链路,成为摆脱水下设备供电以及通信瓶颈的有 效手段。该文提出一种基于磁耦合的水下无线携能传输技术,采用现场可编程逻辑门阵列(FPGA) 开发了基于频移键控(FSK)调制的无线信息传输和无线能量传输模块,输入功率为 20 W 时,可实 现 1 Mbps 传输速率的无线充电设备水下低功率损耗数能同传。针对水下设备的移动需求导致信道变 化的问题,使用支持向量机(SVM)机器学习的方法进行数据解码,实现了 99.9% 的解码成功率。实验 结果显示,该文所开发的无线携能传输原型系统在高速率、远距离传输条件下,具有良好的能量传输 效率和信号解码准确率。