表面n沟CCD的电离辐射损伤

本文报道了150光敏元表面n沟CCD(电荷耦合器件)在不同能量电子和γ射线辐照后的电离辐射效应。试验结果表明,转移失效率在≤10Gy时已明显增大。但大多数器件在累积剂量≤50Gy时,通过调整“胖零”注入仍可工作。在高剂量辐照期间,不同栅偏压器件的转移效率退化存在较大差异。应用高频和准静态C-V技术分析了参数退化的原因。     

辐照偏置影响MOS结构辐射损伤的机制

本文研究了CMOS集成电路在1.5MeV电子辐照下p沟MOS晶体管感生阈电压偏移与辐照期间栅偏条件的关系。在不同器件中导致阈电压负偏最大的辐照偏置,有导通与截止两种。通过研究两种代表性工艺的n型硅MOS电容,在不同偏置辐照后的辐射感生平带电压、开启电压和界面态的变化,揭示了导致p沟MOS晶体管存在两种最劣辐照偏置的机制。     

半绝缘GaAs材料中的Si、Be双重离子注入

GaAs集成电路要求FET有一致的夹断特性,而半绝缘GaAs衬底的质量对Si全离子注入的MESFET有着重大影响。这是由于高阻衬底中的Cr在离子注入和高温退火后的再分布,注入后载流子分布出现翘尾,使部分器件呈现出异常输出特性,表现为夹断电压偏高,小电流时跨导偏低,难以获得均匀的夹断电压。在N型有源层之下,用离子注入工艺形成一个隐埋的P型层,可以大大改善夹断电压的均匀性。已有报道,通过在沟道层和衬底之间引入一P型层,亚微米栅GaAs MSFET的短沟道效应有效地被抑制了,背栅效应对于GaAs集成电路无疑是有害的,模拟计算也表明,使用近补偿的衬底材料或缓冲层可使背栅沟道电容减至最小。     

背栅偏置对不同沟道长度PDSOI晶体管总剂量损伤规律及机理研究

为研究辐照过程中施加背栅偏置对不同沟道长度部分耗尽绝缘体上硅金属氧化物半导体场效应晶体管（Partily Depleted Silicon-On-Insulator Metal Oxide Semiconductor Field Effect Transistors,PD SOI MOSFETs）电参数影响规律,及对隐埋氧化层（Buried Oxide,BOX）辐射感生陷阱电荷的调控规律及机理。基于晶体管转移特性曲线,通过提取辐射诱导晶体管阈值电压变化量,对比了不同沟道长度PD SOI在不同背栅偏置条件下的辐射损伤数据,试验结果显示：辐照过程中施加背栅偏置可以显著增强长沟晶体管的损伤。通过提取辐射在BOX层中引入陷阱电荷密度,结合TCAD(Technology Computer Aided Design)器件模拟仿真进行了机理研究,研究结果表明：短沟道晶体管在施加背栅偏置时会受到源漏电压的影响,从而使BOX层中电场分布及强度不同于长沟道晶体管,而长沟道晶体管受源漏电压的影响可以忽略。     

HWRR-Ⅲ辐照功率硅半导体器件

一、硅器件辐照简介加速器产生的电子束、钴—60辐射装置的γ射线和核反应堆的中子或γ射线,都可以用来辐照硅器件,改善电子特性。国外在70年代就已做了。国内80年代起开始研究,已取得一定的成绩。辐照的主要效应是射线使硅晶体产生缺陷也叫空位。这种空位能很快复合硅半导体中的少数载流子(以下简称少子),减少了少子在半导体中的扩散长度     

离子注入玻璃

离子注入和离子束分析技术在半导体和金属改性中已获得广泛应用,近年来又开始应用于绝缘体。在1981年第一届绝缘体辐照效应国际会议(REI-81)上,美国Sandia实验室Arnold和意大利Chinellato等发表离子注入玻璃效应的初步研究。Mazzoldi曾应用核反应分析对玻璃辐照效应进行了详细研究。 带电粒子辐照玻璃引起网状损伤并改变了表面化学成分。钠玻璃经离子注入后产生钠离子迁移,Na迁移有两种不同机构,在低质量离子辐照时以电子阻止本领为主,此时钠受到和     

浮栅ROM器件的脉冲与稳态总剂量效应研究

目前国内存储器辐照效应研究多数集中于功能测试,对具体参数研究较少。本文提出了浮栅型存储器阈值电压的测试方法,并引入紫外预辐照方法,对几种不同集成度的浮栅型存储器EPROM,开展了脉冲与稳态总剂量效应对器件阈值电压影响的异同性研究,分析了损伤机理。研究结果表明,不同于MOS和CMOS器件,脉冲辐照引起的浮栅ROM器件阈值电压漂移大于稳态辐照,为系统器件选型提供了重要参考。     

国产工艺的部分耗尽SOIPMOSFET总剂量辐照及退火效应研究

对国产工艺的部分耗尽SOIPMOSFET⁶⁰Coγ射线的总剂量辐照及退火效应进行了研究。结果表明：随着工艺技术的发展,正栅氧化层具有较强的抗辐照加固能力,背栅由于埋氧层厚度和工艺生长原因而对总剂量辐照较为敏感;辐照引入的深能级界面态陷阱电荷的散射作用,导致了正栅源漏饱和电流的显著降低;退火过程中界面态陷阱电荷的饱和决定了正栅亚阈曲线的平衡位置,而隧穿或热发射的电子只能中和部分背栅氧化物陷阱电荷,使得退火后背栅曲线仍与初始值有一定负向距离。     

国产工艺的部分耗尽SOI MOSFET总剂量辐照效应及可靠性

对国产工艺的部分耗尽SOIMOSFET60Coγ射线的总剂量辐照效应及其可靠性进行了研究。结果表明:辐照引入的氧化物陷阱电荷是阈值电压漂移的主要因素;背栅对总剂量辐照更为敏感,但在背栅特性漂移未超出一定范围的情况下,依然是正栅氧化层质量决定了器件的抗辐照性能;界面态陷阱电荷的散射作用降低了器件的源漏饱和电流;总剂量辐照后器件的常规可靠性可能会降低。     

注F+NMOSFET的电离辐照与退火特性

比较了CC4007电路栅介质中注F′和未注F′的NMOS晶体管在不同偏置辐照和不同环境退火的行为,结果表明,栅介质中F′的引入能明显降低器件的辐照敏感性,提高器件的可靠性能。表现为在同样辐照偏置下注F′器件比未注F′器件的阈电压漂移小,辐照后退火期间的界面态、氧化物电荷变化稳定。     

Charge sharing in multi-electrode devices for deterministic doping studied by IBIC

Following a single ion strike in a semiconductor device the induced charge distribution changes rapidly with time and space. This phenomenon has important applications to the sensing of ionizing radiation with applications as diverse as deterministic doping in semiconductor devices to radiation dosimetry. We have developed a new method for the investigation of this phenomenon by using a nuclear microprobe and the technique of Ion Beam Induced Charge (IBIC) applied to a specially configured sub-100 μm scale silicon device fitted with two independent surface electrodes coupled to independent data acquisition systems. The separation between the electrodes is comparable to the range of the 2 MeV He ions used in our experiments. This system allows us to integrate the total charge induced in the device by summing the signals from the independent electrodes and to measure the sharing of charge between the electrodes as a function of the ion strike location as a nuclear microprobe beam is scanned over the sensitive region of the device. It was found that for a given ion strike location the charge sharing between the electrodes allowed the beam-strike location to be determined to higher precision than the probe resolution. This result has potential application to the development of a deterministic doping technique where counted ion implantation is used to fabricate devices that exploit the quantum mechanical attributes of the implanted ions.     

Imprcved Fast Neutron Tolerance of GaAs JFET's Operating in the Hot Electron Range

The fast neutron induced degradation of the electrical characteristics of n-channel GaAs junction field effect transistors (JFET's) operating in the Shockley mode (thermal equilibrium) was estimated previously. Advances in technology have led to the fabrication of devices with micron sized channel lengths which are capable of response at microwave frequencies. Short channel lengths, however, result in device operation under thermal nonequilibrium conditions and hot electron effects must be considered. The theory of Lehovec and Zuleeg, which provides the characteristics for JFET's operating in the hot electron range, is employed in this paper to estimate the neutron degradation of these devices. It is shown that JFET's operating in the hot electron range are more resistant to neutron exposure than are JFET's operating in the Shockley region. Devices with channel doping concentration of 1017 cm-3 are predicted to survive fluences of 1016 neutrons/cm2. Some preliminary test results are reported.     

The Effects of Neutron Radiation on Second Breakdown and Thermal Behavior of Silicon Transistors

A method of measuring and the subsequent analysis of this data has indicated that the "thermal time constant" of silicon diffused transistors decreases with increasing neutron dosage. Emperically, it was noted that thermal time constant degradation constants, K?, can be assigned to all devices examined. For the silicon planar devices studied, degradation constants varied from 2.6 × 10-13cm2/neut for the radiation resistant devices, to 1.4 × 10-12 cm2/neut for other devices examined. By examining previous data for single diffused transistors the thermal time constant degradation factor was 2 × 10-11 cm2/neut. The conclusion of this report is that the "thermal time constant, which is related to second breakdown, effectively degrades upon exposure to neutron radiation, thereby decreasing the safe operating area of the device. However, the extent of degradation per dose may be predictable by data presented in the text.     

Research on total-dose irradiation effect of hardened partially-depleted NMOSFET/SIMOX

In this work, top and back gate characteristics of partially-depleted NMOS transistors with enclosed gate fabricated on SIMOX which is hardened by silicon ions implantation were studied under X-ray total-dose irradiation of three bias conditions. It has been found experimentally that back gate threshold shift and leakage current were greatly reduced during irradiation for hardened transistors, comparing to control ones. It has been confirmed that the improvement of total-dose properties of SOI devices is attributed to the silicon nanocrystals （nanoclusters） in buried oxides introduced by ion implantation.     

Effects of Oxygen and Dopant on Lifetime in Neutron-Irradiated Silicon

Neutron-induced degradation of carrier lifetime in silicon was observed for n- and p-type material containing various amounts of oxygen and different dopant impurities. There was no observable dependence of lifetime degradation on oxygen concentration. No dependence on type of dopant was observed in n-type silicon, and only small effects appeared to occur in p-type material. Evidently the recombination process is dominated by centers within primary defect clusters, rather than by point defects. These studies indicate that the choice of dopant-impurity or growth technique is usually unimportant in determining device failure in a neutron environment.     

Annealing Studies of Damage Introduced by High Energy Ion Implantations of Silicon

Ion implantation of dopant impurities into semiconductors offers numerous potential advantages. However, because of the limited knowledge presently available on the annealing of lattice damage, the implantation profile and the electrical characteristics of implanted layers, a considerable amount of investigation is required before this doping technique can be put to practical use. Experimentally obtained implantation profiles and electrical conductivity characteristics of high energy (above 1 Mev) dopant ion implants into silicon are presented. Some preliminary results of ion implantation on silicon dioxide and on the resulting devices are also included.     

Hole Trap Creation in SiO2 by Phosphorus Ion Penetration of Polycrystalline Silicon

Anomalously deep penetration of polycrystalline silicon by high energy phosphorus ions is shown to produce large concentrations of hole traps in MOS devices. In some cases the damage created by the implantations could not be detected in pre-irradiation characteristics. A strong dependence of hole trap concentration on implantation dose was found up to very high doses, and the effects of ion energy and silicon thickness were determined. The observations and results are directly applicable to the definition of a radiation hardened MOS process.     

Capacitance Recovery in Neutron-Irradiated Silicon Diodes by Majority and Minority Carrier Trapping

Majority and minority carrier trapping has been studied in neutron-irradiated silicon diodes by transient junction capacitance recovery as well as by capacitance-versus-frequency and pulsed field effect techniques. After exposure to damaging radiation, trapping results in a transient time dependence of depletion layer width which may determine the survivability of depletion layer devices in a radiation environment. Majority carrier traps have been found in n-type neutron-irradiated silicon at Ec -0.36 eV and in p-type silicon at Ev + 0.30 eV. The capture cross sections for both types of traps are of the order of 10-15 cm2. Following a burst of damaging radiation, traps with unequilibrated charge exist with concentration roughly an order of magnitude larger than observed in equilibrium. These unequilibrated states relax slowly via the majority carrier band but quite rapidly when minority carriers are deliberately injected. Capacitance-voltage characteristics of neutron-irradiated junctions recovered by minority carrier injection show that recovery occurs only within a diffusion length of the metallurgical junction. Capacitance and lifetime recovery effects can be qualitatively interpreted in terms of the Gossick model for the disordered region spacecharge layer modified to include minority, as well as majority, carrier trapping. Recovery in this model is attributed to a shrinking of the disordered region space-charge layer.     

硼缓冲注入层对氮化硼薄膜生长的影响

采用射频磁控溅射法在注硼的硅和高速钢基体上沉积制备c-BN薄膜,采用红外光谱(Infrared spectra,IR)、X射线光电子能谱(X-ray photoelectron spectrum,XPS)和原子力显微镜(Atomicforce microscopy, AFM)等分析方法对沉积的薄膜进行了表征分析.实验结果表明:硅基体上离子注硼有利于c-BN薄膜内应力的降低;合适的注硼量注入高速钢基体有利于c-BN的生成和薄膜内应力的降低.AFM分析表明,注硼处理的高速钢基体上沉积的薄膜表面形貌平整,结晶性较好.此外也采用XPS方法对硅和高速钢基体硼过渡层进行了成分与组织结构分析,探索研究了硼缓冲层对c-BN薄膜生长的影响.     

Critical issues in the formation of quantum computer test structures by ion implantation

The formation of quantum computer test structures in silicon by ion implantation enables the characterization of spin readout mechanisms with ensembles of dopant atoms and the development of single atom devices. We briefly review recent results in the characterization of spin dependent transport and single ion doping and then discuss the diffusion and segregation behaviour of phosphorus, antimony and bismuth ions from low fluence, low energy implantations as characterized through depth profiling by secondary ion mass spectrometry (SIMS). Both phosphorus and bismuth are found to segregate to the SiO₂/Si interface during activation anneals, while antimony diffusion is found to be minimal. An effect of the ion charge state on the range of antimony ions, ¹²¹Sb²⁵⁺, in SiO₂/Si is also discussed.