Factors Affecting the Squareness of Hysteresis Loops of Sintered NdFeB Magnets

Investigation into the magnets with different squareness of hysteresis loop (SHL) reveals that the microstructure of sintered NdFeB magnets has great effects on the SHL of the magnets. The abnormal grain growth deteriorates the SHL seriously. The shape of the grain and the grain boundary affect the intensity of demagnetization field, and consequently on the SHL. The added elements have effects on the phase structures and distributions in the magnets, which influences the uniform of demagnetization field.     

毫米波连续波雷达载波泄漏对消——理论分析与系统仿真

对限制连续波体制雷达系统作用距离的载波泄漏问题仔细地作了探讨，对各种连续波体制载波泄漏有源对消方法进行了理论分析，并针对毫米波宽带调频雷达实际泄漏信号的特点进行了对消环路的系统仿真。结果表明设计良好的对消系统能有效地抵消载波泄漏功率达３０￣６０ｄＢ，对进一步作实验研究提供了理论基础。     

液态金属钠高温沸腾实验回路应力分析与强度计算

本文主要完成了液态金属钠高温沸腾实验回路的应力分析与计算，确定了回路高温区连接管系的布置型式和支吊架系统，是该回路总体设计的重要组成部分。     

110kV高压开关二次储能回路改进

针对110kV联兴站110kV高压开关二次储能回路设计存在的缺陷,提出改进意见,并提出故障防范措施。     

A low power and small area all digital delay-locked loop based on ring oscillator architecture

A 133-500 MHz,5.2 mW @500 MHz,0.021 mm2 all digital delay-locked loop(ADDLL)is presented.The power and area reduction of the proposed ADDLL are achieved by implementing a high frequency ring oscillator(ROSC)to count the reference clocks such that the one-clock cycle delay chain and the phase detector in a conventional Master block are no longer needed.The proposed ADDLL has better immunity to PVT(process,voltage,and temperature)than most conventional DLLs,which do not update the control word signals after the locking process,since the control signals for slave delay line are updated in every 256 reference cycles.Fabricated in 0.13 um CMOS process,the measured RMS jitter is 10.83 ps at 500 MHz while the RMS jitter of the input signal is 9.97 ps.     

海洋条件对一回路松脱部件监测系统的影响分析

为保障海洋核动力装置反应堆一回路的运行安全,需要对一回路冷却剂内易松脱部件实施有效的监测。松脱部件监测系统是监测反应堆一回路冷却剂零部件松脱事件的专有系统。为提高海洋运行环境下系统监测有效性,分析了因海洋环境特征及反应堆结构特殊性带来的松脱部件监测本底噪声复杂、探测灵敏度提高、前端仪表性能要求提高、声传播路径变化、电气设备维修更换、报警分析困难、海洋机械环境适应性待验证等多项设计闲难,并给出了解决思路和建议。该研究对海洋环境运行下压水堆一回路松脱部件系统的设计具有指导意义。     

Blind estimation of the PN sequence in lower SNR DS-SS signals with residual carrier

This paper presents a method of singular value decomposition (SVD) plus digital phase lock loop (DPLL) to solve the difficult problem of blind pseudo-noise (PN) sequence estimation in low signal to noise ratios (SNR) direct sequence spread spectrum (DS-SS, DS) signals with residual carrier. Of course, the method needs to know the parameters of DS signal, such as the period and code rate of PN sequence. Firstly, the received signal is sampled and divided into non-overlapping signal vectors according to a temporal window, whose duration is two periods of PN sequence. Then, an autocorrelation matrix is computed and accumulated by the signal vectors one by one. The PN sequence with residual carrier can be estimated by the principal eigenvector of this autocorrelation matrix. Furthermore, a DPLL is used to deal with the estimated PN sequence with residual carrier, it estimates and tracks the residual carrier, removes the residual carrier in the end. Theory analysis and computer simulation results show that this method can effectively realize the PN sequence estimation from the input DS signals with residual carrier in lower SNR.     

基于环探头测量含运动导体的瞬态电流波形

电流除了用罗果夫斯基线圈进行测量外,还可通过环探头测量电流产生的磁场来计算得到。直线电机除了位置固定的母线导体外,还有沿母线运动的电枢;母线回路注入脉冲电流后,电枢会被加速而运动。简化母线和电枢为线电流模型,在长线模型基础上,通过环探头测量得到的磁场计算出近似电流波形。因为探头所测磁场主要由其附近电流所贡献,所以合理配置电枢起始位置与探头位置后,电枢运动对电流测量的影响很小。在瞬态电流上升沿、平台区和下降沿的不同阶段,利用实验折算的系数,可得到时域瞬态电流波形,其测量结果与用罗果夫斯基线圈测量波形一致。     

基于FPGA和ARM的GPS基带处理平台设计

本文研究了基于FPGA和ARM的GPS基带处理平台,详细介绍了C/A码跟踪环路及载波跟踪环路的设计和实现方法。采用Maxim公司的Max2769、Atmel公司的AT91SAM7SE25和Altera公司的EP3C25搭建硬件系统。Max2769完成下变频、采样并输出中频数据;ARM实现控制功能;FPGA完成解调、相关累加功能。实验结果表明基带处理平台可以稳定跟踪GPS信号,16通道情况下,冷启动时间为80秒,系统水平定位误差优于40米。     

证券市场中庄家与散户间的确定性微分博弈

基于确定性微分博弈理论,建立了一种庄家与散户间的连续时间的博弈模型.首先将所有散户作为一个整体与庄家进行博弈,以博弈双方持股率的动态关系作为动态系统方程,并以此构建了一个确定性微分博弈模型; 然后运用开环纳什均衡和反馈纳什均衡分别求解出满足共态函数的常微分方程组和满足价值函数的Issacs - Bellman偏微分方程,以此得到庄家与散户博弈的开环纳什均衡策略和反馈纳什均衡策略.该结果可为金融监管部门监管证券市场和证券市场投资者买卖股票提供参考.