Quality of Service in VoIP Communication

The focus of this paper lies in the practical aspects of voice over IP communication. VoIP configurations in the H.323 standard will be presented briefly. Following that, the fundamental protocol procedure of H.323 communication will be briefly explained. A further part of the paper will address the subject QoS (quality of service), and present the common measurement methods used in QoS. Results gained from experiments conducted in a VoIP environment will then follow. The investigations concentrate primarily on the load behavior of voice packets in relation to important parameters of this service. The results obtained are presented and evaluated in diagrams. The paper concludes with a summary.     

Performance characteristics of cascaded delay‐line node architectures in single‐path interconnection networks

Internally buffered multistage interconnection network architectures have been widely used in parallel computer systems and large switching fabrics. Migration from electrical domain to optical domain has raised the necessity of developing node architectures with optical buffers. Cascaded fibre delay line architectures can be seen as possible realizations of output and shared buffering in a 2 × 2‐switching element. These approaches can be used as buffered node architecture in a Banyan like interconnect. In this paper, we investigate and compare these approaches by using simulation methods. Different performance metrics, such as normalized throughput, average packet delay, packet loss rate and buffer utilization have been used under uniform and non‐uniform traffic models. Results show that the TC‐chain node Banyan network offer an improved normalized throughput and average packet delay performances under both traffic models without disrupting first‐in‐first‐out order of arrivals. The switched delay‐line requires fewer switching elements than TC and TTC architectures but at the cost of high packet delay. Copyright © 2004 John Wiley & Sons, Ltd.     

CMOS缓冲器的时延估算模型

随着集成电路生产工艺的进展，互连线在集成电路设计中的影响越来越大。为了减小互连线的影响，通常在芯片互连中插入缓冲器，但这样做会增加时延。因此，为了精确地对系统进行时延估计，必须对缓冲器的时延进行估算。基于Sakurai的器件模型，提出了一种新的缓冲器时延估算模型。     

理想九点五态控制器原理的叙述

用计算的方式叙述理想九点五态控制器的控制原理。为便于人们理解二阶对象的运动中控制的变化过程,将抽象的对象转换为人们熟知的L-R-C电路,通过调节输入电压(即控制作用)的大小和方向来实现对对象性能的调节,并使系统达到理想的性能指标。最后用仿真来验证计算结果的正确性。     

Logistic模型的改进及在油藏可采储量预测中的应用

为了更准确地预测油气藏未来的经济可采储量，依据油气藏随开发必然要经历产量递减和生产收支平衡的实际。利用Logistic模型中技术可采储量、产量与时间的相互关系，经推导和改进后，再结合当前经济技术条件下的废弃产油量，预测油气藏的有效生产时间及其经济可呆储量。实践证实，改进后的Logistic模型预测结果更符合油气藏的生产实际，能为油气藏的储量管理提供可靠的依据。     

电荷耦合器件积分时间对微型成像系统成像质量的影响

在光圈固定的情况下，确定合适的积分时间对于提高微型电荷耦合器件(CCD)成像系统的成像质量，增强微型飞行器的侦察能力具有十分重要的意义。本文讨论了决定CCD积分时间的各种因素，重点研究了适用于微型飞行器的CCD成像系统的积分时间与像移的关系，并进一步推导了计算像移量的相关数学模型。利用该模型对不同积分时间内采集的运动图像进行了像质评价，结果表明，在保证曝光量的前提下，当像移量被限制在1个像素内时，可以获得相对理想的运动图像像质。     

海拉尔盆地的古河道砂体识别方法

本文基于海拉尔盆地贝尔凹陷西北部高精度三维地震资料,通过对时间域、频率域地震属性的分析,研究了河道砂体的变化及分布规律,总结出了一套利用时间域、频率域地震属性识别古河道的方法。其中对河道砂体较为敏感的沿层属性主要有均方根振幅、反射强度梯度、有效带宽及瞬时频度等。利用这种识别方法在该区找到水下分流河道砂体和河口坝砂体,为该区的岩性勘探部署提供了具体目标。     

DMT系统中一种易于实现的时域均衡器

总结了DMT系统中时域均衡器(TEQ)的主要设计方法，指出最大缩短信噪比(MSSNR)TEQ的最优设计方法很难实时实现。提出了一种MSSNR TEQ的次优设计方法，它首先估计出目标抽样窗的最优延迟，然后用分步求解法求出TEQ的抽头系数。和最优方法相比，次优方法的计算量大幅度减少，可实时实现，而其缩短信噪比的损失很小。仿真实验验证了次优方法的有效性。     

Characterization of the Residence Time Distribution in Spray Dryers

In this work it is presented a study on the residence time distribution (RTD) of particles in a co-current pilot-plant spray dryer operated with a rotary atomization system. A nuclear technique is applied to investigate the RTD responses of spray dryers. The methodology is based on the injection of a radioisotope tracer in the feed stream followed by the monitoring of its concentration at the outlet stream. The experiments were performed during the drying of aqueous suspensions of gadolinium oxide. The RTD responses obtained experimentally presented good reproducibility, indicating that the technique applied is well suited to investigating fluid-dynamics of spray dryers. In addition to the experimental investigation, a mathematical model was used to describe the RTD experimental curves.     

SAW软扩频调制解调器的研究

报道了一种直接序列软扩频调制解调器的SAW实现方案，并给出了相应的实验结果。该方案对提高系统抗干扰能力、频宽利用等方面均具有与其他技术不同的特点。同时，该技术方案为进一步研究DS-OFDM打下了基础。