泌阳凹陷北部斜坡不整合与油气成藏

在对泌阳凹陷北部斜坡地层不整合的成因、结构、类型进行分析的基础上。对地层不整合对油气成藏的意义、油气成藏模式以及不整合面上下岩性配置关系对油气运聚影响等方面进行了深入研究，结合在泌阳凹陷北部斜坡已发现的不整合油藏的特征分析，总结了该区不整合油藏的分布特征及成藏规律，对下步在该区开展不整合油藏勘探具有一定的指导意义。     

浅谈如何有效学习计算机软件知识

计算机软件知识的学习并不是完全线性的，而是不断循环往复、迭代的过程。本对如何深入、广泛、有效地学习计算机软件知识做出了一些探讨。     

基于均匀光纤光栅的DWDM系统PMD补偿方法

提出一种基于均匀光纤Bragg光栅(FBG)的透射型密集波分复用(DWDM)系统多信道偏振模色散(PMD)补偿方案。当FBG受到横向挤压时，会产生双折射现象。当一波长的光信号从光栅带隙附近透射时，就会在快轴和慢轴之间产生时延差(DGD)。通过改变外力的大小来调节DGD的大小可以实现对PMD的补偿。通过将多个补偿光栅级联，就可以实现对DWDM系统多信道PMD的补偿。在100N外力作用下，5cm长的光栅最大可以补偿121ps的PMD，而对相邻0．8nm的信道，只引入0．2ps的DGD。     

Ku波段带通滤波器的设计与实现

介绍一种微波高频段带通滤波器的设计方法,同时给出一个滤波器的设计实例和测试结果。利用制作简单的园棒内导体结构,采用梳状线与同轴腔相结合的方式,实现窄带带通滤波器,达到结构紧凑、性能优良、方便组件集成的使用效果。     

MOCVD生长薄膜材料制作半导体可饱和吸收镜

介绍了当前国际上流行的用半导体可饱和吸收镜来对固体激光器、光纤激光器和半导体激光器进行被动锁模的方法,阐述了半导体可饱和吸收镜用来作为被动锁模吸收体的原理,并介绍了如何利用金属有机气相淀积(MOCVD)技术生长各种波长激光器所需要的半导体可饱和吸收镜.     

医用激光治疗机的触摸屏控制系统设计

介绍了医用红宝石激光器触摸屏控制系统的基本结构，分析了医用红宝石激光器中主要电磁干扰（EMI）的产生机制，提出了具体的电磁兼容（EMC）技术措施并得到实验验证。     

高速光通信系统中的色散问题及其补偿研究

当光纤通信系统单信道速度升级到40Gbit/s及以上时，色度色散（CD）和偏振模色散（PMD）已经成为严重影响系统性能的主要因素。本文主要从补偿的必要性、关键技术、主要方法和解决方案等方面分别对CD和PMD及其补偿进行了较详细的研究。     

A method of identifying latent human errors in work systems

Work system improvements are implemented in various manufacturing processes to prevent problems caused by human errors. However, they are almost always applied to problems which have already occurred. This paper examines a method of identifying latent human errors existing within the work systems beforehand. A procedure for applying failure mode and effect analysis to this identification problem was defined based on over 1000 empirical errors: a work system decomposition criterion and fundamental error modes for listing latent human errors, and then applied to three practical manufacturing processes in order to evaluate its effectiveness.     

Internet网的服务方式与入网方式一览

目前，世界上最大的计算机网络Ｉｎｔｅｒｎｅｔ网，已成为通达１５０多个国家的国际互联网络。作为引导中国计算机用户进入Ｉｎｔｅｒｎｅｔ的中国公用计算机互联网ＣＨＩＮＡＮＥＴ也正迅速发展。本文就Ｉｎｔｅｒｎｅｔ网的服务方式和入网方式进行了综述。     

Mixed Mode VLSI Implementation of a Neural Associative Memory

A mixed mode digital/analog special purpose VLSI hardware implementation of an associative memory with neural architecture is presented. The memory concept is based on a matrix architecture with binary storage elements holding the connection weights. To enhance the processing speed analog circuit techniques are applied to implement the algorithm for the association. To keep the memory density as high as possible two design strategies are considered. First, the number of transistors per storage element is kept to a minimum. In this paper a circuit technique that uses a single 6-transistor cell for weight storage and analog signal processing is proposed. Second, the device precision has been chosen to a moderate level to save area as much as possible. Since device mismatch limits the performance of analog circuits, the impact of device precision on the circuit performance is explicitly discussed. It is shown that the device precision limits the number of rows activated in parallel. Since the input vector as well as the output vector are considered to be sparsely coded it is concluded, that even for large matrices the proposed circuit technique is appropriate and ultra large scale integration with a large number of connection weights is feasible.