Synaptic Barristor Based on Phase‐Engineered 2D Heterostructures

The development of energy‐efficient artificial synapses capable of manifoldly tuning synaptic activities can provide a significant breakthrough toward novel neuromorphic computing technology. Here, a new class of artificial synaptic architecture, a three‐terminal device consisting of a vertically integrated monolithic tungsten oxide memristor, and a variable‐barrier tungsten selenide/graphene Schottky diode, termed as a ‘synaptic barrister,’ are reported. The device can implement essential synaptic characteristics, such as short‐term plasticity, long‐term plasticity, and paired‐pulse facilitation. Owing to the electrostatically controlled barrier height in the ultrathin van der Waals heterostructure, the device exhibits gate‐controlled memristive switching characteristics with tunable programming voltages of 0.2?0.5 V. Notably, by electrostatic tuning with a gate terminal, it can additionally regulate the degree and tuning rate of the synaptic weight independent of the programming impulses from source and drain terminals. Such gate tunability cannot be accomplished by previously reported synaptic devices such as memristors and synaptic transistors only mimicking the two‐neuronal‐based synapse. These capabilities eventually enable the accelerated consolidation and conversion of synaptic plasticity, functionally analogous to the synapse with an additional neuromodulator in biological neural networks.     

忆阻器的建模及高精度忆阻值读写电路的设计

使用现有电路元件设计了一种荷控忆阻器的理论模型。由于把忆阻器应用于存储器、神经网络、信号处理等领域均涉及到忆阻器的读写操作,并且目前忆阻器大多是数字量0和1的操作,没有模拟量的操作。所以利用了荷控忆阻器的电荷特性,给出一种描述如何读取忆阻器的模拟忆阻值的方法。利用了荷控忆阻器的频率特性,设计了一个反馈式忆阻值写电路,该电路能够在忆阻器的阻态范围内进行任意模拟量的写操作。仿真结果验证了设计的正确性。     

Low Power Computing Paradigms Based on Emerging Non-Volatile Nanodevices

Traditional digital processing approaches are based on semiconductor transistors, which suffer from high power consumption, aggravating with technology node scaling. To solve definitively this problem, a number of emerging non-volatile nanodevices are under intense investigations. Meanwhile, novel computing circuits are invented to dig the full potential of the nanodevices. The combination of non-volatile nanodevices with suitable computing paradigms have many merits compared with the complementary metal-oxide-semiconductor transistor (CMOS) technology based structures, such as zero standby power, ultra-high density, non-volatility, and acceptable access speed. In this paper, we overview and compare the computing paradigms based on the emerging nanodevices towards ultra-low dissipation.     

Hyperchaos and horseshoe in a 4D memristive system with a line of equilibria and its implementation

We study a four‐dimensional system modified from a three‐dimensional chaotic circuit by adding a memristor, which is a new fundamental electronic element with promising applications. Although the system has a line of infinitely many equilibria, our studies show that when the strength of the memristor increases, it can exhibit rich interesting dynamics, such as hyperchaos, long period‐1 orbits, transient hyperchaos, as well as non‐attractive behaviors frequently interrupting hyperchaos. To verify the existence of hyperchaos and reveal its mechanism, a horseshoe with two‐directional expansion is studied rigorously in detail by the virtue of the topological horseshoe theory and the computer‐assisted approach of a Poincaré map. At last, the system is implemented with an electronic circuit for experimental verification. Copyright © 2013 John Wiley & Sons, Ltd.     

并联型忆阻器混沌电路设计

利用磁控忆阻器、电感和电容三个元件并联设计了一种新型忆阻器混沌电路。采用常规的动力学分析方法研究了系统的基本动力学特性,例如相图、平衡点稳定性分析、李雅普诺夫指数谱和分岔图。结果表明该系统产生了一类特殊混沌吸引子,且随系统参数改变,系统可以产生丰富的混沌行为。为验证电路混沌行为,利用Pspice进行了相应的电路仿真,仿真结果与理论分析、数值仿真基本一致。     

有源磁控忆阻器的等效电路及滤波频率特性研究

基于三次非线性数学模型,采用通用有源电路元器件完成了一种磁控忆阻器的"浮地"二端口等效电路实现,基于Multisim电路仿真软件并搭建实际硬件电路研究了其伏安特性,进而研究了基于该有源磁控忆阻器的WC高通和低通滤波电路的频率特性,并与无源RC高通和低通滤波电路的频率特性进行了比较。软件仿真和硬件实验结果表明:有源WC高通滤波电路与无源RC高通滤波电路呈现相似的幅频和相频特性,而有源WC低通滤波电路的频率特性不同于单极点的无源RC低通滤波电路,其幅频和相频特性均呈现出多极点的特性。     

忆阻神经网络在智能电网监控系统中的应用

随着能源危机的到来,智能电网技术成为世界各国所关注的重点。而与此同时,智能发电、输电、变配电、用电以及智能调度等各个环节所取得的技术性突破也为智能电网的大规模实现提供了可能。然而,智能电网结构复杂,电气设备分布广泛,应用需求多,这些特点都给电网运行的安全性和可靠性提出了挑战。针对智能电网的安全运行问题,提出了将忆阻器与人工神经网络相结合,构建出基于忆阻神经网络的智能电网运行状态监控系统,从而可以利用忆阻器所具有的记忆功能,节省人工神经网络的权值传输时间,提高神经网络的数据训练效率,保证了监控系统的及时性和有效性。     

基于忆阻神经网络的光伏面板清扫机器人PID控制器研究

机器人清扫是光伏面板高效、便捷的清扫方式。文章研究了光伏面板清扫机器人的PID控制器的优化策略。文章基于忆阻器独特的纳米级电路特性,设计了一种新型的突触电路;然后,基于新型的突触电路,构建对应的神经元和神经网络电路,并将忆阻神经网络和光伏面板清扫机器人中的PID控制器相结合,提出一种新型PID控制方法,该方法在一定程度上解决了传统PID控制器体积大、功耗高和相关参数不可调的问题;最后,基于仿真结果验证了文章提出方案的可行性和有效性。