Sigma-Delta ADC数字抽取滤波器的设计和实现

数字抽取滤波器是Sigma-Delta(Σ-Δ)模数转换器(ADC)的重要组成部分,它负责撞鄄驻调制器输出信号的滤波和抽取。文中设计的数字抽取滤波器由级联积分梳状(CIC)滤波器、CIC补偿滤波器和半带滤波器组成。首先,介绍Σ-Δ ADC原理;然后,讨论数字抽取滤波器的原理及实现;接着,分别从MATLAB和Verilog实现验证抽取滤波器的功能;最后,通过测试实际芯片验证数字抽取滤波器的功能和性能,满足设计要求。     

应用于无线传感器网络的带片上自动调谐功能的CMOS Gm-C复数滤波器

本文采用0.18um CMOS工艺设计并实现了一个应用于无线传感器网络的带有片上自动调谐功能的Gm-C复数滤波器。该滤波器基于一个五阶切比雪夫低通RLC原型,由电容和差分跨导综合而成。为了实现滤波器中心频率和带宽的精确控制,采用了一个传统锁相环电路来实现片上自动调谐的功能。该滤波器的中心频率为2MHz,带宽2.4MHz。电路的测试结果表明：在1.8V电源电压下,自动调谐电路工作正常,滤波器具有较为精确的中心频率和带宽,实现了超过45dB的镜像抑制,同时带内抖动小于1.2dB。包括片上自动调谐电路在内的整个滤波器电路共有4.9mA的电流消耗。     

A CMOS G_m-C complex filter with on-chip automatic tuning for wireless sensor network application

A G_m-C complex filter with on-chip automatic tuning for wireless sensor networks is designed and implemented using 0.18μm CMOS process.This filter is synthesized from a low-pass 5th-order Chebyshev RLC ladder filter prototype by means of capacitors and fully balanced transconductors.A conventional phase-locked loop is used to realize the on-chip automatic tuning for both center frequency and bandwidth control.The filter is centered at 2 MHz with a bandwidth of 2.4 MHz.The measured results show that the filter provides more than 45 dB image rejection while the ripple in the pass-band is less than 1.2 dB.The complete filter including on-chip tuning circuit consumes 4.9 mA with 1.8 V single supply voltage.     

一种-16 dB ~12 dB增益范围的高线性度PGA设计

可编程增益放大器广泛应用于射频接收通道,起中频放大、驱动模数转换器的功能.基于电阻反馈运放设计的可编程增益放大器具有动态范围大、线性度高的特点.文中采用互补金属氧化物半导体工艺设计实现了一种基于全差分运放和衰减器的宽范围、高线性度可编程增益放大器.测试结果表明增益变化范围为-16dB～12dB,步进为1 dB,输出1 dB压缩点大于10 dBm@60 MHz,输出三阶交调点大于26 dBm@60 MHz.