An acoustic system for providing the two-phase liquid profile in oil field storage tanks

The continuing need for in situ measurements of the emulsion layer between crude oil and water within oil field tanks has initiated experimental and theoretical investigations of candidate measurement methods. This paper describes a new low-cost and nonradioactive industrial field prototype device that provides, continuously and in real time, the vertical profile of the 2-phase liquid within oil field tank separators (i.e., percentage of water in oil at different heights of the tank, as well as the emulsion layer interfaces) using ultrasonic waves. The device, which has been installed in a vessel through an 8-in. flange, consists of a 1-D array of tens of ultrasonic transducers (28 transducers in this paper) that are activated in a time-multiplexed manner by an embedded transmitter fixed on the top of the tank. This latest version implements a feedforward neural network with back-propagation learning to determine the vertical water-cut distribution along the vessel. It also implements an expert-system-based algorithm to determine the lower and higher positions of the emulsion layer. The results obtained from the extensive experiments, which have been conducted under various conditions of temperature, indicate that the device can determine the profile of the 2-phase liquid within a relative error of ± 3%.     

A New Real Time Object Segmentation and Tracking Algorithm and its Parallel Hardware Architecture

Most of the emerging content-based multimedia technologies are based on efficient methods to solve machine early vision tasks. Among other tasks, object segmentation is perhaps the most important problem in single image processing. The solution of this problem is the key technology of the development of the majority of leading-edge interactive video communication technology and telepresence systems. The aim of this paper is to present a robust framework for real-time object segmentation and tracking in video sequences taken simultaneously from different perspectives. The other contribution of the paper is to present a new dedicated parallel hardware architecture. Its composed of a mixture of Digital Signal Processing (DSP) and Field Programmable Gate Array (FPGA) technologies and uses the Content Addressable Memory (CAM) as a main processing unit. Experimental results indicate that small amount of hardware can deliver real-time performance and high accuracy. This is an improvement over previous systems, where execution time of the second-order using a greater amount of hardware has been proposed.Mahmoud Meribout (BS85, M91). Received the PhD degree in Electronic Engineering from the University of Technology of Compiegne (France), in January 3rd 1995. He worked one year as an Associate Researcher, where he has been involved in some industrial projects related to hardware board design and video processing. FromNovember 1995 to October 2000, he has beenworking in Japan, with NTT and NEC corporations respectively, where he has been involved in several projects related to hardware & software design of next generation multimedia and networking equipments. He is holding several Japanese and American patents related to this particular topic. In 1998, he has received the NTT best award for his research and development records.Maamouru Nakanishi received the B.S. and M.S. in Electronics in 1985 and 1987 respectively, all from Kyoto University. Since 1987, he has been engaged in R&D of parallel processing architectures, memory-processor integration technology at NTT Corporation (Tokyo, Japan), when he has been involved in research on Advanced Content Addressable Memory applied to video processing. In 1998, he has received the NTT best award for his research and development records.     

Efficient metrics and high-level synthesis for dynamically reconfigurable logic

The increase in complexity of programmable hardware platforms results in the need to develop efficient high-level synthesis (HLS) tools since it allows more efficient exploration of the design space while predicting the effects of technology specific tools on the design space. Much of the previous works however neglect the delay of interconnects (e.g. multiplexer) which can indeed contribute heavily on the overall performance of the design. In addition, in the case of dynamic reconfigurable logic (DRL) circuits, unless an appropriate design methodology is followed, large number of configurable logic blocks (CLBs) could be used for communication between contexts, rather than for implementing functional units (FUs). The aim of this paper is to present a new technique to perform interconnect-sensitive synthesis, targeting dynamic reconfigurable circuits. Further, the proposed technique exploits multiple hardware contexts to achieve efficient designs. Experimental results on several benchmarks, which have been done on our DRL LSI circuit (Meribout, 2000 and Motomura, 1997), demonstrate that by jointly optimizing the interconnect, communication, and function-unit cost, higher quality designs than other previous techniques (e.g. force-directed scheduling) can be achieved.     

Design and Implementation of a New Nonradioactive-Based Machine for Detecting Oil–Water Interfaces in Oil Tanks

In the oil industry, many applications require the measurement of more than one liquid level interface, often in challenging environments. In this paper, a new ultrasonic-based technique has been developed to determine oil, emulsion, and water levels in oil tanks. It consists of a compact and programmable ultrasound-based multilayer level measurement device for which a feed-forward neural network is implemented. The advantages of this method over current methods include contactless distance measurement, higher accuracy, lower cost, simpler setup, and not using ionizing radiation. The other advantage of this technique over light-based methods is its insensitivity to a dusty and smoky environment and independence of the object material and surface. Preliminary experiments have been conducted on the device. In this paper, the design and operating parameters of the device are discussed, and evidence of satisfactory performance is given.     

On using the CAM concept for parametric curve extraction

A parallel algorithm, in order to extract parametric curves from a two-dimensional (2-D) image space, is proposed. It is based on the Hough transform (HT) and uses the content addressable memory (CAM) as the main processor. A set of simulated results for circular shape extraction are presented in order to demonstrate its merit. Hence, voting, thresholding, and three-dimensional (3-D) peak extraction are efficiently performed within the CAM. In addition, and in order to reduce the quantization errors, a weighted AT algorithm (WHT), which uses a weighted voting is proposed. Experimental results indicate that a real-time shape extraction for an image 256/spl times/256 can be achieved within a small amount of hardware. Therefore, CAM-based HT can be considered as a promising attraction for next generation pattern recognition platforms.     

A new scalable and reconfigurable architecture

As optical link speeds get faster, demands for performance and embedded network services impose increasing flexibility demands. Internet routers must become more efficient and programmable. A new hardware architecture using a dynamic reconfigurable logic (DRL) circuit, along with its design methodology, is proposed. Our approach is to allocate all resources using the dynamic reconfigurable control switch (DRCS). The design space for scheduling the DRL for the networking application (router) is explored. Our proposal outperforms recent network processors since it has a better memory interface and because chained nodes of a thread can be executed at once. Our architecture offers an attractive alternative to expensive commercial solutions employing multiple content addressable memory (CAM) devices and application specific integrated circuits (ASICs). By providing high-performance at low per-ports costs, our architecture is a prime candidate for system-on-chip (SoC) solutions for next generation programmable router port processors.     

A new hierarchical reconstruction algorithm for electrical capacitance tomography using a relaxation region-based approach

This paper presents a new two-dimensional tomography algorithm to reconstruct the internal image of a multiphase fluid passing through a section of a pipe. The embedded sensing module consists of an array of electrodes placed around the pipe to measure all possible combinations of capacitances between these electrodes. The algorithm is hierarchical and consists to confine progressively the regions of interest which hold the inhomogeneous phase by refining the finite element mesh size around their boundaries. Experimental results done on various images clearly indicate that the proposed algorithm improves the quality of the reconstructed images while keeping the computation time significantly lower than other traditional methods.     

Integration of impedance measurements with acoustic measurements for accurate two phase flow metering in case of high water-cut

Previous studies have yielded promising results as to the use of impedance measurements in two phase flow metering in estimating the flow rate of individual flows in oil fields (i.e. water and oil flows). However, most of these approaches are not accurate in the case of high water-cut or within the water-cut range 40% to 60%, where the mixed liquid is neither a good conductor, nor a good insulator. With the increased out-aging of the oil fields, these two ranges are usually dominant which require the usage of new methods. This paper presents a new non-radioactive probe which combines acoustic measurements with the impedance measurements to accurately provide in real-time the flow rate of each individual flow within the whole water-cut range. A dedicated pattern recognition algorithm using a neural network and relying on the physical properties of the fluid dynamic has been implemented. Experimental measurements performed on a laboratory scale two phase flow loop show that the proposed flow meter can in fact become a competitive two phase flow meter, since less than 5% relative error could be achieved for the whole water-cut range.