A scheme of flexible and reversible information-hiding in SMVQ mechanism

Peer-to-Peer Networking and Applications - Information hiding refers to concealing data into cover media to prevent the private message from being stolen in peer-to-peer networks, mobile...     

Low temperature bonding technology for 3D integration

3D integration provides a promising solution to achieve system level integration with high function density, small form factor, enhanced transmission speed and low power consumption. Stacked bonding is the key technology to enable the communication between different strata of the 3D integration system. Low temperature bonding approaches are explored in industry to solve the performance degradation issue of the integrated devices. In this paper, various low temperature bonding technologies are reviewed and introduced, as well as the latest developments in world-wide companies and research institutes. The outlook for industrial application is also addressed in the paper.     

A low-photocurrent CMOS retinal focal-plane sensor with a pseudo-BJT smoothing network and an adaptive current Schmitt trigger for scanner applications

In this work, a new structure of low-photocurrent CMOS retinal focal-plane sensor with pseudo-BJT smoothing network and adaptive current Schmitt trigger is proposed. The proposed structure is very simple and compact. This new circuit can easily be implemented in CMOS technology with a small chip area. Another innovation of this circuit is that the proposed circuit could be operated for low-induced current levels (pA), and the current hysteresis of the proposed current Schmitt trigger could be adjusted adaptively according to the value of induced photocurrents. In this work, the detection of static and moving objects, such as a moving white bar, are proven by projecting a pattern through HSPICE simulation. The proposed retinal focal-plane sensor includes a 32 /spl times/ 32 pixel array with a pixel size of 70 /spl times/ 70 /spl mu/m/sup 2/. The fill factor is 75% and the total chip area is 3000 /spl times/ 3030 /spl mu/m/sup 2/. It is with fully functional 32 /spl times/ 32 implementations consuming less than 8.8 /spl mu/W per pixel at 3.3 V. Measurement results show that the proposed new retinal focal-plane sensor has successfully been used in character recognition of scanner systems, such as pen scanners, etc.     

Application of Reproducing the Kernel Particle Method on the Simulation of the Membrane of a Capacitive Micromachined Microphone in Viscothermal Air

Simulation of the microphone membrane determines whether highest sensitivity is attainable when it comes to the field of microelectromechanical system (MEMS) microphone design. The reproducing kernel particle method is introduced to simulate a MEMS microphone membrane in viscothermal fluid. The result from a numerical axisymmetry model of 1 mm radius and 10 μm thickness membrane with a fixed boundary condition upon 1 mm thickness viscothermal air is identical to that from the theoretical model. Finally, a MEMS axisymmetry model of a 180 μm radius and 10 μm thickness membrane upon 10 μm thickness viscothermal air is simulated here.     

Backhaul and Routing Assignments with End-to-End QoS Constraints for Wireless Mesh Networks

In scalable last-mile broadband networks such as wireless mesh networks (WMNs), quality-of-service (QoS) concerns are vital to multimedia applications such as video-conferencing and voice over IP (VoIP). Crucial decisions involve the number of backhauls that are to be deployed as well as the optimal assignment of paths and bandwidths. We focus on cost effectiveness and QoS requirements to develop a solution based on Lagrangean Relaxation and the subgradient method. Our approach satisfies QoS demands and minimizes costs more effectively than general algorithms, as demonstrated by our experimental results.     

A low-cost CMOS dual-mode AC/DC data converter for signal measuring technique

A low-cost CMOS dual-mode AC/DC data converter for signal measuring technique is newly proposed. Instead of traditional full wave rectification, the realized synchronous rectification circuit is more attractive due to the easier integration and lower cost. In this paper, the design strategies of implementing the signal processing of AC and DC modes in the integrated circuit are discussed completely. Proven through SIMULINK in system level and SPICE simulations in circuit level, simulation results show that the proposed dual-mode AC/DC data converter achieves 8-bit resolution in DC mode and 7-bit resolution in AC mode. Measurement results have successfully verified the correct functions and performance of the proposed data converter and confirmed it for AC/DC signal measuring technique. The area of this chip is 710 × 630 μm² and the measured power consumption is 5.1 mW. The proposed dual-mode AC/DC data converter is suitable for the system of analog and mixed-signal boundary scan.     

Improving the efficiency of Monte Carlo power estimation [VLSI]

In this paper, we propose two efficient statistical sampling techniques for estimating the total power consumption of large hierarchical circuits. We first show that, due to the characteristic of the sampling efficiency in Monte Carlo simulation, granularity of samples is an important issue in achieving high overall efficiency. The proposed techniques perform sampling both temporally (across different clock cycles) and spatially (across different modules) so that a smaller sample granularity can be achieved while maintaining the normality of samples. The first proposed technique, which is referred to as the module-based approach, samples each module independently when forming a power sample. The second technique, which is referred to as the cluster-based approach, lumps the modules of a hierarchical circuit into a number of clusters on which sampling is then performed. Both techniques adapt stratification to further improve the efficiency. Experimental results show that these techniques provide a reduction of 23× in simulation run time compared to existing Monte-Carlo simulation techniques     

Determine the optimal carrier selection for a logistics network based on multi-commodity reliability criterion

From the perspective of supply chain management, the selected carrier plays an important role in freight delivery. This article proposes a new criterion of multi-commodity reliability and optimises the carrier selection based on such a criterion for logistics networks with routes and nodes, over which multiple commodities are delivered. Carrier selection concerns the selection of exactly one carrier to deliver freight on each route. The capacity of each carrier has several available values associated with a probability distribution, since some of a carrier's capacity may be reserved for various orders. Therefore, the logistics network, given any carrier selection, is a multi-commodity multi-state logistics network. Multi-commodity reliability is defined as a probability that the logistics network can satisfy a customer's demand for various commodities, and is a performance indicator for freight delivery. To solve this problem, this study proposes an optimisation algorithm that integrates genetic algorithm, minimal paths and Recursive Sum of Disjoint Products. A practical example in which multi-sized LCD monitors are delivered from China to Germany is considered to illustrate the solution procedure.     

Reliability evaluation of a stochastic-flow distribution network with delivery spoilage

From the supply chain management perspective, this paper focuses on evaluating network reliability of a stochastic-flow distribution network (SFDN) under the delivery spoilage consideration. An SFDN is composed of nodes and routes, where each node denotes a supplier, a transfer center, or a market, and each route connects a pair of nodes. Along each route, there is a carrier whose available capacity is stochastic. Moreover, goods may rot or be spoilt during delivery due to traffic accidents, collisions, natural disasters, weather, time, etc., and thus the intact goods may not satisfy the market demand. Network reliability is defined as the probability that the SFDN can satisfy the market demand under the delivery spoilage consideration and the delivery budget constraint, and can be regarded as a performance index for distribution activity in supply chain management. An algorithm is developed in terms of minimal paths to evaluate network reliability. A numerical example is given to illustrate the solution procedure. Then a practical case of fruit distribution is presented to emphasize the management implication of network reliability.