Dry etching of poly-Si/TaN/HfSiON gate stack for advanced complementary metal-oxide-semiconductor devices

A novel dry etching process of a poly-Si/TaN/HfSiON gate stack for advanced complementary metal-oxide-semiconductor（CMOS） devices is investigated.Our strategy to process a poly-Si/TaN/HfSiON gate stack is that each layer of gate stack is selectively etched with a vertical profile.First,a three-step plasma etching process is developed to get a vertical poly-Si profile and a reliable etch-stop on a TaN metal gate.Then different BCl₃-based plasmas are applied to etch the TaN metal gate and find that BCl₃/Cl₂/O₂/Ar plasma is a suitable choice to get a vertical TaN profile.Moreover,considering that Cl₂ almost has no selectivity to Si substrate, BCl₃/Ar plasma is applied to etch HfSiON dielectric to improve the selectivity to Si substrate after the TaN metal gate is vertically etched off by the optimized BCl₃/Cl₂/O₂/Ar plasma.Finally,we have succeeded in etching a poly-Si/TaN/HfSiON stack with a vertical profile and almost no Si loss utilizing these new etching technologies.     

Low voltage organic devices and circuits with aluminum oxide thin film dielectric layer

Low voltage operating organic devices and circuits have been realized using atomic layer deposition deposited aluminum oxide thin film as dielectric layer. The dielectric film has per unit area capacitance of 165 nF/cm2 and leakage current of 1 nA/cm2 at 1 MV/cm. The devices and circuits use the small-molecule hydrocarbon pentacene as the active semiconductor material. Transistors,inverters,and ring oscillators with operating voltage lower than 5 V were obtained. The mobility of organic field-effect transis...     

Electrical characteristics of MOS capacitor using amorphous Gd2O3-doped HfO2 insulator

This work described the electrical characteristics of a kind of amorphous Gd2O3-doped HfO2 insulator for high-k metal-oxide-semiconductor(MOS) capacitors.Compared with pure HfO2,the doped HfO2 with an optimum concentration of Gd2O3 as MOS gate dielectric exhibited a lower leakage current,thinner effective oxide thickness and less fixed oxide charges density.The result indicated that Gd2O3 doping power of 60 W exhibited the best electrical characteristics,maximum capacitance,lowest leakage current of 9.35079...     

不同界面层对HfTaON栅介质MOS特性的影响

采用磁控溅射方法,在Si衬底上制备HfTaON高k栅介质,研究了AlON、HfON、TaON不同界面层对MOS器件电特性的影响。结果表明,HfTaON/AlON叠层栅介质结构由于在AlON界面层附近形成一种Hf-Al-O"熵稳定"的亚稳态结构,且AlON具有较高的结晶温度、与Si接触有好的界面特性等,使制备的MOS器件表现出优良的电性能:低的界面态密度、低的栅极漏电、高的可靠性以及高的等效k值(21.2)。此外,N元素的加入可以抑制Hf和Ta的扩散,有效抑制界面态的产生,并使器件具有优良的抵抗高场应力的能力。     

石墨烯基红外探测器的高k栅氧集成

从石墨烯发现与制备出发,综述了室温下双层石墨烯或石墨烯带禁带在0～250 meV可调的特性,及其在中远红外探测器的背栅、顶栅结构中作为栅氧形成材料的应用,并介绍了目前各种先进工艺.     

金属栅/高k基FinFET研究进展

对比传统的平面型晶体管,总结了三维立体结构FinFET器件的结构特性。结合MOS器件栅介质材料研究进展,分别从纯硅基、多晶硅/高k基以及金属栅/高k基三个阶段综述了Fin-FET器件的发展历程,分析了各阶段FinFET器件的材料特性及其在等比缩小时所面临的关键问题,并着重从延迟时间、可靠性和功耗三方面分析了金属栅/高k基FinFET应用于22 nm器件的性能优势。基于短沟道效应以及界面态对器件性能的影响,探讨了FinFET器件尺寸等比缩小可能产生的负面效应及其解决办法。分析了FinFET器件下一步可能的发展方向,主要为高迁移率沟道材料、立体型栅结构以及基于新原理的电子器件。     

高k栅介质的可靠性问题

随着集成电路特征尺寸的不断缩短,利用先进的高k/金属栅堆叠来取代传统的SiO2/多晶硅栅结构成为微电子技术发展的必然,确保这些新的栅极堆叠类型具有足够的可靠性是非常重要的.综述了高k栅介质可靠性的研究现状,阐明了瞬态充电效应导致的阈值电压不可靠问题,对偏压温度不稳定现象(BTI)和高k击穿特性进行了探讨.     

Au纳米晶MIS结构存储性能研究

从器件结构和能带的角度分析了提高非易失性存储器性能的可能途径,建立了纳米晶浮栅结构的存储模型,并在模型中考虑了量子限制效应对纳米晶存储性能的影响.基于模型计算,分析了纳米晶材料、高k隧穿介质材料及其厚度对纳米晶浮栅结构存储性能的影响.同时,制作了MIS结构(Si/ZrO2/Au Ncs/SiO2/Al)的存储单元,针对该存储单元的电荷存储能力和电荷保持特性进行测试,并对测试结果进行分析.     

原子层淀积制备金属氧化物薄膜研究进展

原子层淀积(ALD)技术作为一种先进的薄膜制备方法近年来越来越得到重视,它能精确地控制薄膜的厚度和组分,实现原子层级的生长,生长的薄膜具有很好的均匀性和保形性,因而在微电子和光电子等领域有广泛的应用前景。本文综述了ALD技术的基本原理,及其在金属氧化物薄膜制备上的研究进展。     

HfO2 Gate Dielectrics for Future Generation of CMOS Device Application

Introduction High- k gate dielectrics have been extensivelystudied as alternates to conventional gate oxide( Si O2 ) due to the aggressive downscaling of Si O2thickness in CMOS devices,and hence the exces-sive gate leakage.Hf O2 has emerged as one...