基于FPGA的高速链路通信系统实现

介绍了利用FPGA实现了基于LVDS接口的高速链路通信系统。在硬件上实现了高速链路通信系统中数据帧的处理、并串转换、串并转换和LVDS接口的输入输出;在软件上实现了终端链路通信软件。此系统可用于两路50Mbps的终端用户数据收发,在链路合路器中进行加帧处理后发出,链路分路器接收到该加帧数据流后进行解帧操作,最终根据不同的用户输出相应分路的50Mbps的LVDS用户数据。

Implementation of high speed link communication system based on FPGA

This paper implemented a high-speed link communication system based on LVDS interface by FPGA. In the hardware part, it fulfilled the data frame transaction in the link controller, parallel to serial converter, serial to parallel converter, input and output based on the interface of LVDS. In the software part, it accomplished communication mode selection, data specifying and transmission. This system has two channel inputs of user's data by LVDS at a rate of 50 Mbps , and then the link channel combiner frames the data and transmits it. As soon as the channel separator receives the framed data stream, it separates the framed data stream and sends it out at a rate of 50 Mbps by LVDS in different channel according to the user's identification.