| 基于FPGA的1024点高性能FFT处理器的设计 |
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| 引用本文： | 钟冠文,卢亚伟,付欣玮,庞志勇,陈弟虎.基于FPGA的1024点高性能FFT处理器的设计[J].微计算机信息,2012(8):66-67,111. |
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| 作者姓名： | 钟冠文 卢亚伟 付欣玮 庞志勇 陈弟虎 |
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| 作者单位： | 中山大学物理科学与工程技术学院 |
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| 摘 要： | 为了提高FFT(Fast Fourier Transformation)处理数据的实时性,本文研究了16位1024点FFT并提出了几种有效的优化方案。在Xilinx公司Virtex-E系列FPGA上实现了工作频率50MHz以上、流水线型、基22单路径反馈结构(R22SDF)FFT处理器。仿真和性能评估结果表明本FFT处理器的有较高的性能。
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| 关 键 词： | FFT处理器 基22单路径反馈结构 快速傅立叶变换 流水线 验证 |
Design of 1024-Point FFT Processor based on FPGA |
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| ZHONG Guan-wen,LU Ya-wei,FU Xin-Wei PANG Zhi-yong,CHEN Di-hu.Design of 1024-Point FFT Processor based on FPGA[J].Control & Automation,2012(8):66-67,111. |
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| Authors: | ZHONG Guan-wen LU Ya-wei FU Xin-Wei PANG Zhi-yong CHEN Di-hu |
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| Affiliation: | ZHONG Guan-wen LU Ya-wei FU Xin-Wei PANG Zhi-yong CHEN Di-hu |
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| Abstract: | This paper presents optimized implementations of 16-bit 1024-point pipeline FFT processor with the R2 2 SDF architecture on FPGA(Field-Programmable Gate Array).To improve the ability of FFT ’s processing data in real time,different optimization techniques were explored.With these techniques,our FFT processor has been realized on Virtex-E FPGA with operation frequency above 50MHz,pipeline,R2 2 SDF architecture.Validation and performance evaluation results show that the FFT processor has higher performance. |
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| Keywords: | FFT processor R 2 2SDF FFT pipeline verification |
| 本文献已被 CNKI 等数据库收录！ |
