（英）CMOS毫米波低功耗超宽带共栅低噪声放大器

本文陈述了一个基于单端共栅与共源共栅级联结构的超宽带低噪声放大器(LNA)。该LNA用标准90-nm RF CMOS工艺实现并具有如下特征：在28.5到39 GHz频段内测得的平坦增益大于10 dB；-3 dB带宽从27到42 GHz达到了15 GHz,这几乎覆盖了整个Ka带；最小噪声系数(NF)为4.2 dB,平均NF在27-42 GHz频段内为5.1 dB；S₁₁在整个测试频段内小于-11 dB。40 GHz处输入三阶交调点(IIP3)的测试值为 2 dBm。整个电路的直流功耗为5.3 mW。包括焊盘在内的芯片面积为0.58*0.48 mm2_。

Millimeter-wave Low Power UWB CMOS Common-gate LNA[sub_s]*[sub_e]

This paper presents an Ultra-wideband (UWB) low-noise amplifier (LNA) based on a single-ended common-gate (CG) in cascade with cascode configuration. The proposed LNA is implemented by a standard 90-nm RF CMOS technology and it features that the measured flat gain is more than 10 dB from 28.5 to 39 GHz, the -3 dB bandwidth is 15 GHz from 27 to 42 GHz which covers almost the entire Ka band, the minimum noise figure (NF) is 4.2 dB, the average NF is 5.1 dB within the 27-42 GHz range, the S₁₁ is better than -11 dB over the overall testing band, and the input 3rd-order intermodulation point (IIP3) is 2 dBm at 40 GHz. The DC power dissipation of the whole circuit is as low as 5.3 mW. The chip occupies an area of 0.58*0.48 mm2 _{including all pads.}