| 用改进的查表法实现高速模运算电路 |
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| 引用本文： | 许俊.用改进的查表法实现高速模运算电路[J].微电子学与计算机,2004,21(10):179-181,185. |
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| 作者姓名： | 许俊 |
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| 作者单位： | 中兴通讯股份有限公司康讯研究所IC系统部,广东,深圳,518057 |
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| 摘 要： | 阐述了一种改进的查表法来实现高速模运算电路，可以比普通的查表法节省大量的资源，同时又比阵列除法器快速。给出一个使用改进查表法实现除数为常数的快速模运算电路的设计实例，并且给出详细的数学推导过程，最后讨论改进查表法的适用范围和扩展使用，该设计已经通过FPGA验证。
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| 关 键 词： | 改进查表法 模运算 除法 阵列除法器 |
| 文章编号： | 1000-7180(2004)10-179-03 |
Implementation High-Speed Modular Arithmetic Circuit with Improved Look-up Table |
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| XU Jun.Implementation High-Speed Modular Arithmetic Circuit with Improved Look-up Table[J].Microelectronics & Computer,2004,21(10):179-181,185. |
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| Authors: | XU Jun |
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| Abstract: | This paper introduce a brand new improved method of look-up table to implement high-speed Modular Arithmetic. This look-up table method can save a lot of logic resources comparing to conventional method and has higher performance than array division circuit. This paper gives an example of design and demostrates calculation procedure of this arithmetic. Besides, the application limitation and extended application are discussed at the end. |
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| Keywords: | Improved look-up table method Modular arithmetic Division Array division circuit |
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