| GaN功率MMIC背面通孔工艺优化及可靠性分析 |
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| 引用本文： | 刘海琪,王泉慧,焦刚,任春江,陈堂胜.GaN功率MMIC背面通孔工艺优化及可靠性分析[J].固体电子学研究与进展,2011,31(5). |
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| 作者姓名： | 刘海琪 王泉慧 焦刚 任春江 陈堂胜 |
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| 作者单位： | 南京电子器件研究所,南京,210016 |
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| 摘 要： | 介绍了改进GaN功率MMIC背面通孔工艺的相关方法,并对通孔进行了可靠性方面的测试与分析。通过优化机械研磨的方法,减薄圆片至75μm左右,保持片内不均匀性在4%以内;利用ICP对基于SiC衬底的GaN功率MMIC进行了背面通孔工艺的优化,减少了孔底的柱状生成物。随后的可靠性测试测得圆片通孔的平均电阻值为6.3 mΩ,平均电感值为17.2 nH;对通孔样品在0.4 A工作电流175°C节温下进行了工作寿命试验,200 h后通孔特性无明显退化。
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| 关 键 词： | 背面通孔 氮化镓/碳化硅 ICP刻蚀 可靠性 |
Via-hole Etch Process Optimization and Reliability Analysis for GaN Power MMIC |
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| LIU Haiqi,WANG Quanhui,JIAO Gang,REN Chunjiang,CHEN Tangsheng.Via-hole Etch Process Optimization and Reliability Analysis for GaN Power MMIC[J].Research & Progress of Solid State Electronics,2011,31(5). |
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| Authors: | LIU Haiqi WANG Quanhui JIAO Gang REN Chunjiang CHEN Tangsheng |
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| Affiliation: | LIU Haiqi WANG Quanhui JIAO Gang REN Chunjiang CHEN Tangsheng(Nanjing Electronic Devices Institute,Nanjing,210016,CHN) |
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| Abstract: | The method of improving via-hole process was for GaN power MMIC presented.Experiments were carried out to evaluate the reliability of the process.The wafer was thinned to 75 μm with nonuniformity under 4% within a wafer.The via-hole process was optimized by inductively coupled plasma(ICP) technology to decrease pillars.The reliability test showed an average resistance of 6.3 mΩ and an average inductance of 17.2 nH;Life test carried out on the via-hole sample with 0.4 A operating current and 175°C junction temperature showed no obvious change in via-hole character after 200 hours operation. |
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| Keywords: | via-hole GaN/SiC ICP etch reliability |
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