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FPGA在STM-4净荷误码测试系统中应用
引用本文:陈丹丹,李铮,刘兴春,姚大义.FPGA在STM-4净荷误码测试系统中应用[J].电子测量技术,2003(6):12-13.
作者姓名:陈丹丹  李铮  刘兴春  姚大义
作者单位:北京航空航天大学
摘    要:文中介绍FlPGA在SDH STM-4净荷误码测试仪器中的应用。该FPGA设计主要包括净荷发送和接收校验两部分,设计中采用一种并行产生伪随机序列的方法。

关 键 词:FPGA  SDH  STM-4  净荷  误码  伪随机序列

The Design of FPGA in a SDH STM-4 Error Test Set
Chen Dandan Li Zheng Liu Xingchun Yao Dayi.The Design of FPGA in a SDH STM-4 Error Test Set[J].Electronic Measurement Technology,2003(6):12-13.
Authors:Chen Dandan Li Zheng Liu Xingchun Yao Dayi
Affiliation:Chen Dandan Li Zheng Liu Xingchun Yao Dayi
Abstract:In this paper, the design of FPGA in a SDH. STM - 4 Error Test Set is introduced. The Transmitting Payload module and the Receiving Payload module are the focus of the design, in which a new way, generating parallel Pseudo-random pattern, is employed.
Keywords:SDH STM-4 payload FPGA error
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