| 电子式互感器合并单元同步时钟模块的设计 |
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| 引用本文： | 段雄英,廖敏夫,张春鹏,黄智宇.电子式互感器合并单元同步时钟模块的设计[J].低压电器,2011(15):23-28. |
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| 作者姓名： | 段雄英 廖敏夫 张春鹏 黄智宇 |
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| 作者单位： | 大连理工大学电气工程与应用电子技术系,辽宁大连,116024 |
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| 基金项目： | 辽宁省自然科学基金资助项目(20072182) |
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| 摘 要： | 利用全球定位系统（Global Positioning System,GPS）时钟信号和晶振时钟信号精度互补的特点,提出了一种利用GPS时钟同步晶振时钟的新方法。采用除法电路和余数分摊的策略进行误差校正,使采样脉冲均匀准确,进一步减小各合并单元提供的采样脉冲之间的同步误差,同时在GPS时钟丢失时能减小积累误差,保持更长时间的同步。软件仿真和硬件实验均证明此方法的有效性。
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| 关 键 词： | 电子式互感器 同步时钟 合并单元 可编程逻辑门阵列器件 误差校正 |
Design of Synchronous Clock Module of Merging Unit in Electronic Transducer |
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| DUAN Xiongying,LIAO Minfu,ZHANG Chunpeng,HUANG Zhiyu.Design of Synchronous Clock Module of Merging Unit in Electronic Transducer[J].Low Voltage Apparatus,2011(15):23-28. |
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| Authors: | DUAN Xiongying LIAO Minfu ZHANG Chunpeng HUANG Zhiyu |
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| Affiliation: | DUAN Xiongying,LIAO Minfu,ZHANG Chunpeng,HUANG Zhiyu(Department of Electric and Electronic Engineering,Dalian University of Technology,Dalian 116024,China) |
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| Abstract: | A new method to implement a highly accurate and stable clock was presented by synchronizing the crystal oscillator clock with GPS clock,which is based on the complement of the errors between GPS and crystal oscillator.Division circuit in hardware and residue apportion strategy were used to reduce the synchronous error between sampling pulses from different merging unit,which also makes the sampling pulses more well-proportioned and keep synchronization for longer time when the GPS input clock is lost.The si... |
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| Keywords: | electronic transducer synchronous clock merging unit field programmable gate array(FPGA) error calibration |
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