| 一种适用于DVB-T系统的新型FFT处理器设计 |
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| 引用本文： | 周加铳,陈咏恩.一种适用于DVB-T系统的新型FFT处理器设计[J].计算机工程与应用,2006,42(27):16-19. |
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| 作者姓名： | 周加铳 陈咏恩 |
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| 作者单位： | 同济大学通信软件及专用集成电路设计中心,上海,200092 |
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| 基金项目： | 上海市应用材料研究与发展基金 |
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| 摘 要： | 针对地面数字视频广播(DVB-T)系统中高速FFT处理器的设计要求,提出了一种新的基16/8混合基算法及其实现结构。采用单个基16/8复用的蝶形运算单元顺序处理,并通过减少乘法器数目,有效降低了硬件消耗;运算单元内部采用“基4+基4/2”级联流水线方式,大大加快了运算速度;此外,应用对称乒乓RAM结构提高了蝶算单元的连续运算能力;并且使用改进的块浮点防溢出机制,以保证运算精度。仿真和实现结果表明该设计具有良好的性能,完全满足实际应用要求。
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| 关 键 词： | 快速傅立叶变换 蝶形运算单元 流水线 对称乒乓RAM结构 防溢出 |
| 文章编号： | 1002-8331-（2006）27-0016-04 |
| 收稿时间： | 2006-08-01 |
| 修稿时间： | 2006-08-01 |
Design of a Novel FFT Processor for DVB-T System |
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| ZHOU Jia-chong,CHEN Yong-en.Design of a Novel FFT Processor for DVB-T System[J].Computer Engineering and Applications,2006,42(27):16-19. |
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| Authors: | ZHOU Jia-chong CHEN Yong-en |
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| Affiliation: | Design Center of Communication Software and ASIC,Tongji University,Shanghai 200092 |
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| Abstract: | A novel mixed radix-16/8 FFT algorithm and architecture are presented suitable for terrestrial digital video broadcasting(DVB-T) system.By using a single radix-16/8 butterfly processing element and reducing the number of multipliers,the proposed approach obtains significant hardware reduction.To achieve high speed processing,the "radix-4 radix-4/2" cascade pipeline architecture is designed in radix-16/8 butterfly unit.Furthermore,a symmetry ping-pang RAM structure is adopted to increase the continuous computing capability of the butterfly core.Computing precision is also enhanced through a modified block floating point anti-overflow scheme.Simulation and hardware implementation results show that the proposed method performs well and can meet the needs of the given application. |
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| Keywords: | Fast Fourier Transform butterfly processing element pipeline symmetry ping-pang RAM strueture antioverflow |
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