一种精确的分支预测微处理器模型

在当今深流水宽发射的微处理器中，为实现高性能，精确的分支预测是不可缺少的关键技术．分支预测失效将浪费大量的时钟周期，无法发挥乱序执行的效能．宽发射微处理器的有效性能同时还依赖指令窗口的大小和指令预取宽度．提出了一种新的更精确的支持分支预测和分支误预测周期损失的微处理器模型．根据指令的执行带宽为指令窗口中可用指令数的平方根统计规律，给出了一个更为精确的描述微处理器取指带宽、分支预测精度、分支误预测周期损失、指令窗口大小和IPC之间关系的算法，并讨论了这些参数的综合权衡以及这些参数对程序IPC的影响．由此可以确定依赖多个微处理器参数的取指带宽阈值和微处理器中几个关键参数的选取．

An Accurate Branch Prediction Microprocessor model

Accurate branch prediction is required to achieve high performance in deeply pipelined, wide issue processors Mispredictions waste large numbers of cycles and inhibit out of order execution The effective performance of wide issue processors also depends on instruction window size and instruction fetch bandwidth In this paper, a new more accurate microprocessor model with branch prediction rate and misprediction penalty is presented It is derived from this model that the execution bandwidth requirement increases with the square root of the available number of instructions in the instruction window, and the relations between some of these parameters are explored The tradeoffs among instruction fetch bandwidth, mispredictions penalty, instruction window size, and branch prediction accuracy are discussed The impact of these parameters on instructions per clock is described Thus, the threshold fetch bandwidth, which depends on many processor parameters, and the selection of the parameters can be determined