25%小偏置碰撞策略及测试评估研究

随着汽车事故的增加,且小重叠碰撞事故死亡率居高不下,小偏置碰撞试验逐渐成为焦点。基于IIHS公布的最新车辆碰撞试验结果,统计超过100余款不同类型的25%小偏置碰撞车辆,建立碰撞转角与碰撞区域的数学模型,将25%小偏置碰撞归结为三种不同的碰撞策略,分别是吸能策略、掠过策略和掠过与吸能策略;并进行试验验证,对三种策略的优缺点进行分析。结果表明,小偏置碰撞试验可运用合理的碰撞策略达到法规要求,对25%小偏置碰撞试验具有一定的参考价值。     

直角坐标在软件开发中的应用研究

为简化不同软件开发技术处理界面中组件关系的算法,增强使用数学模型解决软件开发中算法设计的能力,全面分析和总结直角坐标系在界面设计中的应用十分必要。通过对不同开发技术处理界面设计的分析,界面中组件位置关系实质上都可以转化为坐标关系的计算。本文列举了直角坐标系在Python编程、Android编程、Java编程和Unity编程中的应用,以期给相应的算法设计提供借鉴思路。     

基于残差决策的自动飞行控制系统远程实时故障诊断

针对自动飞行控制系统结构复杂、关联部件众多,发生故障时诊断时间长,从而影响飞机运行效率的问题,提出一种基于飞机通信寻址报告系统(ACARS)的远程实时故障诊断方案。首先,分析自动飞行控制系统的故障特点,设计搭建检测滤波器;然后,利用ACARS数据链实时发送的自动飞行控制系统的关键信息进行相关部件的残差计算,并根据残差决策算法进行故障诊断及定位;最后,针对不同故障部件残差间的差异大、决策门限无法统一的缺点,提出基于二次差值的残差决策改进算法,减缓了检测对象的整体变化趋势,降低了随机噪声和干扰的影响,避免了将瞬态故障诊断为系统故障的情况。实验仿真结果表明,基于二次差值的改进残差决策算法避免了多决策门限的复杂性,在采样时间为0.1 s的情况下,故障检测所需时间大约为2 s,故障检测时间大幅降低,有效故障检测率大于90%。     

一种北斗联合低轨星座的导航增强方法研究

单纯依靠北斗导航系统提供定位导航授时服务,存在卫星信号落地功率低、易受遮蔽和阻断的不足。针对此问题,研究了一种北斗联合低轨星座实现导航增强的系统架构;提出了一种新的适应严重遮蔽或干扰条件下,基于到达时间(TOA)和到达频率(FOA)联合观测的定位解算算法;对高中低轨混合星座条件下的覆盖特性和精度衰减因子进行了仿真分析。分析结果表明,用户可见星数平均增加了64.2%,位置精度衰减因子(PDOP)平均改善了28.7%。研究结果可为下一代北斗的论证设计与研制建设提供参考借鉴。     

A probabilistic load shedding concept considering highly volatile local generation

Automatic load shedding is the ultimate countermeasure against imbalance in a power system and can effectively help preventing large blackouts. Taking into account a high penetration of renewable energy sources (RES) in the distribution grid, a clear distinction between load and generation at the PCC becomes increasingly more difficult. For that reason an adaptation of frequency relay parameters and their locations of installation are necessary. In Europe this is rest on a multi-step plan based on values such as the yearly peak load. In this paper a novel probabilistic method for automatic load shedding is presented that uses the average values instead of peak values for load shedding. Its applicability is verified by a dynamic power system model that was developed to compare the classical and novel probabilistic load shedding principle. The method is verified using data from a German TSO.     

Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology

1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm² is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm² array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall V_min of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances.     

沥青混合料的使用性能与试验方法分析

沥青混合料的使用性能与试验方法对保证和提高沥青路面的修建质量非常重要。在使用荷载、自然因素对沥青路面作用分析的基础上,对沥青混合料的温度稳定性、耐久性、抗滑性及施工的和易性等方面进行了系统的分析探讨,提出了相关的性能要求与试验评价方法。     

智能化中高压变频器实载试验平台的实现

中、高压变频器产量越来越多，但试验手段大多比较落后，一般采用带电机空转的方法。本文介绍了一个高压变频器试验平台，通过该平台可以对电压等级在3kV～10kV、功率在5000kW以下的变频器进行实载试验。     

嵌人式与独立存储器设计上的差异分析和研究

进入21世纪,随着集成电路的发展,SoC(System on Chip)片上系统应运而生。而作为SoC重要组成部分的嵌入式存储器,在SoC中所占的比重正逐步增加,并起着越来越重要的作用,那么嵌入式存储器与独立的存储器芯片在设计上存在着哪些差异?对此本文将以NOR型闪存为例在制造工艺的选取、衍生产品的设计、功耗与噪声、后端功能仿真、测试与修复等方面进行分析和研究。