用于电弧检测的电力专用SoC设计

针对传统的电弧电路故障检测结果不准确的问题,设计用于电弧检测的SoC系统,并且在55nm工艺下进行流片验证。采用包含两种结构的模数转换器的片上电压源,设计了锁相环以及复位电路,精度最高可达8.67 bit。验证结果表明,本设计可提高电弧检测的准确性。     

A Voltage Control Method for a Distributed Line Feeder by means of Multiagent Approach

This paper proposes a method for the coordinated control of power factor by means of a multiagent approach. The proposed multiagent system consists of two types of agent: single feeder agent (F_AG) and bus agent (B_AG). In the proposed system, an F_AG plays as an important role, which decides the power factors of all distributed generators by executing the load flow calculations repeatedly. The voltage control strategies are implemented as the class definition of Java into the system. In order to verify the performance of the proposed method, it has been applied to a typical distribution model system. The simulation results show that the system is able to control very violent fluctuation of the demands and the photovoltaic (PV) generations.     

一种新型回路电阻测试仪的研究与设计

针对传统低压回路电阻测试仪只能在被测设备停电时使用的一大限制,本文提出并设计了一种新型低压回路电阻测试仪。该仪器可在低压设备运行状态下对其回路电阻进行测量,在保证测量精度的前提下减少了设备停电率,大大提高了工作效率。     

Integrated circuit and system design for renewable energy inverters

This study proposes that a novel integrated circuit (IC) and system design for renewable energy inverters can harvest renewable energy to power direct current (DC) and alternating current (AC) loads. In addition, an intelligent synthesis and management tool is developed to design the proposed system and to judge the system’s operational maintenance decisions. Finally, a renewable energy inverter’s information is posted to an online system. Users can obtain the proposed system’s information at any time and place. The accurate and superior performance of the proposed IC and system is confirmed by computer simulations and experimental results.     

面向航空通信应用的边沿触发器教学设计

研究和分析了面向航空通信应用的边沿触发器教学设计。以边沿触发电路实现原理为核心,引导边沿触发机制的探究式学习；以航空机载网络通信为具体应用背景,引入科学研究和工程实现中实际问题,设计曼切斯特码检测系统实验；使得边沿触发器教学成为“知识再创造”的过程和创新实践的新载体,以期培养新工科背景下的独立、创新和实践精神。     

A practical Equivalent Electrical Circuit model for Proton Exchange Membrane Fuel Cell (PEMFC) systems

An alternative Equivalent Electrical Circuit for Proton Exchange Membrane Fuel Cells is modelled in this study. Both I–V characteristics and H₂ consumptions corresponding to generated power under load and no-load conditions are investigated. For this purpose, H₂ consumptions and I–V characteristics of three different sized PEMFCs are tested. There is a very good harmony between the model results and measured values (relative error %0.7, %6.4 and %2.5 for FC-A, FC-B and FC-C respectively). In the proposed model current passes only on parallel resistance and not on serial resistance at no-load condition. Thus, a FC with higher parallel resistance should be preferred. Another key output of this study is that based on the proposed model, performance comparison of FCs can be performed with the parameters defined in this work. Proposals made in this study can easily be used for performance analysis of FCs under for both steady state and transient analysis.     

Study of planar structure applying reciprocity technique combined with MGEC and analysis of discontinuity

The 3D structure electromagnetic computation presents several difficulties related to the volume mesh. In fact, the entire volume space must be taken into account even the smallest details. In this article, we propose a formulation based on the reciprocity theorem combined with the generalized equivalent circuit method to model a planar 3D structure with both coaxial and planar excitation. The major advantage of this formulation is the fact to reduce the computational volume into 2D ones in the discontinuity plane. In addition, we focused on the calculation of the discontinuity between the excitation source and the planar structure to determine the exact behavior of the electric coaxial excitation model. The obtained current density, electric field distributions, and the input impedance are presented and discussed in the following sections. An approximately good agreement of input impedance with those obtained by the simulator and measurement is shown.     

基于关键路径延时检测的自适应电压缩减技术

为了减小传统的最差情况设计方法引入的电压裕量,提出了一种变化可知的自适应电压缩减(AVS)技术,通过调整电源电压来降低电路功耗.自适应电压缩减技术基于检测关键路径的延时变化,基于此设计了一款预错误原位延时检测电路,可以检测关键路径延时并输出预错误信号,进而控制单元可根据反馈回的预错误信号的个数调整系统电压.本芯片采用SMIC180 nm工艺设计验证,仿真分析表明,采用自适应电压缩减技术后,4个目标验证电路分别节省功耗12.4％,11.3％,10.4％和11.6％.     

Design and performance study of phase‐locked loop using fractional‐order loop filter

The present work reports the realization of an analog fractional‐order phase‐locked loop (FPLL) using a fractional capacitor. The expressions for bandwidth, capture range, and lock range of the FPLL have been derived analytically and then compared with the experimental observations using LM565 IC. It has been observed that bandwidth and capture range can be extended by using FPLL. It has also been found that FPLL can provide faster response and lower phase error at the time of switching compared to its integer‐order counterpart. Copyright © 2014 John Wiley & Sons, Ltd.     

High-voltage and low specific on-resistance power UMOSFET using P and N type columns

For the first time, we present the unique features exhibited by power 4H–SiC UMOSFET in which N and P type columns (NPC) in the drift region are incorporated to improve the breakdown voltage, the specific on-resistance, and the total lateral cell pitch. The P-type column creates a potential barrier in the drift region of the proposed structure for increasing the breakdown voltage and the N-type column reduces the specific on-resistance. Also, the JFET effects reduce and so the total lateral cell pitch will decrease. In the NPC-UMOSFET, the electric field crowding reduces due to the created potential barrier by the NPC regions and causes more uniform electric field distribution in the structure. Using two dimensional simulations, the breakdown voltage and the specific on-resistance of the proposed structure are investigated for the columns parameters in comparison with a conventional UMOSFET (C-UMOSFET) and an accumulation layer UMOSFET (AL-UMOSFET) structures. For the NPC-UMOSFET with 10 µm drift region length the maximum breakdown voltage of 1274 V is obtained, while at the same drift region length, the maximum breakdown voltages of the C-UMOSFET and the AL-UMOSFET structures are 534 and 703 V, respectively. Moreover, the proposed structure exhibits a superior specific on-resistance (R_on,sp) of 2 mΩ cm², which shows that the on-resistance of the optimized NPC-UMOSFET are decreased by 56% and 58% in comparison with the C-UMOSFET and the AL-UMOSFET, respectively.