用于原边反馈反激变换器的自适应启动电路

提出了一种用于原边反馈反激变换器的自适应启动电路。分析了原边反馈反激变换器DCM启动对系统的影响。将辅助绕组的膝点电压采样与原边电感的峰值电流采样相结合,逐周期地判定系统动态输出电压对变压器的退磁能力,实现了原边反馈反激变换器全周期下DCM自适应启动。基于0.18 μm BCD工艺,对该启动电路进行仿真。结果表明,在开关频率为100 kHz、输出功率为30 W的条件下,系统实现了DCM启动。在重载、轻载的条件下,启动时间分别为68 ms和6 ms。     

一种PFM控制模式高效反激转换器的设计

设计了一种不连续导通模式(DCM)下高效反激式转换器的控制方案。该方案通过电压检测(VS)端电感检测功率MOS管的导通状态,通过控制电路对VS信号进行采样和保持,采样值输入至降频电路产生降频电流,降低振荡器的工作频率,从而减少功率MOS管的开关损耗,提高转换器的工作效率。在不同的输出负载下,VS的采样值产生不同大小的降频电流不同程度降低振荡器的工作频率,实现对系统的脉冲频率调制和脉冲宽度调制的结合控制。本电路采用0.5μm BiCMOS工艺,利用Hspice和Cadence软件对设计的电路进行仿真。仿真结果表明,转换器的效率高达86%,在0.1 A轻载情况下效率也达到了72.1%,较高的工作效率满足设计要求。     

一种新颖的PFC控制策略

分析设计了一款新颖的功率因数校正(PFC)电路,该电路可以工作于不连续传导模式(DCM)和临界连续传导模式(CRM),并实现两种模式的自动切换,兼具两种工作模式的优势。在输入电压跨零附近,电路工作于固定频率的DCM下,限制最大的开关频率,从而降低污染系统的电磁干扰(EMI)噪声。在输入电压峰值附近,电路工作于频率可变的CRM下,降低升压二极管、功率MOSFET和电感上的电流应力,从而降低费用并且提高电路的可靠性。采用台联电0.6μmBCD工艺仿真验证,得到了近1的功率因数。     

基于DCM模式的高压输出反激变换器

设计了一种工作在不连续导电模式(DCM)下的高压输出反激变换器.详细分析了工作在连续导电模式(CCM)和DCM的反激变换器稳态输出/输入传递函数,比较了这两种模式在不同负载条件下的电压输出能力.在理论分析的基础上得出:在一定的负载条件下,工作在DCM状态的反激变换器比工作在CCM状态下的反激变换器更适合高压输出电路.在试验电路上对这一结论进行了验证.     

用于降压型DC-DC转换器的新颖过零检测电路

针对降压型DC-DC转换器需要工作在电感电流不连续导通模式(DCM)下的场合,设计了一个输出电压自适应的过零检测方案。该方案通过采集输出电压信息来调整检测到电感零电流后的响应时间,使其在输出电压很大时倒灌电流仍然很小。采用0.5μm BCD工艺,在8V输出电压下进行芯片级仿真,结果显示,与传统过零检测电路相比,新电路的倒灌电流减小了66%。     

一种高效压电能量收集与管理电路

根据压电元件的特性提出一种压电能量收集与管理电路。它包括一个基于电感的并联同步开关收集电路( P-SSHI )、一个控制电路和一个DC-DC电路。该P-SSHI电路只需要两个开关,仿真的结果显示其收集的能量相比传统的AC-DC电路提高5倍以上;DC-DC电路工作在电流断续模式下(DCM),这有利于降低功耗,提高轻载效率,且仿真结果的输出电压为3.3 V,电压精度为0.02%。这种压电能量收集与管理电路能够为微功率设备提供稳压。     

一种用于同步Buck变换器的自适应反流检测电路

提出了一种用于同步整流Buck电路的自适应反流检测(AZCD)电路,能够有效限制Buck变换器在DCM模式下出现电感电流的倒灌现象,以实现低EMI和高能效。与传统反流检测电路不同,该电路能够在Buck变换器输出电压变化的情况下保证功率下管的关断准确性。在0.35 μm BCD工艺下,对该电路进行仿真验证。结果表明,在1 MHz开关频率、输出电压从1.5 V变化到3.5 V的情况下,Buck变换器中功率下管的关断误差可以控制在1 ns以内。此外,在负载电流从12.5 mA变化到50 mA的情况下,该AZCD电路可以使Buck变换器效率提升约1%。     

一种滞环恒流LED驱动电路的电流采样电路

针对滞环恒流大功率LED驱动芯片,提出一款高性能电流采样电路。该电路采用高压工艺,可承受最高达40 V的输入电压。通过分析滞环控制的特点,采用串联电阻采样技术,结合匹配电流源结构,在保证响应速度和采样精度的同时,降低了电路的复杂度。电路中加入输入电压补偿电路,进一步提高了恒流控制的精度。在Cadence下的仿真结果表明,电路可在800 kHz的频率下正常工作,采样精度达99.78%;当电压从15 V变化至35 V时平均负载电流误差为0.81%;输出电压范围为0~5 V。     

无源LC压力传感器的定频读取电路

研究了基于定频模式的无源LC压力传感器的信号读取方法和电路。根据互感耦合电路原理,对基于定频模式的信号读取技术进行了理论分析,并结合MATLAB软件仿真,得出在一定参数设置下,采用直接数字频率合成器(DDS)产生高频正弦电压信号以激励读取线圈,提取线圈端阻抗参数和采样电阻上的电压值,可以实现LC压力传感器信号的高灵敏度检测。理论分析和测试结果表明,该电路能够实现LC压力传感器变化信号的高灵敏度检测,为无线无源LC压力传感器在高温环境中的广泛应用提供了技术基础。     

FPGA芯片内数字时钟管理器的设计与实现

在FPGA芯片内,数字时钟管理器(DCM)不可或缺,DCM主要完成去时钟偏移、频率综合和相位调整的功能,其分别由延迟锁相环(DLL)、数字频率合成器(DFS)以及数字相移器(DPS)三个模块来实现。对这三个模块的原理及设计进行了详细地阐述,并给出了仿真结果,该DCM电路通过了0.13μm工艺流片。测试结果表明,在低频模式下,该DCM能工作在24～230 MHz之间;在高频模式下,该DCM能工作在48～450 MHz之间,其输入及输出抖动容忍度在低频模式下能达到300 ps,在高频模式下能达到150 ps。     

Design and research of an LED driving circuit with accurate proportional current sampling mode

An LED driving circuit in accurate proportional current sampling mode is designed and fabricated based on CSMC 0.5 μm standard CMOS technology. It realizes accurate sensing of sampling current variation with output driving current. A better constant output current characteristic is achieved by using an amplifier to clamp the drain voltage of both the sampling MOSFET and power MOSFET to the same value with feedback control. Small signal equivalent circuit analysis shows that the small signal output resistance in the accurate proportional current sampling mode circuit is much larger than that in a traditional proportional current sampling mode circuit, and circuit stability could be assured. Circuit simulation and chip testing results show that when the LED driving current is 350 mA and the power supply is 6 V with ±10% variation, the stability of the output constant current of the accurate proportional current sampling mode LED driving 1C will show 41% improvement over that of a traditional proportional current sampling mode LED driving IC.     

Characterization of single-stage three-phasepower-factor-correction circuit using modular single-phase PWM DC-to-DCconverters

The complete DC characteristics of three-phase modular power-factor-correction (PFC) converters using single-phase pulsewidth modulation (PWM) DC-to-DC converter modules for high-power applications are studied. Using circuit averaging, the converter input and output quantities are determined numerically. Both the continuous and discontinuous output current modes of operation (CCM and DCM) are studied in detail. Near-unity power factor can be achieved with the converter modules operating in the DCM. An averaged model was used to study and determine the boundaries between DCM and CCM over the full period of the three-phase input voltage. It is found that high power factor is inherent in the converter system provided that the converters are operated in the DCM and the voltage conversion ratio is selected properly. The criteria for obtaining high power factor are analyzed and the optimal circuit parameters are determined to obtain the best achievable power factor. Both simulations and experimental results from a 1.5-kW prototype using full-bridge converter modules have confirmed the analysis     

一种同步整流DC-DC转换器PWM控制电路设计

设计了一种改进的PWM控制电路,将电流采样电路和PWM比较器归结为一个PWM电流比较器,减少了电路规模。将误差放大器输出与锯齿波斜坡补偿信号叠加,产生叠加输出电流,并通过PWM电流比较器输出一个占空比信号,以控制功率管的通断。电压信号转换为电流信号,从而使控制回路反应速度更快。将PWM控制电路应用于一款BUCK型DC-DC同步整流开关电源稳压器中。HSPICE仿真表明,稳压器输出纹波电压为±4mV,输出电压精度为±1%。     

一种Boost型PFC电路在DCM下的恒频控制方案

通过对Boost型变换器在不连续导电模式DCM(Discontinued Conduction Mode)下平均电感电流的分析,得到了在恒 频状态下实现功率因数校正 PFC ( Power Factor Correction)时,功率开关管所需的开启时间与输入、输出电压之间的数学关系,并结合实际电路设计,提出了一种PF...     

一种适用于低ESR应用的高精度RBCOT环路

提出了一种适用于低ESR电容、具有快速瞬态响应和高输出精度的纹波控制COT(RBCOT)实现电路,并利用改进的等效三端开关模型,对包含分压网络的控制环路进行了精确的小信号建模。该环路在保持快速瞬态响应能力的同时,利用SW点的1阶滤波信号来产生虚拟电感电流纹波,避免了次谐波振荡现象。通过谷值采样电路,对滤波信号的谷值进行采样。采样电路在每个开关周期执行刷新操作,并在上电和瞬态变化阶段进行加速充电。纹波叠加电路将增强纹波和谷值采样信号精确地叠加到反馈电压端,保证电路输出精度较高。采用0.35μm 18 V BCD工艺,对纹波控制COT控制环路进行仿真。结果表明,在4.5~18 V输入电压范围内,输出电压的失调在1 mV范围以内,控制环路可以对瞬态变化进行快速调整。     

一种新颖的航空直流电源抗浪涌电路

针对28V航空直流电源系统中的过压浪涌和欠压浪涌,设计了一种双管Buck-Boost电路。该电路由Buck变换器和Boost变换器级联简化而成,对此电路设计了控制方法,使电路工作在降压、升压和LC滤波模式,能有效地抑制过压浪涌和对欠压进行提升,而且对额定输入时的效率影响较小。从对电路性能影响方面,阐述了输出电压设定值的选取。传统的航空直流电源抗浪涌电路,结构较复杂、效率低,对额定输入时的效率影响也较大,而且以往的文献和产品较少涉及对欠压浪涌的处理。设计了一台300W的原理样机,通过实验验证了电路和设计的控制方法能有效地抵抗航空直流电源中的浪涌,并使电路取得了较高的效率。     

用于反熔丝FPGA的多标准IO接口电路

针对高可靠性领域和复杂环境对大规模反熔丝FPGA器件的迫切需求,设计了一种新的用于反熔丝FPGA的可动态配置IO接口电路。该IO接口电路具有宽的输入输出电压范围,能实现多驱动调节,支持一系列不同电平模式。通过对反熔丝单元进行编程配置,该IO接口电路可兼容多种IO标准,内核电压为2.5 V,端口电压可在3.3 V与5 V之间转换。仿真与测试结果表明,该IO接口电路满足设计要求,接口速度优于国外同类产品。     

Averaged modeling of PWM converters operating in discontinuousconduction mode

Various aspects of averaged modeling of hard-switching pulse-width modulated (PWM) converters operating in the discontinuous conduction mode (DCM) are studied. A more streamlined modeling procedure is proposed which serves as a general framework for comparing different models. A duty ratio constraint that defines the diode conduction interval is identified to be the key to accurate prediction of high-frequency behavior. A new duty-ratio constraint is proposed that leads to full-order averaged models of DCM converters. Numerical analyses and experimental measurements confirm that the new models correctly predict the small-signal responses up to one third of the switching frequency and are more accurate than all previous models. Moreover, new analytical results are included to show the origin of the high-frequency pole in DCM operation and to explain why the full-order model is capable of accurately predicting it. Averaged circuit counterparts of the new models are developed in the form of averaged switch models to facilitate circuit simulation     

State-space models and order reduction for DC-DC switchingconverters in discontinuous modes

The state-space modeling and related order reduction problems of switching DC-DC converters operating in discontinuous (D) mode are treated in this paper. A unified discrete-time full-order model is proposed assuming the discontinuous current and voltage mode (DCVM) as a general operation mode from which the discontinuous current mode (DCM), the discontinuous voltage mode (DVM), and continuous made (CM) derive as special cases. Such a model permits a straightforward study of the control-to-output response, in each operation mode. The order reduction of the transfer function is carried out by means of the principal component analysis considering the joint controllability and observability properties of the circuit. It is shown that a proper order reduction can be gained not only in DC mode, as expected, but also in DV and DCV modes. A substantial difference between DC and DV modes is also evidenced in terms of controllability. The frequency analysis and state-space model order reduction for a Cuk converter are proposed to show that the method is free of the limitations affecting other methods of analysis and that its predictions fit experimental measurements