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1.
A simple analytical expression of the 2-D potential distribution along the channel of silicon symmetrical double-gate (DG) MOSFETs in weak inversion is derived. The analytical solution of the potential distribution is compared with the numerical solution of the 2-D Poisson's equation in terms of the channel length L, the silicon thickness t Si, and the gate oxide thickness t OX. The obtained results show that the analytical solution describes, with good accuracy, the potential distribution along the channel at different positions from the gate interfaces for well-designed devices when the ratio of L/t Si is ges 2-3. Based on the 2-D extra potential induced in the silicon film due to short-channel effects (SCEs), a semi-analytical expression for the subthreshold drain current of short-channel devices is derived. From the obtained subthreshold characteristics, the extracted device parameters of the subthreshold slope, drain-induced barrier lowering, and threshold voltage are discussed. Application of the proposed model to devices with silicon replaced by germanium demonstrates that the germanium DG MOSFETs are more prone to SCEs.  相似文献   

2.
A 2-D analytical solution for SCEs in DG MOSFETs   总被引:3,自引:0,他引:3  
A two-dimensional (2-D) analytical solution of electrostatic potential is derived for undoped (or lightly doped) double-gate (DG) MOSFETs in the subthreshold region by solving Poissons equation in a 2-D boundary value problem. It is shown that the subthreshold current, short-channel threshold voltage rolloff and subthreshold slope predicted by the analytical solution are in close agreement with 2-D numerical simulation results for both symmetric and asymmetric DG MOSFETs without the need of any fitting parameters. The analytical model not only provides useful physics insight into short-channel effects, but also serves as basis for compact modeling of DG MOSFETs.  相似文献   

3.
We have developed analytical physically based models for the threshold voltage [including the drain-induced barrier lowering (DIBL) effect] and the subthreshold swing of undoped symmetrical double-gate (DG) MOSFETs. The models are derived from an analytical solution of the 2-D Poisson equation in which the electron concentration was included. The models for DIBL, subthreshold swing, and threshold voltage roll-off have been verified by comparison with 2-D numerical simulations for different values of channel length, channel thickness, and drain-source voltage; very good agreement with the numerical simulations has been observed  相似文献   

4.
A 2D model for the potential distribution in silicon film is derived for a symmetrical double gate MOSFET in weak inversion. This 2D potential distribution model is used to analytically derive an expression for the subthreshold slope and threshold voltage. A drain current model for lightly doped symmetrical DG MOSFETs is then presented by considering weak and strong inversion regions including short channel effects, series source to drain resistance and channel length modulation parameters. These derived models are compared with the simulation results of the SILVACO (Atlas) tool for different channel lengths and silicon film thicknesses. Lastly, the effect of the fixed oxide charge on the drain current model has been studied through simulation. It is observed that the obtained analytical models of symmetrical double gate MOSFETs are in good agreement with the simulated results for a channel length to silicon film thickness ratio greater than or equal to 2.  相似文献   

5.
Design considerations of the FinFET have been investigated by three-dimensional (3-D) simulation and analytical modeling in this paper. Short-channel effects (SCE) of the FinFET can be reasonably controlled by reducing either silicon fin height or fin thickness. Analytical solution of 3-D Laplace's equation is employed to establish the design equations for the subthreshold behavior in the fully depleted silicon fins. Based on the 3-D analytical electrostatic potential in the subthreshold region, the threshold voltage (V/sub th/) roll-off and the subthreshold swing (S) are estimated by considering the source barrier changes in the most leaky channel path. V/sub th/ roll-off is an exponential function of the ratio of effective channel length to drain potential decay length, which can then be expressed as a function of the fin thickness, the fin height and the gate oxide thickness. The drain-potential decay lengths of single-gate fully depleted SOI MOSFET (FDFET), double-gate MOSFET (DGFET), rectangular surrounding-gate MOSFET (SGFET), and FinFET are compared. The drain potential scaling length and V/sub th/ roll-off can be included into a universal relation for convenient comparison.  相似文献   

6.
As the channel length rapidly shrinks down to the nanoscale regime, the multiple gate MOSFETs structures have been considered as potential candidates for a CMOS device scaling due to its good short-channel-effects (SCEs) immunity. Therefore, in this work we investigate the scaling capability of Double Gate (DG) and Gate All Around (GAA) MOSFETs using an analytical analysis of the two dimensional Poisson equation in which the hot-carrier induced interface charge effects have been considered. Basing on this analysis, we have found that the degradation becomes more important when the channel length gets shorter, and the minimum surface potential position is affected by the hot-carrier induced localized interface charge density. Using this analysis, we have studied the scaling limits of DG and GAA MOSFETs and compared their performances including the hot-carrier effects. Our obtained results showed that the analytical analysis is in close agreement with the 2-D numerical simulation over a wide range of devices parameters. The proposed analytical approach may provide a theoretical basis and physical insights for multiple gate MOSFETs design including the hot-carrier degradation effects.  相似文献   

7.
An analytical subthreshold current model for pocket-implanted NMOSFETs   总被引:1,自引:0,他引:1  
An analytical subthreshold current model for metal oxide semiconductor field effect transistors (MOSFETs) with pocket implantation is presented. The model is developed based on considering an averaged localized pileup of channel dopants near the source and drain ends of channel to account for the pocket implantation effect and to derive the channel potential using a pseudo-two-dimensional (2-D) method. This, together with the conventional drift-diffusion theory, leads to the development of a subthreshold current model for pocket-implanted MOS devices. Model verification is carried out using data measured from a set of pocket-implanted NMOSFETs fabricated from a 0.17-/spl mu/m, DRAM process. Very good agreement is obtained between the model calculations and measurement results.  相似文献   

8.
An analytical subthreshold surface potential model for short-channel pocket-implanted (double-halo) MOSFET is presented. The effect of the depletion layers around the source and drain junctions on channel depletion layer depth, which is very important for short-channel devices, is included. Using this surface potential, a drift-diffusion based analytical subthreshold drain current model for short-channel pocket-implanted MOSFETs is also proposed. A physically-based empirical modification of the channel conduction layer thickness that was originally proposed for relatively long-channel conventional device is made for such short-channel double-halo devices. Very good agreement for both the surface potential and drain current is observed between the model calculation and the prediction made by the 2-D numerical device simulation using Dessis.  相似文献   

9.
An analytical approach for modeling the electrostatic potential in nanoscale undoped FinFETs is derived. This method uses a 2-D solution for this potential within a double-gate FET and takes into account the top gate electrode as the third dimension by applying the conformal mapping technique. Herewith, an analytical closed-form model for the height of the potential barrier below threshold is defined which includes 3-D effects. From that, models for subthreshold slope and threshold voltage of nanoscale triple-gate FETs are derived. The results are in good agreement with numerical device simulation results and measurements for channel lengths down to 20 nm.   相似文献   

10.
A physics-based compact subthreshold current model for short-channel nanoscale double-gate MOSFETs is presented. The potential is modeled using conformal mapping techniques in combination with parabolic approximations. For subthreshold conditions, we have assumed that the electrostatics is dominated by capacitive coupling between the body electrodes. Hence, the potential is obtained as an analytical solution of the 2-D Laplace equation. The current modeling is based on drift-diffusion theory. The modeling results are in good agreement with those of numerical simulations without the use of adjustable parameters.  相似文献   

11.
An analytical two-dimensional model for silicon MESFETs   总被引:1,自引:0,他引:1  
A model that predicts small-geometry effects in Si MESFETs has been developed. It is based on a two-dimensional (2-D) analytical solution of Poisson's equation in the subthreshold regime that applies to the junction-isolated structure typical of silicon devices. The model is in excellent agreement with numerical simulations from the PISCES 2-D device analysis program. The analytical model provides the physical basis for a subthreshold current model for small-geometry MESFETs. A scaling scheme for MESFETs, derived from the analytical model, that predicts a minimum-acceptable gate length of 0.15 μm for these devices is proposed  相似文献   

12.
辛艳辉  袁合才  辛洋 《电子学报》2018,46(11):2768-2772
基于泊松方程和边界条件,推导了对称三材料双栅应变硅金属氧化物半导体场效应晶体管(MOSFET:metal oxide semiconductor field effect transistor)的表面势解析解.利用扩散-漂移理论,在亚阈值区电流密度方程的基础上,提出了亚阈值电流与亚阈值斜率二维解析模型.分析了沟道长度、功函数差、弛豫SiGe层的Ge组份、栅介质层的介电常数、应变硅沟道层厚度、栅介质高k层厚度和沟道掺杂浓度等参数对亚阈值性能的影响,并对亚阈值性能改进进行了分析研究.研究结果为优化器件参数提供了有意义的指导.模型解析结果与DESSIS仿真结果吻合较好.  相似文献   

13.
Using an exact solution of two-dimensional Poisson’s equation in cylindrical coordinates,a new analytical model comprising electrostatic potential,electric field,threshold voltage and subthreshold current for halodoped surrounding-gate MOSFETs is developed.It is found that a new analytical model exhibits higher accuracy than that based on parabolic potential approximation when the thickness of the silicon channel is much larger than that of the oxide.It is also revealed that moderate halo doping concentration,thin gate oxide thickness and small silicon channel radius are needed to improve the threshold voltage characteristics.The derived analytical model agrees well with a three-dimensional numerical device simulator ISE.  相似文献   

14.
A model of subthreshold characteristics for both undoped and doped double-gate (DG) MOSFETs has been proposed. The models were developed based on solution of 2-D Poisson's equation using variable separation technique. Without any fitting parameters, our proposed models can exactly reflect the degraded subthreshold characteristics due to nanoscale channel length. Also, design parameters such as body thickness, gate oxide thickness and body doping concentrations can be directly reflected from our models. The models have been verified by comparing with device simulations' results and found very good agreement.  相似文献   

15.
Physics-based compact short-channel models of threshold voltage and subthreshold swing for undoped symmetric double-gate MOSFETs are presented, developed from analytical solutions of the two-dimensional Poisson equations in the channel region. These models accurately characterize the subthreshold and near-threshold regions of operation by appropriately including essential phenomena such as volume inversion and the dominance of mobile charges over fixed charges under threshold conditions. Explicit, analytical expressions are derived for a scale length, which results from an evanescent-mode analysis. These equations readily quantify the impact of silicon film thickness and gate oxide thickness on the minimum channel length and device characteristics and can be used as an efficient guideline for device designs. These newly developed models are exploited to make a comprehensive projection on the scaling limits of undoped double-gate MOSFETs. On the individual device level, model predictions indicate that the minimum channel length can be scaled beyond 10 nm for a turn-off behavior of S=100 mV/dec for a silicon film thickness below 5 nm and an electrical equivalent oxide thickness below 1 nm.  相似文献   

16.
In this paper, a three dimensional analytical solution of electrostatic potential is presented for undoped (or lightly doped) quadruple gate MOSFET by solving 3-D Poisson's equation. It is shown that the threshold voltage predicted by the analytical solution is in close agreement with TCAD 3-D numerical simulation results. For numerical simulation, self-consistent Schrodinger-Poisson equations, calibrated by 2D non equilibrium green function simulation, are used. This analytical model not only provides useful physics insight of effects of gate length and body width on the threshold voltage, but also serves as a basis for compact modeling of quadruple gate MOSFETs.  相似文献   

17.
Threshold-Voltage Modeling of Body-Tied FinFETs (Bulk FinFETs)   总被引:1,自引:0,他引:1  
The threshold voltages Vth of the body-tied double/triple-gate MOSFETs (bulk FinFETs) implemented on bulk silicon (Si) wafers were modeled systematically and compared with data obtained from 3-D device simulation. The threshold-voltage behaviors of the bulk FinFETs were modeled, for the first time, based on charge sharing. For the simplified Vth model, we considered not only short-channel effect (SCE) and narrow-width effect but also 3-D charge sharing at the corner. Only one fitting parameter is introduced to reflect the SCE in the fin body. The model predicted the Vth behavior with fin body thickness, body doping concentration, gate height, gate length, and corner shape of the fin body well. Our compact model makes an accurate prediction of Vth and shows good agreement with 3-D simulation data  相似文献   

18.
Three-dimensional analytical subthreshold models for bulk MOSFETs   总被引:1,自引:0,他引:1  
Three-dimensional device-physics-based analytical models are developed for subthreshold conduction in uniformly doped small geometry (i.e., simultaneously short channel and narrow width) bulk MOSFETs, for various isolation schemes. Inverse-narrow width effects, where the threshold voltage decreases with decreasing channel width, are predicted by the model for trench isolated MOSFETs. For LOGOS isolated MOSFETs, conventional narrow width effects, where the threshold voltage increases due to decreasing channel width, are predicted. The narrow width effects are found to be comparable to the short channel effects in the absence of significant applied drain biases. However, for larger drain biases, the short channel effects outweigh the narrow width effects due to the weaker potential perturbation at the device width edges compared to the drain end. Unlike the threshold voltage, the subthreshold swing of the device is found to increase with reduced device dimensions regardless of the isolation scheme since both conventional and inverse narrow width effects result in weaker control of the surface potential by the gate  相似文献   

19.
An analytical solution for the potential distribution of the two-dimensional Poisson's equation with the Dirichlet boundary conditions has been obtained for the MOSFET device by using Green's function method and a new transformation technique, in which the effects of source and drain junction curvature and depth are properly considered. Based on the calculated potential distribution, the subthreshold current considering the drain-induced barrier lowering effects has been computed by a simple current equation that considers only the diffusion component with an effective length determined by the potential distribution at the SiO2-Si interface. From the calculated subthreshold current, the threshold voltage of the MOSFET's is determined. It has been verified that the dependences of the calculated threshold voltage and subthreshold current on device channel length, drain, and substrate biases are in good agreement with those computed by whole two-dimensional numerical analysis and experimental data.  相似文献   

20.
This paper reported the sub-threshold behavior of long channel undoped surrounding-gate (SRG) MOSFETs with respect to body radius. Based on a rigorous channel potential model presented in this work, the ideal room temperature subthreshold slope of 60 mV/dec can only be achieved when the silicon body radius is smaller than a critical value. With larger silicon body radius, SRG MOSFETs display a dual subthreshold slope of 60 mV/dec and 120 mV/dec. Based on the complex subthreshold characteristics, a new definition of threshold voltage together with an extraction method is adopted to investigate threshold voltage characteristics of undoped SRG MOSFETs in this paper.  相似文献   

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