一种面向环境可配置嵌入式系统软件模型研究

嵌入式系统硬件资源是相对固定且有限,为了适应环境,就需要系统从软/硬件上可重构。基于此,提出了一种基于可配置构件面向环境的嵌入式系统模型。它能适应不同环境下,面向任务地对系统进行重构来完成使命。通过可重构缩小了系统成品体积,节省了硬件资源,提高了系统可重用性。该模型在某航空机载设备中得到实际应用,解决了由来已久的问题,提高了系统的灵活性和自适应性。     

基于无线网络的嵌入式机器人控制系统

随着网络的飞速发展,基于网络的机器人远程控制日益受到了人们的重视;同时以往的基于各类单片机的移动机器人已经不能满足当前机器人发展的需要.有鉴于此,本文提出基于嵌入式系统和无线网络的移动机器人的远程任务重构和远程实时控制解决方案.系统以ARM9嵌入式LINUX系统作为移动机器人主控器,其对下位运动控制器的精确运动控制通过串口通信实现,与远程PC机之间的无线通信通过LINUX系统下的SOCKET网络通信建立的嵌入式服务器实现.实验证明,基于网络的嵌入式控制系统在机器人中的应用大大提高了机器人的处理能力和通信能力,增强了机器人的智能性.     

一个面向仿真程序的任务聚类算法

对仿真程序原始任务图的聚类运算是实现仿真程序并行化的关键。在研制面向仿真程序自动并行化系统AFPS的过程中,提出了一个基于状态变量一阶微分的并行任务聚类算法。使用结果表明,该算法可以最大限度地保证各处理机结点的负载均衡,减少通信次数,且易于实现通信变量的自动确定。     

面向可重构系统的eCos拓展

针对可重构系统中任务模型灵活性差、硬件任务重构延时长、FPGA资源利用率低等问题,提出了将应用程序划分为软件任务和混合任务的划分模式,并在eCos的基础上,通过重构控制机制、混合任务管理机制、通信机制三方面的拓展,设计了支持可重构系统的嵌入式操作系统框架eCos4RC。仿真结果表明,eCos4RC实现了对混合任务的有效管理,在兼容eCos多线程机制的同时提高了应用程序执行速度和可重构资源利用率,为可重构计算平台提供了良好的运行环境支持。     

支持远程动态重构的嵌入式系统设计

为使嵌入式系统具备远程在线更新和维护能力,基于软/硬件统一多任务编程模型,应用互联网可重构逻辑设计方法设计并实现支持远程动态重构的嵌入式系统。提出的统一多任务编程模型为软/硬件任务提供统一接口和管理方式,可降低设计可重构系统的复杂度,同时远程重构功能增加了系统远程在线更新和维护的能力。实验结果表明,该模型可用于远程可重构系统的设计,同时硬件任务也具有较快的加速比。     

基于FPGA的可重构自修复嵌入式系统的设计与实现

目前,基于FPGA的可重构系统设计研究较多,可重构计算在当今新兴科技领域里被广泛的应用在高性能计算以及嵌入式系统中,但是在这个领域内对可重构操作系统和可重构系统自我修复方面的研究十分欠缺,为了更好的研究可重构嵌入式系统的操作系统支持性能,本文着重从软、硬件的支持和自我修复特性两大方面进行研究。     

基于权重可变免疫算法的动态可重构任务划分

基于FFGA的动态可重构系统能够在系统运行期间通过动态调整硬件资源来适应应用问题,从而满足嵌入式系统对性能、灵活性和成本越来越严格的要求.系统可动态加载配置文件的特点给系统软硬件任务的划分带来了新的问题.在充分考虑动态可重构系统特点的基础上,通过动态改变目标函数权重系数来适应可重构的变化,并运用于免疫算法对系统软硬件任务进行划分.实验结果表明,提出的划分方法除了能更贴近实际的系统外还具有较高的性能.     

一种基于可重构多FPGA 的任务调度与任务复制方法

在可重构多现场可编程逻辑门阵列（FPGA）系统中,任务调度是一个极其重要的研究方向。参照同构与异构计算领域的调度算法,结合可重构多FPGA计算模型的自身特点,在现有的调度算法的基础上,将任务复制方法引入到可重构多FPGA系统计算领域,如果任务余图最长路经上的父子节点不在同一FPGA上,通过寻找FPGA上的复制空间,提出的算法将父节点尽可能复制在子节点所在的FPGA上,减小了任务之间的通信开销。实验结果表明,对于任务调度有向无环图,提出方法的调度长度优于或等于前人方法的性能下界,而且,FPGA利用率有所提高。     

基于传感器网络的智能环境监控系统的实现

针对传统监控系统构架的弊端,提出了基于无线传感器网络的分布式智能环境监控系统的方案和实现。监控节点除了与中心节点通信外,各监控节点之间也可进行通信,并设计了通信协议,实现了无线传感器网络的路由算法—低功耗自适应聚类路由（LEACH）协议和门限敏感的高效能传感器网络（TEEN）协议。同时,在通信失效的情况下,监控节点能启动智能自处理机制,使异常情况的灾难损失达到最小。实验证明：本系统相比传统监控系统具有更好的灵活性与稳定性。     

面向实时嵌入式操作系统的进程机制

面向通信领域的嵌入式程序必须在资源受限的硬件环境中应对不断增加的通信业务,单纯依靠商用嵌入式操作系统的任务机制已不能提供足够的业务并行度和吞吐量。针对该问题,基于嵌入式操作系统任务机制提出一种更小粒度的进程解决方案,相对于任务对象,使用进程作为执行单元不仅内存资源占用少,且进程之间切换速度快,系统可以支持大量进程并行。该进程机制能够提供有效的系统监测和故障诊断手段,从而保证系统的健壮性。     

Real-time task scheduling and network device security for complex embedded systems based on deep learning networks

As a hotspot of machine learning research, deep learning is applied in many fields. Embedded systems are becoming more and more complex and networked, so the real-time performance of embedded systems and the security of network embedded devices face severe challenges. Based on this, this paper studies the real-time task scheduling problem for complex embedded systems and the security of embedded network devices. For real-time, this paper proposes a comprehensive task scheduling algorithm. Based on the task classification in the embedded system, different scheduling methods are adopted for different tasks, and the scheduling mode is flexibly changed as the system load changes. A dynamic integrity measurement model is established based on the star trust chain structure, and the hardware implementation mechanism of constructing dynamic trust chain in embedded system is studied. The dynamic reconfigurable hardware design method based on FPGA is applied to the construction of dynamic trust chain, and a verification system is designed to verify the dynamic measurement mechanism. This can solve the security problem of deep network embedded devices to a certain extent.     

基于CAN总线的可重构SHM系统设计

针对结构健康监测(SHM)系统现场节点功能固化,不便于机动配置及后期维护等问题,提出一种基于CAN总线的可重构SHM系统架构,设计节点功能重构、网络结构重构以及资源分配重构等技术。以功能适配接口及嵌入式操作系统的软硬件协同实现节点功能重构,以自组织特征映射网实现网络结构重构的优先级聚类,以基于组件对象模型的上位监控软件实现资源的按需分配。利用该方法设计的系统具有灵活、高效和一定自主性等特点。     

可重构资源管理及硬件任务布局的算法研究

可重构系统具有微处理器的灵活性和接近于ASIC的计算速度,可重构硬件的动态部分重构能力能够实现计算和重构操作的重叠,使系统能够动态地改变运行任务,可重构资源管理和硬件任务布局方法是提高可重构系统性能的关键.提出了基于任务上边界计算最大空闲矩形的算法(TT-KAMER),能够有效地管理系统的空闲可重构资源;在此基础上使用FF和启发式BF算法进行硬件任务的布局.实验表明,算法能够有效地实现在线资源分配与任务布局,获得较高的资源利用率.     

Real-time embedded systems powered by FPGA dynamic partial self-reconfiguration: a case study oriented to biometric recognition applications

This work aims to pave the way for an efficient open system architecture applied to embedded electronic applications to manage the processing of computationally complex algorithms at real-time and low-cost. The target is to define a standard architecture able to enhance the performance-cost trade-off delivered by other alternatives nowadays in the market like general-purpose multi-core processors. Our approach, sustained by hardware/software (HW/SW) co-design and run-time reconfigurable computing, is synthesizable in SRAM-based programmable logic. As proof-of-concept, a run-time partially reconfigurable field-programmable gate array (FPGA) is addressed to carry out a specific application of high-demanding computational power such as an automatic fingerprint authentication system (AFAS). Biometric personal recognition is a good example of compute-intensive algorithm composed of a series of image processing tasks executed in a sequential order. In our pioneer conception, these tasks are partitioned and synthesized first in a series of coprocessors that are then instantiated and executed multiplexed in time on a partially reconfigurable region of the FPGA. The implementation benchmark of the AFAS either as a pure software approach on a PC platform under a dual-core processor (Intel Core 2 Duo T5600 at 1.83 GHz) or as a reconfigurable FPGA co-design (identical algorithm partitioned in HW/SW tasks operating at 50 or 100 MHz on the second smallest device of the Xilinx Virtex-4 LX family) highlights a speed-up of one order of magnitude in favor of the FPGA alternative. These results let point out biometric recognition as a sensible killer application for run-time reconfigurable computing, mainly in terms of efficiently balancing computational power, functional flexibility and cost. Such features, reached through partial reconfiguration, are easily portable today to a broad range of embedded applications with identical system architecture.     

一种基于赋时Petri网和ZBDD的装配序列规划方法

机载航空电子系统设计采用综合化系统体系结构,可实现计算系统及其计算资源和计算设施的"物理集成";以及机载嵌入式软件系统的"功能集成";提供对系统计算功能的动态配置管理和实时动态冗余,以期得到较高的计算性能和保障系统的高可靠性。基于软件系统架构的层次关系研究了复杂嵌入式计算任务的运行模态表示方法,分析了嵌入式软件系统任务模态的迁移关系,提出了基于AADL软件体系结构的嵌入式软件模态划分方法,制定了系统动态重构蓝图,并设计了基于模态的嵌入式软件动态重构实施方法。基于软件架构的模态分析及其动态重构,有助于提高复杂嵌入式软件系统的可靠性、安全性和重用性。     

一种基于代价抢占的混合可重构任务调度算法*

针对同时存在独立任务和相依性任务的混合可重构任务调度,提出了基于代价抢占的混合可重构任务实时调度算法。提出了相依性任务等价运行截止时刻的计算方法,使混合可重构任务按照配置截止时刻排队配置。针对相依性任务调度特点,分析得到了相依性任务集合调度失败的充分条件,提前判定和丢弃无法调度成功的相依性任务集合;通过有限预配置防止相依性任务无效占用可重构资源;通过基于代价抢占减少调度失败任务个数。仿真结果表明,该调度算法提高了任务调度成功率。     

采用配置完成优先策略的可重构任务调度算法

如何隐藏和减少配置时间是相依性可重构任务调度的关键问题.提出一种采用配置完成优先策略的相依性可重构任务调度算法,通过基于预配置优先级的列表调度算法,实现将后续任务的配置时间隐藏于前驱任务的运行时间中,并采用基于配置完成优先策略的配置重用机制,减少了任务调度后的配置过程,从而在总体上缩短了相依性任务集合的运行时间.仿真结果表明,该调度算法能有效避免调度死锁,并可减少相依性可重构任务的整体运行时间.     

The case for reconfigurable hardware in wearable computing

Wearable computers are embedded into the mobile environment of their users. A design challenge for wearable systems is to combine the high performance required for tasks such as video decoding with the low energy consumption required to maximise battery runtimes and the flexibility demanded by the dynamics of the environment and the applications. In this paper, we demonstrate that reconfigurable hardware technology is able to answer this challenge. We present the concept and the prototype implementation of an autonomous wearable unit with reconfigurable modules (WURM). We discuss experiments that show the uses of reconfigurable hardware in WURM: ASICs-on-demand and adaptive interfaces. Finally, we present an experiment with an operating system layer for WURM.     

MobileFBP: Designing portable reconfigurable applications for heterogeneous systems

Power-efficiency has been a key issue for today’s application and system design, ranging from embedded systems to data centers. While application-specific designs and optimizations may improve the power efficiency, it requires significant efforts to co-design the hardware and software, which are difficult to re-use. On the hardware front, the trend of heterogeneous computing enables custom designs for specific applications by integrating different types of processors and reconfigurable hardware to handle compute-intensive tasks. However, what is still missing is an elegant application framework, i.e., a programming environment and a runtime system, to develop portable applications which can offload tasks or be reconfigured dynamically to run on a variety of systems efficiently.Our ongoing work, MobileFBP, provides an application framework which aims to support heterogeneous and reconfigurable systems. Using the framework, the developers build portable applications with a dataflow programming paradigm, and the MobileFBP runtime system dynamically schedules the task components to run on available computing resources locally or remotely based on the application profiles. We hope that this ability produces high-level portable applications and reduces the efforts and skills needed for the developers to optimize their applications on a range of systems. This paper describes this work and presents our preliminary results.