Scaling-law-based metamodels for the sizing of mechatronic systems

This paper presents a new metamodel form and associated construction procedure adapted to the sizing tasks of mechatronics systems. This method of meta-modeling uses scaling laws to extract compact forms of design models from local numerical simulations (FEM). Compared to traditional metamodels (polynomial response surfaces, kriging, radial basis function) the scaling-law-based metamodels have the advantage of a light, compact form and good predictive accuracy over a wide range of the design variables (several orders of magnitude). The general regression process is first explained and then illustrated on different examples: a purely numerical test function, a limited angle electromagnetic actuator and a flexible mechanical hinge.     

Accurate metamodels of device parameters and their applications in performance modeling and optimization of analog integrated circuits

Techniques for constructing metamodels of device parameters at BSIM3v3 level accuracy are presnted to improve knowledge-based circuit sizing optimization. Based on the analysis of the prediction error of analytical performance expressions, operating point driven (OPD) metamodels of MOSFETs are introduced to capture the circuit's characteristics precisely. In the algorithm of metamodel construction, radial basis functions are adopted to interpolate the scattered multivariate data obtained from a well tailored data sampling scheme designed for MOSFETs.The OPD metamodels can be used to automatically bias the circuit at a specific DC operating point. Analytical-based performance expressions composed by the OPD metamodels show obvious improvement for most small-signal performances compared with simulation-based models. Both operating-point variables and transistor dimensions can be optimized in our nesting-loop optimization formulation to maximize design flexibility. The method is successfully applied to a low-voltage low-power amplifier.     

The simulation modelling and performance analysis of low earth orbit satellite communication networks for personal communications

This paper extends previous research efforts related to the simulation performance modelling and analysis of satellite communication networks. Specifically, the use of low earth orbit (LEO) satellite networks for personal communications is examined. Six different satellite constellation configurations are investigated in a packet‐switched operating environment. Performance metrics examined are the end‐to‐end packet delay and the utilization of satellite channels in the dynamic environment. Realistic and accurate models of the physical satellite network and its terrestrial transmitters require that numerous operating characteristics and assumptions be specified. These are based on proposed design requirements of commercial systems, such as Iridium. Via the use of simulation, we show the relative delay and utilization performance of differing satellite network architectures. From these simulation models, mathematical metamodels are derived for the system delays. These innovative models are used to predict the delay performance of different network architectures not previously simulated. Comparison of these metamodels with simulation results show that metamodels provide an accurate means for performance prediction. Copyright © 1999 John Wiley & Sons, Ltd.     

Polynomial metamodel based fast optimization of nano-CMOS oscillator circuits

Modern consumer electronics are designed as analog/mixed-signal systems-on-chip (AMS-SoCs). In an AMS-SoC, the analog and mixed-signal portions have not received systematic attention due to their complex nature and the fact that their optimization and simulation consume significant portions of the design cycle time. This paper presents a new approach to reduce the design cycle time by combining accurate polynomial metamodels and optimization algorithms. The approach relies on a mathematical representation (metamodel or surrogate model) of AMS-SoC subsystems/components. Polynomial metamodels are created from post-layout parasitic netlists and provide an accurate representation for each figure-of-merit over the entire design space of the AMS-SoC component. The metamodel approach saves a very significant amount of time during design iterations. Polynomial metamodels are reusable and language independent. Three algorithms are investigated to compare the speed for optimization on the polynomial metamodels. Two widely used circuits have been designed in two different technologies as comparative case studies: an 180 nm LC-VCO and a 45 nm ring oscillator (RO). Experimental results prove that the metamodel-based optimization achieved speed-up as high as 21,600 $\times$ for the LC-VCO circuit and 11,750 $\times$ for the RO in comparison to the actual circuit netlist-based (SPICE) optimization, with less than 1 % error. Thus, the paper demonstrates that the polynomial metamodeling approach to the design problem is an effective and accurate means for fast design space exploration and optimization.     

Subjective validation methods for analog integrated circuits’ metamodels using graphical displays of data

Metamodels are approximations to simulation models. They are built and validated using simulation results for samples of data points in the design variables space. Metamodels are more efficient to run compared to the simulation models they represent. They are validated to substantiate their accuracy using objective and/or subjective techniques. Objective validation methods based on various statistics such as root mean square RMS errors are often used. These methods require that certain statistical assumptions be satisfied by the data used in validation. Subjective validation methods are used, in particular, when some of these statistical assumptions are violated; for example, if the number of data points used is not sufficient. This paper presents and compares six different plot types that can be used to display data for subjective validation of metamodels, and demonstrates their usefulness as validation tools for analog circuits’ metamodels. These plots are easy to generate, using metamodel and simulation data. Furthermore, these methods are general and require no statistical assumptions for the data that can be displayed.     

器件参数宏模型的精确建立及其在模拟集成电路性能建模与优化中的应用

Techniques for constructing metamodels of device parameters at BSIM3v3 level accuracy are presented to improve knowledge-based circuit sizing optimization. Based on the analysis of the prediction error of analytical performance expressions, operating point driven （OPD） metamodels of MOSFETs are introduced to capture the circuit＇s characteristics precisely. In the algorithm of metamodel construction, radial basis functions are adopted to interpolate the scattered multivariate data obtained from a well tailored data sampling scheme designed for MOSFETs. The OPD metamodels can be used to automatically bias the circuit at a specific DC operating point. Analytical-based performance expressions composed by the OPD metamodels show obvious improvement for most small-signal performances compared with simulation-based models. Both operating-point variables and transistor dimensions can be optimized in our nesting-loop optimization formulation to maximize design flexibility. The method is successfully applied to a low-voltage low-power amplifier.     

Experimental design and regression analysis in simulation: An automated flowline case study

This paper uses an experimental design and regression metamodels to evaluate the relationships between the throughput of an automated flowline and other system parameters such as the number of machines in the flowline, machine processing times, capacity of the buffer, mean time between failure, and the mean time to repair. The Taguchi approach is used in the experimental design. Sixteen simulation runs are generated to test the significance of the main effects and the two-factor interactions. Consequently, Kleijnen's regression metamodel approach is used to develop predictor models for the automated flowline throughput. Finally, a decision model is formulated to determine the optimum design level of each factor.     

Low-frequency low-noise circuits design using an E n-In model

In view of the limitations of a R _n-G_n model in the low frequency range and the defects of an E _n-I_n model in common use now, this paper builds a complete E _n-I_n model according to the theory of random harmonic. The parameters for the low-noise design such as the equivalent input noisy voltage E _ns, the optimum source impedance Z _sopt and the minimum noise figure F _min can be calculated accurately by using this E _n-I_n model because it considers the coherence between the noise sources fully. Moreover, this paper points out that it will cause the maximum 30% miscalculation when neglecting the effects of the correlation coefficient γ. Using the series-series circuits as an example, this paper discusses the methods for the E _n-I_n noise analysis of electronic circuits preliminarily and demonstrates its correctness through the comparison between the simulated and measured results of the minimum noise figure F _min of a single current series negative feedback circuit.     

激光声遥感技术中激光器的应用设计

从激光器类型、激光脉冲能量、激光脉冲宽度、导光及聚焦等方面对激光声遥感技术中应用的激光器提出了具体的技术要求,并重点介绍了如何通过在激光器中采用特殊结构的非稳腔、精确的放电腔、Fitch脉冲电压发生器、望远镜聚焦系统等设计思想来实现以上技术要求。应用效果表明,根据以上设计思想研制出的二氧化碳激光器能够满足激光声遥感应用要求。     

VOLTE容灾机制研究及优化方案

_{本文首先对VOLTE现网网络结构及容灾机制进行研究分析,发现现存容灾机制中存在的缺点和不确定性,针对其中的问题,针对性地进行了深入研究和分析,创新的提出了1种快速容灾抢通方案,以达到提升VOLTE业务运维能力和用户业务感知的目的。}     

Calculation of energy band gaps in quaternary iii/v alloys

The dielectric theory of electronegativity is applied to the calculation of the compositional dependence of the energy band gap for quaternary III/V alloys of type A_l-xB_xC_1-yD_y and A_1-x-yB_xC_yD. The departure from linearity of E_G versus x and y is taken to be the sum of two terms, the intrinsic or virtual crystal term and the extrinsic term due to effects of aperiodicity which for one type of alloy may occur on both sublattices. Rather than simply treating the quaternary as an average of the bounding ternary systems, as has been common in the past, the intrinsic departure from linearity is calculated by assuming E_h,i,C, and D_av to vary linearly with x and y. The result is a smaller intrinsic deviation from linearity and a much better fit to existing data in the system Ga_1-xIn_xAs_1-y P_y. The calculation is also applied to three systems where no data exist but which are of great interest because of their potential application for the fabrication of lattice matched tandem solar cells: Ga_l-xA1_xAs_l-ySb_y. Ga_1-x-yA1_xIn_yAs, and GaAs_1-x-yP_xSb_y.     

A high-linear wide-tunable CMOS transconductor for video frequency applications

In this paper a new CMOS transconductor structure based on a g_m-boosted degenerated differential pair is presented for applications in the video frequency range. The proposed circuit combines two techniques, a switchable array of source degenerating MOS resistors and a programmable output current mirror, in order to widen the G_m tuning range while maintaining linearity. Degeneration MOS resistors are made common-mode voltage independent thanks to a simple control circuit. Post-layout simulation results from a 0.35 μm design supplied at 3.3 V show a wide tuning range (10–100 MHz), good linearity (−58.4 dB for an output signal voltage of 1.1 V_p–p) and low excess phase (<0.5° over the whole tuning range).     

Nickel silicidation techniques for strained Si1?xGex, Si1?x?yGexCy, and Si1?yCy alloys material-device applications

A nickel silicide process for Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloy materials compatible with Si technology has been developed. Low-resistivity-phase (12–20 μΘ cm) nickel silicides have been obtained for these alloys with different low sheet-resistance temperature windows. The study shows that thin (15–18 nm) silicide layers with high crystalline quality, smooth silicide surface, and smooth interface between silicide and the underlying material are achievable. The technique could be used to combine the benefits of Ni silicide and Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloys. The technique is promising for Si or Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloy-based metal-oxide semiconductor, field-effect transistors (MOSFETs) or other device applications.     

Transport properties of thermoelectric materials for coolers

The Seebeck coefficient, thermal conductivity, electrical conductivity and Hall coefficient of cooler grade, p-and n-type ternary alloys of Bi₂Te₃-Sb₂Te₃-Sb₂Se₃ were measured between 10 and 300 K. Between 300 K and about 150 K the temperature dependence of the transport properties can be explained by assuming nondegeneracy and a lattice scattering mechanism. The difference between the temperature dependence of the Hall effect in n-and p-type alloys can be explained by the presence of sub-bands of light and heavy holes in the valence band of p-type alloys.     

Processing of large YBa2 Cu3Ox domains for levitation applications by a Nd1+x Ba2−x Cu3 Oy-Seeded melt-growth technique

YBa₂Cu₃O_x domains for levitation applications have been produced by a seeding technology that includes Nd_1+x Ba_2−x Cu₃O_y seeds and melt-processing technologies such as conventional melt-textured growth, melt-texturing with PtO₂ and Y₂BaCuO₅ additions, and the new solid-liquid-melt-growth technology. Large domains (∼20 mm) with high levitation forces (F₁ up to 8.2 N) have been produced. The reproducibility of the results is good, and the capability of producing a large number of pellets in a single batch indicates good potential for the production of large amounts of this material.     

Low pressure metalorganic chemical vapor deposition of InP and related compounds

The low pressure metalorganic chemical vapor deposition epitaxial growth and characterization of InP, Ga_0.47In_0.53 As and Ga_xIn_1-xAs_yP_1-y, lattice-matched to InP substrate are described. The layers were found to have the same etch pit density (EPD) as the substrate. The best mobility obtained for InP was 5300 cm² V⁻¹S⁻¹ at 300 K and 58 900 cm² V⁻¹ S⁻¹ at 77₂K, and for GaInAs was 11900 cm² V⁻¹ S⁻¹ at 300 K, 54 600 cm² V⁻¹ S⁻¹ at 77 K and 90 000 cm V⁻¹S⁻¹ at 2°K. We report the first successful growth of a GaInAs-InP superlattice and the enhanced mobility of a two dimensional electron gas at a GaInAs -InP heterojunction grown by LP-MO CVD. LP MO CVD material has been used for GaInAsPInP, DH lasers emitting at 1.3 um and 1.5 um. These devices exhibit a low threshold current, a slightly higher than liquid phase epitaxy devices and a high differential quantum efficiency of 60%. Fundamental transverse mode oscillation has been achieved up to a power outpout of 10 mW. Threshold currents as low as 200 mA dc have been measured for devices with a stripe width of 9 um and a cavity length of 300 um for emission at 1.5 um. Values of T in the range 64–80 C have been obtained. Preliminary life testing has been carried out at room temperature on a few laser diodes (λ = 1.5μm). Operation at constant current for severalthousand hours has been achieved with no change in the threshold current.     

The effect of Tl2Te3 on the properties of the solid solution (Sb2Te3)0.75.(Bi2Te3)0.25

The effect on transport properties of the addition of 0.5-5% Tl₂Te₃ to p-type solid solutions of antimony and bismuth tellurides was studied. It was found that the addition of Tl₂Te₃ caused a lessening of the increase of hole concentration as low temperatures were approached, resulting in a slower decrease of the Seebeck coefficient with a decrease in temperature. In partial fulfillment of M.Sc. degree, Hebrew University, Jerusalem. Permanent address, Dept. of Inorganic and Analytical Chemistry, Hebrew University, Jerusalem.     

Characterization of a rapid thermal anneal TiNxOy/TiSi2 contact barrier

In this paper, the physical and electrical properties of a TiN_xO_y/TiSi₂ dual layer contact barrier are reported. The TiN_xO_y/TiSi₂ barrier was formed by rapidly annealing a Ti thin film on Si in an N₂ ambient. During this process, the Ti film surface reacts with N₂ to form a TiN_xO_y skin layer and the bulk of the Ti film reacts with Si to form an underlying TiSi₂ layer. The influences of rapid thermal anneal (RTA) conditions on the TiN_xO_y layer were investigated by varying the RTA temperature from 600 to 1100° C and cycle duration from 30 to 100 s. It is found that the resulting TiN_xO_y and TiSi₂ layer thicknesses are dependent on RTA temperature and the starting Ti thickness. For a starting Ti thickness of 500Å, 150Å thick TiN_xO_y and 800Å thick TiSi₂ are obtained after an RTA at 900° C for 30 s. The TiN_xO_y thickness is limited by a fast diffusion of Si into Ti to form TiSi₂. When a Ti film is deposited on SiO₂, Ti starts to react with SiO₂ from 600° C and a significant reduction of the SiO₂ thickness is observed after an RTA at 900° C. The resulting layer is composed of a surface TiN_xO_y layer followed by a complex layer of titanium oxide and titanium suicide. In addition, when Ti is depos-ited on TiSi₂, thicker TiN_xO_y and TiSi₂ layers are obtained after RTA. This is because the TiSi₂ layer retards the diffusion of Si from the underlying substrate into the Ti layer. NMOSFETs were fabricated using the TiN_xO_y/TiSi₂ as a contact barrier formed by RTA at 900° C for 30 s and a significant reduction of contact resistance was obtained. In addition, electromigration test at a high current density indicated that a significant improvement in mean time to failure (MTF) has been obtained with the barrier.     

基于InP衬底的晶格失配In0.68Ga0.32As的MOCVD生长及其特性研究

采用MOCVD生长技术在InP衬底上成功实现了晶格失配的3μm In0.68 Ga0.32As薄膜生长.通过As组分的改变,利用张应变和压应变交替补偿的InAsxP1-x应变缓冲层结构来释放由于晶格失配所产生的应力,在InP衬底上得到了与In0.68Ga0.32 As晶格匹配的InAsxP1-x“虚拟”衬底,通过对缓冲层厚度的优化,使应力能够在“虚拟”衬底上完全豫弛.通过原子力显微镜(AFM)、高分辨XRD、透射电镜(TEM)和光致发光(PL)等测试分析表明,这种释放应力的方法能够有效提高In0.68 Ga0.32 As外延层的晶体质量.