大尺寸AMOLED显示的技术挑战

综述了目前大尺寸AMOLED显示的技术挑战,尤其是背板技术。然后论述了如何采用氧化物TFT新技术与LTPS和a-Si TFT的优势相结合制造大尺寸背板的最佳方案。通过对比传统准分子激光退火（ELA）LTPS和非晶铟-镓-氧化锌（a-IGZO）TFT的器件特性,特别揭示了氧化物TFT的挑战性技术。最后,展示了由a-IGZO TFT背板制造的12.1in WXGAAMOLED显示器原型机。     

LTPS TFT-LCD模块的现状及展望(上)

使用a-Si TFT-LCD所用无碱玻璃后，基片的温度极限约为600℃，这一温度属于高温p-Si(HTPS)范围，或许会改称为低温p-Si(LTPS)。表1示出a-Si LTPS、HTPS生成的TFT-LCD的比较。表1 a-Si LTPS及HTPS TFT-LCD的比较技术动向1986年当时索尼公司的鲛岛等人报告了由a-Si膜的ELA(受激准分子激光器退火)生成结晶及采用该技术的多晶硅TFT(p-Si TFT)的制作。处理温度为260℃，显示了电场效应迁移率180cm2/Vs且特性良好的低温p-Si TFT实现的可能性。利用ELA的结晶生成法作为低温下的结晶膜形成法目前研究日盛。当前已批量生…     

OLED最新动态

一、我国全线打通AMOLEDfN造工艺技术日前．从有关方面获悉．昆山工研院新型平板显示技术中心（简称昆山平板显示中心）和维信诺公司在国内率先全线打通了LTPS—TFT背板和OLED显示屏制造工艺技术．     

我国全线打通AMOLED制造工艺技术

日前,记者从有关方面获悉,昆山工研院新型平板显示技术中心（简称昆山平板显示中心）和维信诺公司在国内率先全线打通了LTPS—TFT背板和OLED显示屏制造工艺技术,并于2010年12月24日,     

低温多晶硅TFT-LCD异军突起

平板显示器正逐步取代阴极射线管CRT成为显示器产业的主流，尤以液晶显示器所占比重最大，其中薄膜晶体管液晶显示器TFT-LCD占绝对优势，生产技术进入第八代世代线的8G。另一方面，TFT制备工艺也在不断改进之中，在非晶硅a-Si TFT基础上，研发低温多晶硅LTPS（Low Tem-perature Poly Silicon）、高温多晶硅HTPS、连续晶界硅CGS技术，     

消费电子产品市场上的LCD技术

LTPS技术LTPS（Low Temperature　Polycrystalline　Silicon, 低温多晶硅）TFT-LCD技术即将全面进军高清晰度电视 等消费电子产品市场。总体来讲,LTPS板较之传统的有源 矩阵LCD结构所采用的非晶硅（a-Si）TFT要轻得多,也 小得多。由于它采用了结晶硅,因此亮度和分辨率更高,响 应性更好。 由非晶硅制成的薄膜晶体管用作每个像素的开关,然 而,这些传统的非晶硅设计同时还需要另外的定制IC,以 把数字信号转换成适于显示的格式,并控制像素开关。非晶硅的特性还限制了单位面积上能够照射的像素的数量,目前大多数非晶硅TFT-LCD的像素密度大致在60～130     

移动电话用显示器技术的发展动向

视具体应用的不同，移动电话可以采用有机EL、STN、TFD（Thin Film Diode，薄膜二极管）、a-Si TFT和LTPS LCD等各类显示器，表1列出了移动电话常用显示器的主要特点。     

AMOLED用之a—Si与p—Si的比较

本文考查了具有a-Si TFT及LTPS TFT固有性能之OLED底板的性能。LTPS TFT显示了其在AMOLED显示应用巾之令人满意的稳定性,而a—Si AMOLED则表现出在驱动OLED方面具有更好的均匀能力。但是a—Si TFT在长期工作中的稳定性是令人难以接受的,并且尚有使a—SiTFT AMOLED商品化的关键问题需要解决。     

基于P-Type多晶硅TFT技术的集成型有源OLED驱动电路

低温多晶硅(LTPS:Low-temperature poly-Si)技术已经成为薄膜晶体管(TFT:thin film transistor)制作中最具吸引力的技术,并应用在AMOLED显示器中.P-type 技术能够简化 TFT 的制作过程.本文提出了一种应用 p-type 多晶硅 TFT的 AMOLED 驱动电路结构,包括栅极驱动器、数据驱动器以及像素阵列.数据驱动器采用分块方法,使得显示屏的输出线数大大减少.作者采用一种改进的 p-type 移位寄存器实现逐行选通的功能,并采用由 4 个 p-type 反相器级联构成的缓冲器来提高电路的驱动能力.为了验证上述电路结构的正确性,作者采用 HSPICE 软件进行仿真分析.结果表明,电路工作正常.利用韩国汉城国立大学及 Neo Poly 公司在多晶硅制作方面的优势,我们已经合作完成了应用上述电路结构的分辨率为96×3×128的有源 OLED 的制作.     

有机电致发光器件的驱动技术

只有结合良好的驱动技术才能将OLED的特点表现出来。OLED的驱动方式可分为有源驱动和无源驱动,分别对这两种驱动技术作一评述。OLED需结合TFT有源驱动技术才有可能进一步发展,而LTPS TFT技术几乎是惟一的选择。使用数字驱动电路是目前的发展趋势。     

多晶硅超薄沟道薄膜晶体管研制

提出了一种新结构的低温多晶硅薄膜晶体管 ( poly- Si TFT) .该 poly- Si TFT由一超薄的沟道区和厚的源漏区组成 .超薄沟道区可有效降低沟道内陷阱密度 ,而厚源漏区能保证良好的源漏接触和低的寄生电阻 .沟道区和源漏区通过一低掺杂的交叠区相连接 .该交叠区使得在较高偏置时 ,靠近漏端的沟道区电力线能充分发散 ,导致电场峰值显著降低 .模拟结果显示该TFT漏电场峰值仅是常规 TFT的一半 .实验结果表明该 TFT能获得好的电流饱和特性和高的击穿电压 .而且 ,与常规器件相比 ,该 TFT的通态电流增加了两倍 ,而最小关态电流减少了3.5倍 .     

High-performance poly-silicon TFTs incorporating LaAlO/sub 3/ as the gate dielectric

We have integrated a high-/spl kappa/ LaAlO/sub 3/ dielectric into low-temperature poly-Si (LTPS) thin-film transistors (TFTs). Good TFT performance was achieved-such as a high drive current, low threshold voltage and subthreshold slope, as well as an excellent on/off current ratio and high gate-dielectric breakdown field. This was achieved without hydrogen passivation or special crystallization steps. The good performance is related to the high gate capacitance density and small equivalent-oxide thickness provided by the high-/spl kappa/ dielectric.     

Polysilicon thin-film transistors on polymer substrates

Different approaches to fabricate low-temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) on polymer substrates are reviewed and the two main routes are discussed: (1) standard fabrication of LTPS TFTs on glass substrates followed by a transfer process of the devices on the polymeric substrate; (2) direct fabrication of the devices on the polymeric substrate. Among the different techniques we have described in more detail the process we have recently developed for the fabrication of LTPS TFTs directly on ultra-thin polyimide (PI) substrate. LTPS TFT technology is particularly suited for high performance flexible electronics applications, due to the excellent device characteristics, good electrical stability and CMOS technology. Flexible display application remains the most attractive application for LTPS technology, especially for AMOLED displays, where device stability and the possibility to integrate the driving circuits make LTPS technology superior to all the other competitive TFT technologies. Among the other applications, particularly promising is also the application to flexible smart sensors, where integration of a front-end electronics is essential. Some examples of flexible gas sensors and pressure sensors, integrated with simple readout electronics based on LTPS TFTs and fabricated on ultra-thin PI substrate, are presented.     

多晶硅超薄沟道薄膜晶体管研制

提出了一种新结构的低温多晶硅薄膜晶体管(poly-Si TFT).该poly-Si TFT由一超薄的沟道区和厚的源漏区组成.超薄沟道区可有效降低沟道内陷阱密度,而厚源漏区能保证良好的源漏接触和低的寄生电阻.沟道区和源漏区通过一低掺杂的交叠区相连接.该交叠区使得在较高偏置时,靠近漏端的沟道区电力线能充分发散,导致电场峰值显著降低.模拟结果显示该TFT漏电场峰值仅是常规TFT的一半.实验结果表明该TFT能获得好的电流饱和特性和高的击穿电压.而且,与常规器件相比,该TFT的通态电流增加了两倍,而最小关态电流减少了3.5倍     

Characterizing Fluorine-Ion Implant Effects on Poly-Si Thin-Film Transistors With ${hbox{Pr}}_{2}{hbox{O}}_{3}$ Gate Dielectric

The fluorine ion implantation applied to the polycrystalline silicon thin-film transistors (poly-Si TFTs) with high-k Pr₂O₃ as gate dielectric is investigated for the first time. Using the Pr₂O₃ gate dielectric can obtain a high gate capacitance density and thin equivalent-oxide thickness, exhibiting a greatly enhancement in the driving capability of TFT device. Introducing fluorine ions into the poly-Si film by fluorine ion implantation technique can effectively passivate the trap states in the poly-Si film and at the Pr₂O₃/poly-Si interface to improve the device electrical properties. The Pr₂O₃ TFTs fabricated on fluorine-implanted poly-Si film exhibit significantly improved electrical performances, including lower threshold voltage, steeper subthreshold swing, higher field-effect mobility, lower off-state leakage current, and higher on/off current ratio, as compared with the control poly-Si Pr₂O₃ TFTs. Also, the incorporation of fluorine ions also improves the reliability of poly-Si Pr₂O₃ TFTs against hot-carrier stressing, which is attributed to the formation of stronger Si-F bonds. Furthermore, superior threshold-voltage rolloff characteristic is also demonstrated in the fluorine-implanted poly-Si Pr₂O₃ TFTs. Therefore, the proposed scheme is a promising technology for high-performance and high-reliability solid-phase crystallized poly-Si TFT.     

High-performance poly-Si TFTs fabricated by implant-to-silicide technique

High-performance poly-Si thin-film transistors (TFTs) with fully silicided source/drain (FSD) and ultrashort shallow extension (SDE) fabricated by implant-to-silicide (ITS) technique are proposed for the first time. Using the FSD structure, the S/D parasitic resistance can be suppressed effectively. Using the ITS technique, an ultrashort and defect-free SDE can also be formed quickly at about 600/spl deg/C. Therefore, the FSD poly-Si TFTs exhibits better current-voltage characteristics than those of conventional TFTs. It should be noted that the on/off current ratios of FSD poly-Si TFT (W/L=1/4/spl mu/m) is over 3.3/spl times/10/sup 7/, and the field-effective mobility of that device is about 141.6 (cm/sup 2//Vs). Moreover, the superior short-channel characteristics of FSD poly-Si TFTs are also observed. It is therefore believed that the proposed FSD poly-Si TFT is a very promising TFT device.     

Electrical characteristics of new LDD poly-Si TFT structuretolerant to process misalignment

A new lightly doped drain (LDD) poly-Si TFT structure having symmetrical electrical characteristics independent of the process induced misalignment is described in this paper. Based on the experimental results, we have established that there is no difference between the bi-directional I_D-V_G characteristics, and a low leakage current, comparable to a conventional LDD poly-Si TFT, has been maintained for this new poly-Si TFT. The maximum ON/OFF current ratio of about 1×10⁸ is obtained for the LDD length of 1.0 μm. In addition, the kink effect in the output characteristics has been remarkably improved in the new TFTs in comparison to the conventional non-LDD single- or dual-gate TFTs     

Ultra-thin elevated channel poly-Si TFT technology forfully-integrated AMLCD system on glass

A novel low temperature poly-Si (LTPS) TFT technology called the ultra-thin elevated channel TFT (UT-ECTFT) technology is proposed. The devices fabricated using this technology have an ultra-thin channel region (300 Å) and a thick drain/source region (3000 Å). The ultra-thin channel region is connected to the heavily doped thick drain/source region through a lightly doped overlapped region. The ultra-thin channel region is used to obtain a low grain-boundary trap density in the channel, and the overlapped lightly doped region provides an effective way for electric field spreading at the drain, thereby reducing the electric field there significantly. With the low grain-boundary trap density and low drain electric field, excellent current saturation characteristics and high drain breakdown voltage are obtained in the UT-ECTFT. Moreover, this technology provides complementary LTPS TFT's with more than two times increase in on-current and 3.5 times reduction in off-current compared to conventional thick channel LTPS TFT's