一种基于sigma-delta调制的高效率低噪声降压式直流变换器

本论文在提高开关电源效率和降低噪声方面做了一些工作。在效率方面,提出了一个包含死区时间控制,断流模式控制以及栅宽调制功能的高效率功率管驱动电路。在控制回路中采用sigma-delta调制取代传统的PWM调制,降低了开关电源输出中与时钟有关的谐波噪声。本文在 0.35um CMOS工艺条件下实现了一个基于二阶sigma-delta调制的高效率低噪声DC-DC变换器。测试结果表明,此变换器能够达到93%的峰值效率,并且谐波噪声可以比使用PWM调制时低30dB。     

A low noise high efficiency buck DC-DC converter with sigma-delta modulation

Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode(DCM) controller and gate width controller,is proposed to improve efficiency.Instead of PWM modulation, sigma-delta modulation is introduced into the feedback loop of the converter to move out the clock-referred harmonic spike.The proposed converter has been designed and fabricated by a 0.35μm CMOS process.Measured results show that the peak efficiency of the converter can reach 93%and sigma-delta modulation suppresses the harmonic spike by 30 dB over PWM modulation.     

PWM型DC-DC LED驱动电路的研究与设计

采用PWM型DC-DC降压拓扑电路结构和闭环恒流控制,设计了LED驱动电路,其工作在CCM模式。该LED驱动电路选用LM2575作为PWM控制芯片,并制作了该电路的实际电路板,其外围元件较少,电路结构简单,适用于中小型LED负载驱动。通过理论分析得到电路元件和各个节点的性能参数,并应用Simulink对DC-DC降压拓扑电路进行仿真。经调试与测量表明,该电路的电气性能良好,负载输出电压纹波在±0.1%以内,功率效率达到45.5%。     

单片降压型DC-DC转换器的控制电路设计

基于峰值电流检测脉宽调制技术原理,设计了一种新颖的应用于单片降压型DC-DC转换器的控制电路。针对峰值电流采样和PWM比较器电路技术,提出了一种新颖的电路结构。其中,PWM比较器和逻辑及驱动电路由升压电路驱动,节省了一个电平转换电路,降低了电路功耗;PWM比较器直接对功率管和镜像管电流采样,无需使用运算放大器,简化了电路结构。采用华虹宏力BCD350GE工艺进行设计,流片测试表明,电路可实现3V到36 V宽幅输入,500 mA满载输出。在输入24 V电压,输出3.3 V电压时,纹波为2.3 mV。     

PWM半桥变换器电路仿真

随着电力电子技术的迅速发展,PWM型DC-DC变换器的应用日益广泛。如今,高性能、高效率、小型化和轻量化越来越成为各类DC-DC变换器追求的目标。文中优选电路结构简单、容易控制的半桥电路作为直直变换拓扑,在剖析了脉宽调制对称半桥变换器工作原理及特性后,设计出270 V直流输入、360 V直流输出、输出功率为500 W变换器的相关参数。切实了解SG1525芯片脉冲产生原理后,设计出控制电路参数,从而搭建出完整的闭环系统。详尽分析了所得出仿真结果,并以此验证了理论分析和工程设计的正确性。     

采用分段式自适应PWM/PFM调制的Buck型DC-DC转换器设计北大核心

为了在轻重负载条件下获得更高的转换效率，采用分段式结构和导通电阻更小的NMOS作为输入级，并采用PWM/PFM双调制方式，设计了一种Buck型DC-DC转换器。为解决PWM/PFM调制信号切换问题，采用零电流检测方式进行切换。利用断续导通模式(DCM)和连续导通模式(CCM)下端NMOS管导通时电感电压的不同，检测下端NMOS在导通时电感电压大于零的周期。当电感电压大于零的周期大于2时，则处于DCM模式并自动采用PFM调制模式，关闭一部分功率管以减小开关频率和功率管寄生电容，优化轻载效率；反之则处于CCM模式并采用PWM调制。仿真结果表明，在负载电流10～1 000 mA范围内，该电路可以在两种调制模式平稳切换，在800 mA时峰值效率可提升到96%以上。     

Design of anti-jamming current-sensing circuit for current-mode buck regulator

A novel anti-jamming integrated CMOS current-sensing circuit for current-mode buck regulators is presented.Based on the widely-used traditional current-sensing structure,anti-jamming performance is improved significantly by adding on-chip capacitors and one-shot circuit.Also the transient response is faster through the introduction of current offset.The circuit iS concise,simple to implement and suits for SoC applications with single power supply.A dual-output current-mode DC-DC buck converter with proposed structure has been fabricated with a 0.5μm CMOS process for validation.In the 2.5-5.5 V input range,the two channels work steadily in the load current range of 0-600 mA.And the measured maximum efficiency is up to 96%.     

一种基于自适应峰值电流检测的模式切换电路北大核心

在降压转换器中，为了在不同的负载情况下获得高效率，常采用的方法是在重载时使用脉冲宽度调制(PWM),在轻载时使用脉冲频率调制(PFM),因此需要模式切换信号去控制整个降压转换器的工作状态，同时模式切换信号也可以用于自适应改变功率级电路中的功率管栅宽，减小功率管的栅极电容，提高整体电路的效率。文章设计了一个自适应峰值电流模式切换电路，用于产生模式切换信号，其原理是监控峰值电流的变化，产生峰值电压，将峰值电压与参考电压进行比较，得到模式切换信号，以决定降压转换器是采用PFM模式还是PWM模式。仿真结果表明，在负载电流0.5～500 mA范围内，该电路可以在两种调制模式之间平稳切换，其峰值效率可提升到94%以上。     

Single-Inductor Multi-Output (SIMO) DC-DC Converters With High Light-Load Efficiency and Minimized Cross-Regulation for Portable Devices

A load-dependant peak-current control single-inductor multiple-output (SIMO) DC-DC converter with hysteresis mode is proposed. It includes multiple buck and boost output voltages. Owing to the adaptive adjustment of the load-dependant peak-current control technique and the hysteresis mode, the cross-regulation can be minimized. Furthermore, a new delta-voltage generator can automatically switch the operating mode from pulse width modulation (PWM) mode to hysteresis mode, thereby avoiding inductor current accumulation when the total power of the buck output terminals is larger than that of the boost output terminals. The proposed SIMO DC-DC converter was fabricated in TSMC 0.25 $muhbox{m}$ 2P5M technology. The experimental results show high conversion efficiency at light loads and small cross-regulation within 0.35%. The power conversion efficiency varies from 80% at light loads to 93% at heavy loads.      

一种分段输出PWM Buck DC-DC转换器设计

为了解决PWMDC-DC在轻负载时转换效率骤降的问题,设计了一种分段输出级PWM DC-DC电路结构,用以优化轻负载时的转换效率.该设计引入了负载电流检测电路,对输出电流进行采样并检测.在重载情况下,所有功率MOSFET同时输出.当负载电流减小,逐级关闭各段功率MOSFET,直至在最轻载情况下用最小尺寸的功率MOSFE...     

On-chip CMOS current-sensing circuit for DC-DC buck converter

An on-chip CMOS current-sensing circuit for a DC-DC buck converter is presented. The circuit can measure the inductor current through sensing the voltage of the switch node during the converter on-state. By matching the MOSFETs, the achieved sense ratio is almost independent of temperature, model and supply voltage. The proposed circuit is suitable for low power DC-DC applications with high load current.     

便携应用DC-DC轻负载高效率的实现

提出了一种新颖的DC-DC环路控制结构.轻负载时芯片自动进入省电模式,通过检测反馈电压使其在待机状态与固定峰值状态切换工作,平均静态功耗以及开关功耗大大减小,提高了轻负载效率,延长了便携应用电池的使用时间.内部同步整流消除了肖特基二极管的使用,进一步提高了效率.该结构在一款0.5μm CMOS工艺的降压型DC-DC中进行了投片验证.输入电压3.6V,输出电压1.8V条件下,待机状态静态电流仅为25μA,0.1mA负载下效率高达62%.最高效率为96%.     

高性能PWM型DC-DC升压变换器研究

设计了一种单片集成PWM型电流模式升压变换器,芯片内部集成了耐压22V的DMOS功率开关管,开关频率为1.6MHz,采用1.5μmBCD工艺实现。芯片具有很宽的输入电压(2.7~14V)、高效率(85%)、低关断电流、快速暂态响应和低功耗等特性,适宜于用作便携式设备的电源管理,也可作为IP核,嵌入同种工艺下的其它芯片。文中除了对芯片设计方法、思路及主要电路模块结构的设计方案进行讨论外,还提出了减小单片集成开关电源噪声的措施。     

一种新型软开关DC-DC PWM升压变换器设计

为提高转换效率并降低电源开关的电流应力,提出一种基于新型有源缓冲电路的PWM DC-DC升压变换器。该有源缓冲电路使用ZVT—ZCT软开关技术,分别提供了总开关ZVT开启及ZCT闭合、辅助开关ZCS开启及ZCT闭合。消除了总开关额外的电流及电压应力,消除了辅助开关电压应力,且有源缓冲电路的耦合电感降低了电流应力。另外,通过连续将二极管添加到辅助开关电路,防止来自共振电路的输入电流应力进入总开关。实验结果表明,相比传统的PWM变换器,新的DC-DC PWM升压变换器在满负荷时电流应力降低且总体效率能达到98.7%。     

A comparison of nondeterministic and deterministic switchingmethods for DC-DC power converters

An analysis and experimental results of the random pulsewidth modulation (RPWM) and random pulse-position modulation (RPPM) methods for DC-DC converters are presented. The characteristics and performance of power converters under two randomized modulations are evaluated. The theoretical relationships of discrete harmonics, continuous noise, and output-voltage ripple of the RPWM and RPPM schemes are established and compared with those of a standard deterministic pulsewidth modulation (PWM) scheme in a buck converter. Limitations in the randomly switched DC-DC converters, which have not been addressed before, are highlighted. Randomized schemes generally have inherent problems in achieving low-output-voltage ripple due to the low-frequency continuous noise within the passband of the converter filter. The inherent low-frequency noise-induced voltage ripple problems of nondeterministic switching methods for DC converters are confirmed experimentally. The performance of the RPPM method is found to be closer to the standard PWM method than that of the RPWM method. For DC-DC power conversion, the RPPM method offers much better output-voltage performance than the RPWM method     

用于降压型DC-DC转换器的死区时间控制电路

介绍了降压型DC-DC转换器的死区时间产生原理,给出一种死区时间控制电路.它通过采样电感中的电流,动态地调节死区延时,减小体二极管的导通时间,并且可抑制振铃现象的产生.在Cadence环境下对电路进行整体仿真.结果表明,在1 MHz频率下,死区时间能够随负载电流的变化而改变;体二极管的导通时间减小到1.5～2.5 ns,提高了系统的效率.     

电流模降压变换器抗干扰电流采样电路设计

A novel anti-jamming integrated CMOS current-sensing circuit for current-mode buck regulators is presented. Based on the widely-used traditional current-sensing structure, anti-jamming performance is improved significantly by adding on-chip capacitors and one-shot circuit. Also the transient response is faster through the introduction of current offset. The circuit is concise, simple to implement and suits for SoC applications with single power supply. A dualoutput current-mode DC-DC buck converter with proposed structure has been fabricated with a 0.5 μm CMOS process for validation. In the 2.5–5.5 V input range, the two channels work steadily in the load current range of 0–600 mA. And the measured maximum efficiency is up to 96%.     

A PWM DC-DC converter with optimum segmented output stage and current detector

High efficiency is very important for DC-DC power supplies in portable applications. A PWM DC-DC converter with optimum segmented output stage is proposed in this paper whose efficiency at light load is improved. The segmented output stage is optimally divided into 5 small segments plus 4 big segments. The segmented number of the output stage can be adaptively regulated according to the load current. Moreover, two current detector circuits are simultaneously adopted to form a mixed load current sensor in the converter to improve the detecting accuracy. A segmented current SenseFET (SCS) is used to sense the load current in continuous current mode, and a time digital converter with digital judgement (TDC-D) is designed to detect the load current in discontinuous current mode. The structure of the proposed PWM converter with optimum segmented output stage and mixed load current detector circuits is described in this paper, which has been implemented in a 0.13 μm CMOS process. Simulation and testing results show that the output stages of the PWM converter can self transit from one segment stage to another segment stage according to the load condition. And the maximum efficiency improvement of the proposed converter can reach 15%.     

一种基于DC/DC变换器的LED驱动电路的设计

提出一种基于电流模式DC/DC变换器的驱动控制电路。该电路可以与恒流电路结合在一起,用作LED驱动。电路由误差放大器、斜坡信号产生电路、电流采样与叠加电路以及PWM比较器四部分构成。采用华虹BCD350工艺进行仿真验证,结果显示,电路成功实现了电流采样信号与斜坡补偿信号的叠加,在Vea信号的控制下,输出了控制功率管关断的PWM脉冲信号。     

基于滑模控制的DC-DC降压变换器实验平台

为了实现DC-DC降压变换器的高精度控制,设计了一种基于滑模控制的输出电压调节器。首先根据DC-DC降压变换器的工作原理建立了系统的动态模型;接着利用转换后的受扰动态模型设计了滑模控制器,同时基于李雅普诺夫函数证明了闭环系统的稳定性;最后使用Matlab/Simulink软件和DC-DC降压变换器硬件电路搭建了实验测试平台。测试结果表明与传统的PID控制方法相比,DC-DC降压变换器系统在所设计的滑模控制器的作用下可以获得更快的动态性能与更强的扰动抑制能力。该实验平台不仅有利于大学生理解和掌握滑模控制理论,还可以提高大学生的工程应用能力。